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* Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
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#define LX_NODE_BASE 10
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#define MIPS_CPU_RTLX_IRQ 0
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#define RTLX_VERSION 2
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#define RTLX_xID 0x12345600
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#define RTLX_ID (RTLX_xID | RTLX_VERSION)
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#define RTLX_CHANNELS 8
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#define RTLX_CHANNEL_STDIO 0
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#define RTLX_CHANNEL_DBG 1
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#define RTLX_CHANNEL_SYSIO 2
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extern int rtlx_open(int index, int can_sleep);
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extern int rtlx_release(int index);
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extern ssize_t rtlx_read(int index, void __user *buff, size_t count);
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extern ssize_t rtlx_write(int index, const void __user *buffer, size_t count);
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extern unsigned int rtlx_read_poll(int index, int can_sleep);
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extern unsigned int rtlx_write_poll(int index);
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RTLX_STATE_UNUSED = 0,
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RTLX_STATE_INITIALISED,
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RTLX_STATE_REMOTE_READY,
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#define RTLX_BUFFER_SIZE 2048
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/* each channel supports read and write.
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linux (vpe0) reads lx_buffer and writes rt_buffer
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SP (vpe1) reads rt_buffer and writes lx_buffer
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enum rtlx_state rt_state;
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enum rtlx_state lx_state;
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/* read and write indexes per buffer */
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int rt_write, rt_read;
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int lx_write, lx_read;
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enum rtlx_state state;
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struct rtlx_channel channel[RTLX_CHANNELS];
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#endif /* __ASM_RTLX_H_ */