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/* linux/drivers/video/s3c-fb.c
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* Copyright 2008 Openmoko Inc.
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* Copyright 2008-2010 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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* http://armlinux.simtec.co.uk/
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* Samsung SoC Framebuffer driver
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software FoundatIon.
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/uaccess.h>
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#include <linux/interrupt.h>
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#include <linux/pm_runtime.h>
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#include <plat/regs-fb-v4.h>
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/* This driver will export a number of framebuffer interfaces depending
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* on the configuration passed in via the platform data. Each fb instance
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* maps to a hardware window. Currently there is no support for runtime
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* setting of the alpha-blending functions that each window has, so only
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* window 0 is actually useful.
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* Window 0 is treated specially, it is used for the basis of the LCD
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* output timings and as the control for the output power-down state.
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/* note, the previous use of <mach/regs-fb.h> to get platform specific data
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* has been replaced by using the platform device name to pick the correct
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* configuration data for the system.
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#ifdef CONFIG_FB_S3C_DEBUG_REGWRITE
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#define writel(v, r) do { \
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printk(KERN_DEBUG "%s: %08x => %p\n", __func__, (unsigned int)v, r); \
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__raw_writel(v, r); } while (0)
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#endif /* FB_S3C_DEBUG_REGWRITE */
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#define S3C_FB_VSYNC_IRQ_EN 0
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#define VSYNC_TIMEOUT_MSEC 50
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#define VALID_BPP(x) (1 << ((x) - 1))
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#define OSD_BASE(win, variant) ((variant).osd + ((win) * (variant).osd_stride))
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#define VIDOSD_A(win, variant) (OSD_BASE(win, variant) + 0x00)
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#define VIDOSD_B(win, variant) (OSD_BASE(win, variant) + 0x04)
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#define VIDOSD_C(win, variant) (OSD_BASE(win, variant) + 0x08)
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#define VIDOSD_D(win, variant) (OSD_BASE(win, variant) + 0x0C)
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* struct s3c_fb_variant - fb variant information
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* @is_2443: Set if S3C2443/S3C2416 style hardware.
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* @nr_windows: The number of windows.
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* @vidtcon: The base for the VIDTCONx registers
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* @wincon: The base for the WINxCON registers.
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* @winmap: The base for the WINxMAP registers.
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* @keycon: The abse for the WxKEYCON registers.
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* @buf_start: Offset of buffer start registers.
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* @buf_size: Offset of buffer size registers.
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* @buf_end: Offset of buffer end registers.
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* @osd: The base for the OSD registers.
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* @palette: Address of palette memory, or 0 if none.
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* @has_prtcon: Set if has PRTCON register.
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* @has_shadowcon: Set if has SHADOWCON register.
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* @has_clksel: Set if VIDCON0 register has CLKSEL bit.
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struct s3c_fb_variant {
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unsigned int is_2443:1;
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unsigned short nr_windows;
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unsigned short vidtcon;
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unsigned short wincon;
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unsigned short winmap;
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unsigned short keycon;
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unsigned short buf_start;
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unsigned short buf_end;
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unsigned short buf_size;
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unsigned short osd_stride;
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unsigned short palette[S3C_FB_MAX_WIN];
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unsigned int has_prtcon:1;
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unsigned int has_shadowcon:1;
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unsigned int has_clksel:1;
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* struct s3c_fb_win_variant
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* @has_osd_c: Set if has OSD C register.
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* @has_osd_d: Set if has OSD D register.
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* @has_osd_alpha: Set if can change alpha transparency for a window.
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* @palette_sz: Size of palette in entries.
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* @palette_16bpp: Set if palette is 16bits wide.
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* @osd_size_off: If != 0, supports setting up OSD for a window; the appropriate
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* register is located at the given offset from OSD_BASE.
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* @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
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* valid_bpp bit x is set if (x+1)BPP is supported.
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struct s3c_fb_win_variant {
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unsigned int has_osd_c:1;
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unsigned int has_osd_d:1;
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unsigned int has_osd_alpha:1;
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unsigned int palette_16bpp:1;
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unsigned short osd_size_off;
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unsigned short palette_sz;
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* struct s3c_fb_driverdata - per-device type driver data for init time.
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* @variant: The variant information for this driver.
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* @win: The window information for each window.
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struct s3c_fb_driverdata {
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struct s3c_fb_variant variant;
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struct s3c_fb_win_variant *win[S3C_FB_MAX_WIN];
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* struct s3c_fb_palette - palette information
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* @g: Green bitfield.
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* @a: Alpha bitfield.
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struct s3c_fb_palette {
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struct fb_bitfield r;
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struct fb_bitfield g;
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struct fb_bitfield b;
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struct fb_bitfield a;
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* struct s3c_fb_win - per window private data for each framebuffer.
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* @windata: The platform data supplied for the window configuration.
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* @parent: The hardware that this window is part of.
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* @fbinfo: Pointer pack to the framebuffer info for this window.
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* @varint: The variant information for this window.
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* @palette_buffer: Buffer/cache to hold palette entries.
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* @pseudo_palette: For use in TRUECOLOUR modes for entries 0..15/
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* @index: The window number of this window.
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* @palette: The bitfields for changing r/g/b into a hardware palette entry.
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struct s3c_fb_pd_win *windata;
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struct s3c_fb *parent;
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struct fb_info *fbinfo;
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struct s3c_fb_palette palette;
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struct s3c_fb_win_variant variant;
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u32 pseudo_palette[16];
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* struct s3c_fb_vsync - vsync information
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* @wait: a queue for processes waiting for vsync
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* @count: vsync interrupt count
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struct s3c_fb_vsync {
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wait_queue_head_t wait;
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* struct s3c_fb - overall hardware state of the hardware
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* @slock: The spinlock protection for this data sturcture.
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* @dev: The device that we bound to, for printing, etc.
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* @regs_res: The resource we claimed for the IO registers.
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* @bus_clk: The clk (hclk) feeding our interface and possibly pixclk.
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* @lcd_clk: The clk (sclk) feeding pixclk.
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* @regs: The mapped hardware registers.
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* @variant: Variant information for this hardware.
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* @enabled: A bitmask of enabled hardware windows.
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* @pdata: The platform configuration data passed with the device.
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* @windows: The hardware windows that have been claimed.
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* @irq_no: IRQ line number
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* @irq_flags: irq flags
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* @vsync_info: VSYNC-related information (count, queues...)
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struct resource *regs_res;
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struct s3c_fb_variant variant;
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unsigned char enabled;
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struct s3c_fb_platdata *pdata;
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struct s3c_fb_win *windows[S3C_FB_MAX_WIN];
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unsigned long irq_flags;
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struct s3c_fb_vsync vsync_info;
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* s3c_fb_validate_win_bpp - validate the bits-per-pixel for this mode.
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* @win: The device window.
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* @bpp: The bit depth.
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static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp)
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return win->variant.valid_bpp & VALID_BPP(bpp);
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* s3c_fb_check_var() - framebuffer layer request to verify a given mode.
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* @var: The screen information to verify.
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* @info: The framebuffer device.
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* Framebuffer layer call to verify the given information and allow us to
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* update various information depending on the hardware capabilities.
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static int s3c_fb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info)
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struct s3c_fb_win *win = info->par;
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struct s3c_fb *sfb = win->parent;
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dev_dbg(sfb->dev, "checking parameters\n");
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var->xres_virtual = max(var->xres_virtual, var->xres);
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var->yres_virtual = max(var->yres_virtual, var->yres);
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if (!s3c_fb_validate_win_bpp(win, var->bits_per_pixel)) {
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dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n",
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win->index, var->bits_per_pixel);
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/* always ensure these are zero, for drop through cases below */
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var->transp.offset = 0;
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var->transp.length = 0;
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switch (var->bits_per_pixel) {
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if (sfb->variant.palette[win->index] != 0) {
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/* non palletised, A:1,R:2,G:3,B:2 mode */
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var->green.offset = 2;
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var->blue.offset = 0;
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var->green.length = 3;
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var->blue.length = 2;
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var->transp.offset = 7;
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var->transp.length = 1;
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var->red.length = var->bits_per_pixel;
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var->green = var->red;
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var->blue = var->red;
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/* 666 with one bit alpha/transparency */
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var->transp.offset = 18;
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var->transp.length = 1;
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var->bits_per_pixel = 32;
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var->red.offset = 12;
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var->green.offset = 6;
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var->blue.offset = 0;
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var->green.length = 6;
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var->blue.length = 6;
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/* 16 bpp, 565 format */
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var->red.offset = 11;
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var->green.offset = 5;
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var->blue.offset = 0;
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var->green.length = 6;
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var->blue.length = 5;
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var->transp.length = var->bits_per_pixel - 24;
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var->transp.offset = 24;
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/* our 24bpp is unpacked, so 32bpp */
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var->bits_per_pixel = 32;
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var->red.offset = 16;
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var->green.offset = 8;
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var->green.length = 8;
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var->blue.offset = 0;
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var->blue.length = 8;
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dev_err(sfb->dev, "invalid bpp\n");
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dev_dbg(sfb->dev, "%s: verified parameters\n", __func__);
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* s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock.
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* @sfb: The hardware state.
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* @pixclock: The pixel clock wanted, in picoseconds.
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* Given the specified pixel clock, work out the necessary divider to get
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* close to the output frequency.
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static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk)
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unsigned long long tmp;
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if (sfb->variant.has_clksel)
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clk = clk_get_rate(sfb->bus_clk);
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clk = clk_get_rate(sfb->lcd_clk);
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tmp = (unsigned long long)clk;
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do_div(tmp, 1000000000UL);
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result = (unsigned int)tmp / 1000;
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dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n",
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pixclk, clk, result, clk / result);
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* s3c_fb_align_word() - align pixel count to word boundary
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* @bpp: The number of bits per pixel
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* @pix: The value to be aligned.
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* Align the given pixel count so that it will start on an 32bit word
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static int s3c_fb_align_word(unsigned int bpp, unsigned int pix)
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pix_per_word = (8 * 32) / bpp;
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return ALIGN(pix, pix_per_word);
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* vidosd_set_size() - set OSD size for a window
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* @win: the window to set OSD size for
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* @size: OSD size register value
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static void vidosd_set_size(struct s3c_fb_win *win, u32 size)
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struct s3c_fb *sfb = win->parent;
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/* OSD can be set up if osd_size_off != 0 for this window */
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if (win->variant.osd_size_off)
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writel(size, sfb->regs + OSD_BASE(win->index, sfb->variant)
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+ win->variant.osd_size_off);
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* vidosd_set_alpha() - set alpha transparency for a window
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* @win: the window to set OSD size for
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* @alpha: alpha register value
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static void vidosd_set_alpha(struct s3c_fb_win *win, u32 alpha)
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struct s3c_fb *sfb = win->parent;
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if (win->variant.has_osd_alpha)
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writel(alpha, sfb->regs + VIDOSD_C(win->index, sfb->variant));
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* shadow_protect_win() - disable updating values from shadow registers at vsync
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* @win: window to protect registers for
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* @protect: 1 to protect (disable updates)
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static void shadow_protect_win(struct s3c_fb_win *win, bool protect)
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struct s3c_fb *sfb = win->parent;
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if (sfb->variant.has_prtcon) {
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writel(PRTCON_PROTECT, sfb->regs + PRTCON);
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} else if (sfb->variant.has_shadowcon) {
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reg = readl(sfb->regs + SHADOWCON);
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writel(reg | SHADOWCON_WINx_PROTECT(win->index),
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sfb->regs + SHADOWCON);
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if (sfb->variant.has_prtcon) {
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writel(0, sfb->regs + PRTCON);
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} else if (sfb->variant.has_shadowcon) {
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reg = readl(sfb->regs + SHADOWCON);
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writel(reg & ~SHADOWCON_WINx_PROTECT(win->index),
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sfb->regs + SHADOWCON);
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* s3c_fb_set_par() - framebuffer request to set new framebuffer state.
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* @info: The framebuffer to change.
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* Framebuffer layer request to set a new mode for the specified framebuffer
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static int s3c_fb_set_par(struct fb_info *info)
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struct fb_var_screeninfo *var = &info->var;
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struct s3c_fb_win *win = info->par;
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struct s3c_fb *sfb = win->parent;
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void __iomem *regs = sfb->regs;
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void __iomem *buf = regs;
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int win_no = win->index;
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dev_dbg(sfb->dev, "setting framebuffer parameters\n");
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shadow_protect_win(win, 1);
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switch (var->bits_per_pixel) {
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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if (win->variant.palette_sz >= 256)
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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info->fix.visual = FB_VISUAL_MONO01;
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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info->fix.line_length = (var->xres_virtual * var->bits_per_pixel) / 8;
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info->fix.xpanstep = info->var.xres_virtual > info->var.xres ? 1 : 0;
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info->fix.ypanstep = info->var.yres_virtual > info->var.yres ? 1 : 0;
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/* disable the window whilst we update it */
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writel(0, regs + WINCON(win_no));
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/* use platform specified window as the basis for the lcd timings */
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if (win_no == sfb->pdata->default_win) {
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clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock);
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data = sfb->pdata->vidcon0;
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data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
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data |= VIDCON0_CLKVAL_F(clkdiv-1) | VIDCON0_CLKDIR;
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data &= ~VIDCON0_CLKDIR; /* 1:1 clock */
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/* write the timing data to the panel */
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if (sfb->variant.is_2443)
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data |= VIDCON0_ENVID | VIDCON0_ENVID_F;
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writel(data, regs + VIDCON0);
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data = VIDTCON0_VBPD(var->upper_margin - 1) |
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VIDTCON0_VFPD(var->lower_margin - 1) |
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VIDTCON0_VSPW(var->vsync_len - 1);
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writel(data, regs + sfb->variant.vidtcon);
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data = VIDTCON1_HBPD(var->left_margin - 1) |
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VIDTCON1_HFPD(var->right_margin - 1) |
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VIDTCON1_HSPW(var->hsync_len - 1);
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writel(data, regs + sfb->variant.vidtcon + 4);
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data = VIDTCON2_LINEVAL(var->yres - 1) |
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VIDTCON2_HOZVAL(var->xres - 1);
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writel(data, regs + sfb->variant.vidtcon + 8);
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/* write the buffer address */
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/* start and end registers stride is 8 */
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buf = regs + win_no * 8;
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writel(info->fix.smem_start, buf + sfb->variant.buf_start);
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data = info->fix.smem_start + info->fix.line_length * var->yres;
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writel(data, buf + sfb->variant.buf_end);
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pagewidth = (var->xres * var->bits_per_pixel) >> 3;
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data = VIDW_BUF_SIZE_OFFSET(info->fix.line_length - pagewidth) |
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VIDW_BUF_SIZE_PAGEWIDTH(pagewidth);
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writel(data, regs + sfb->variant.buf_size + (win_no * 4));
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/* write 'OSD' registers to control position of framebuffer */
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data = VIDOSDxA_TOPLEFT_X(0) | VIDOSDxA_TOPLEFT_Y(0);
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writel(data, regs + VIDOSD_A(win_no, sfb->variant));
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data = VIDOSDxB_BOTRIGHT_X(s3c_fb_align_word(var->bits_per_pixel,
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VIDOSDxB_BOTRIGHT_Y(var->yres - 1);
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writel(data, regs + VIDOSD_B(win_no, sfb->variant));
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data = var->xres * var->yres;
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alpha = VIDISD14C_ALPHA1_R(0xf) |
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VIDISD14C_ALPHA1_G(0xf) |
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VIDISD14C_ALPHA1_B(0xf);
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vidosd_set_alpha(win, alpha);
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vidosd_set_size(win, data);
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/* Enable DMA channel for this window */
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if (sfb->variant.has_shadowcon) {
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data = readl(sfb->regs + SHADOWCON);
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data |= SHADOWCON_CHx_ENABLE(win_no);
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writel(data, sfb->regs + SHADOWCON);
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data = WINCONx_ENWIN;
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/* note, since we have to round up the bits-per-pixel, we end up
579
* relying on the bitfield information for r/g/b/a to work out
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* exactly which mode of operation is intended. */
582
switch (var->bits_per_pixel) {
584
data |= WINCON0_BPPMODE_1BPP;
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data |= WINCONx_BITSWP;
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data |= WINCONx_BURSTLEN_4WORD;
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data |= WINCON0_BPPMODE_2BPP;
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data |= WINCONx_BITSWP;
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data |= WINCONx_BURSTLEN_8WORD;
594
data |= WINCON0_BPPMODE_4BPP;
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data |= WINCONx_BITSWP;
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data |= WINCONx_BURSTLEN_8WORD;
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if (var->transp.length != 0)
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data |= WINCON1_BPPMODE_8BPP_1232;
602
data |= WINCON0_BPPMODE_8BPP_PALETTE;
603
data |= WINCONx_BURSTLEN_8WORD;
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data |= WINCONx_BYTSWP;
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if (var->transp.length != 0)
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data |= WINCON1_BPPMODE_16BPP_A1555;
610
data |= WINCON0_BPPMODE_16BPP_565;
611
data |= WINCONx_HAWSWP;
612
data |= WINCONx_BURSTLEN_16WORD;
616
if (var->red.length == 6) {
617
if (var->transp.length != 0)
618
data |= WINCON1_BPPMODE_19BPP_A1666;
620
data |= WINCON1_BPPMODE_18BPP_666;
621
} else if (var->transp.length == 1)
622
data |= WINCON1_BPPMODE_25BPP_A1888
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else if (var->transp.length == 4)
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data |= WINCON1_BPPMODE_28BPP_A4888
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| WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
628
data |= WINCON0_BPPMODE_24BPP_888;
630
data |= WINCONx_WSWP;
631
data |= WINCONx_BURSTLEN_16WORD;
635
/* Enable the colour keying for the window below this one */
637
u32 keycon0_data = 0, keycon1_data = 0;
638
void __iomem *keycon = regs + sfb->variant.keycon;
640
keycon0_data = ~(WxKEYCON0_KEYBL_EN |
642
WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
644
keycon1_data = WxKEYCON1_COLVAL(0xffffff);
646
keycon += (win_no - 1) * 8;
648
writel(keycon0_data, keycon + WKEYCON0);
649
writel(keycon1_data, keycon + WKEYCON1);
652
writel(data, regs + sfb->variant.wincon + (win_no * 4));
653
writel(0x0, regs + sfb->variant.winmap + (win_no * 4));
655
shadow_protect_win(win, 0);
661
* s3c_fb_update_palette() - set or schedule a palette update.
662
* @sfb: The hardware information.
663
* @win: The window being updated.
664
* @reg: The palette index being changed.
665
* @value: The computed palette value.
667
* Change the value of a palette register, either by directly writing to
668
* the palette (this requires the palette RAM to be disconnected from the
669
* hardware whilst this is in progress) or schedule the update for later.
671
* At the moment, since we have no VSYNC interrupt support, we simply set
672
* the palette entry directly.
674
static void s3c_fb_update_palette(struct s3c_fb *sfb,
675
struct s3c_fb_win *win,
679
void __iomem *palreg;
682
palreg = sfb->regs + sfb->variant.palette[win->index];
684
dev_dbg(sfb->dev, "%s: win %d, reg %d (%p): %08x\n",
685
__func__, win->index, reg, palreg, value);
687
win->palette_buffer[reg] = value;
689
palcon = readl(sfb->regs + WPALCON);
690
writel(palcon | WPALCON_PAL_UPDATE, sfb->regs + WPALCON);
692
if (win->variant.palette_16bpp)
693
writew(value, palreg + (reg * 2));
695
writel(value, palreg + (reg * 4));
697
writel(palcon, sfb->regs + WPALCON);
700
static inline unsigned int chan_to_field(unsigned int chan,
701
struct fb_bitfield *bf)
704
chan >>= 16 - bf->length;
705
return chan << bf->offset;
709
* s3c_fb_setcolreg() - framebuffer layer request to change palette.
710
* @regno: The palette index to change.
711
* @red: The red field for the palette data.
712
* @green: The green field for the palette data.
713
* @blue: The blue field for the palette data.
714
* @trans: The transparency (alpha) field for the palette data.
715
* @info: The framebuffer being changed.
717
static int s3c_fb_setcolreg(unsigned regno,
718
unsigned red, unsigned green, unsigned blue,
719
unsigned transp, struct fb_info *info)
721
struct s3c_fb_win *win = info->par;
722
struct s3c_fb *sfb = win->parent;
725
dev_dbg(sfb->dev, "%s: win %d: %d => rgb=%d/%d/%d\n",
726
__func__, win->index, regno, red, green, blue);
728
switch (info->fix.visual) {
729
case FB_VISUAL_TRUECOLOR:
730
/* true-colour, use pseudo-palette */
733
u32 *pal = info->pseudo_palette;
735
val = chan_to_field(red, &info->var.red);
736
val |= chan_to_field(green, &info->var.green);
737
val |= chan_to_field(blue, &info->var.blue);
743
case FB_VISUAL_PSEUDOCOLOR:
744
if (regno < win->variant.palette_sz) {
745
val = chan_to_field(red, &win->palette.r);
746
val |= chan_to_field(green, &win->palette.g);
747
val |= chan_to_field(blue, &win->palette.b);
749
s3c_fb_update_palette(sfb, win, regno, val);
755
return 1; /* unknown type */
762
* s3c_fb_enable() - Set the state of the main LCD output
763
* @sfb: The main framebuffer state.
764
* @enable: The state to set.
766
static void s3c_fb_enable(struct s3c_fb *sfb, int enable)
768
u32 vidcon0 = readl(sfb->regs + VIDCON0);
771
vidcon0 |= VIDCON0_ENVID | VIDCON0_ENVID_F;
773
/* see the note in the framebuffer datasheet about
774
* why you cannot take both of these bits down at the
777
if (!(vidcon0 & VIDCON0_ENVID))
780
vidcon0 |= VIDCON0_ENVID;
781
vidcon0 &= ~VIDCON0_ENVID_F;
784
writel(vidcon0, sfb->regs + VIDCON0);
788
* s3c_fb_blank() - blank or unblank the given window
789
* @blank_mode: The blank state from FB_BLANK_*
790
* @info: The framebuffer to blank.
792
* Framebuffer layer request to change the power state.
794
static int s3c_fb_blank(int blank_mode, struct fb_info *info)
796
struct s3c_fb_win *win = info->par;
797
struct s3c_fb *sfb = win->parent;
798
unsigned int index = win->index;
801
dev_dbg(sfb->dev, "blank mode %d\n", blank_mode);
803
wincon = readl(sfb->regs + sfb->variant.wincon + (index * 4));
805
switch (blank_mode) {
806
case FB_BLANK_POWERDOWN:
807
wincon &= ~WINCONx_ENWIN;
808
sfb->enabled &= ~(1 << index);
809
/* fall through to FB_BLANK_NORMAL */
811
case FB_BLANK_NORMAL:
812
/* disable the DMA and display 0x0 (black) */
813
writel(WINxMAP_MAP | WINxMAP_MAP_COLOUR(0x0),
814
sfb->regs + sfb->variant.winmap + (index * 4));
817
case FB_BLANK_UNBLANK:
818
writel(0x0, sfb->regs + sfb->variant.winmap + (index * 4));
819
wincon |= WINCONx_ENWIN;
820
sfb->enabled |= (1 << index);
823
case FB_BLANK_VSYNC_SUSPEND:
824
case FB_BLANK_HSYNC_SUSPEND:
829
writel(wincon, sfb->regs + sfb->variant.wincon + (index * 4));
831
/* Check the enabled state to see if we need to be running the
832
* main LCD interface, as if there are no active windows then
833
* it is highly likely that we also do not need to output
837
/* We could do something like the following code, but the current
838
* system of using framebuffer events means that we cannot make
839
* the distinction between just window 0 being inactive and all
840
* the windows being down.
842
* s3c_fb_enable(sfb, sfb->enabled ? 1 : 0);
845
/* we're stuck with this until we can do something about overriding
846
* the power control using the blanking event for a single fb.
848
if (index == sfb->pdata->default_win)
849
s3c_fb_enable(sfb, blank_mode != FB_BLANK_POWERDOWN ? 1 : 0);
855
* s3c_fb_pan_display() - Pan the display.
857
* Note that the offsets can be written to the device at any time, as their
858
* values are latched at each vsync automatically. This also means that only
859
* the last call to this function will have any effect on next vsync, but
860
* there is no need to sleep waiting for it to prevent tearing.
862
* @var: The screen information to verify.
863
* @info: The framebuffer device.
865
static int s3c_fb_pan_display(struct fb_var_screeninfo *var,
866
struct fb_info *info)
868
struct s3c_fb_win *win = info->par;
869
struct s3c_fb *sfb = win->parent;
870
void __iomem *buf = sfb->regs + win->index * 8;
871
unsigned int start_boff, end_boff;
873
/* Offset in bytes to the start of the displayed area */
874
start_boff = var->yoffset * info->fix.line_length;
875
/* X offset depends on the current bpp */
876
if (info->var.bits_per_pixel >= 8) {
877
start_boff += var->xoffset * (info->var.bits_per_pixel >> 3);
879
switch (info->var.bits_per_pixel) {
881
start_boff += var->xoffset >> 1;
884
start_boff += var->xoffset >> 2;
887
start_boff += var->xoffset >> 3;
890
dev_err(sfb->dev, "invalid bpp\n");
894
/* Offset in bytes to the end of the displayed area */
895
end_boff = start_boff + info->var.yres * info->fix.line_length;
897
/* Temporarily turn off per-vsync update from shadow registers until
898
* both start and end addresses are updated to prevent corruption */
899
shadow_protect_win(win, 1);
901
writel(info->fix.smem_start + start_boff, buf + sfb->variant.buf_start);
902
writel(info->fix.smem_start + end_boff, buf + sfb->variant.buf_end);
904
shadow_protect_win(win, 0);
910
* s3c_fb_enable_irq() - enable framebuffer interrupts
911
* @sfb: main hardware state
913
static void s3c_fb_enable_irq(struct s3c_fb *sfb)
915
void __iomem *regs = sfb->regs;
918
if (!test_and_set_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
919
/* IRQ disabled, enable it */
920
irq_ctrl_reg = readl(regs + VIDINTCON0);
922
irq_ctrl_reg |= VIDINTCON0_INT_ENABLE;
923
irq_ctrl_reg |= VIDINTCON0_INT_FRAME;
925
irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL0_MASK;
926
irq_ctrl_reg |= VIDINTCON0_FRAMESEL0_VSYNC;
927
irq_ctrl_reg &= ~VIDINTCON0_FRAMESEL1_MASK;
928
irq_ctrl_reg |= VIDINTCON0_FRAMESEL1_NONE;
930
writel(irq_ctrl_reg, regs + VIDINTCON0);
935
* s3c_fb_disable_irq() - disable framebuffer interrupts
936
* @sfb: main hardware state
938
static void s3c_fb_disable_irq(struct s3c_fb *sfb)
940
void __iomem *regs = sfb->regs;
943
if (test_and_clear_bit(S3C_FB_VSYNC_IRQ_EN, &sfb->irq_flags)) {
944
/* IRQ enabled, disable it */
945
irq_ctrl_reg = readl(regs + VIDINTCON0);
947
irq_ctrl_reg &= ~VIDINTCON0_INT_FRAME;
948
irq_ctrl_reg &= ~VIDINTCON0_INT_ENABLE;
950
writel(irq_ctrl_reg, regs + VIDINTCON0);
954
static irqreturn_t s3c_fb_irq(int irq, void *dev_id)
956
struct s3c_fb *sfb = dev_id;
957
void __iomem *regs = sfb->regs;
960
spin_lock(&sfb->slock);
962
irq_sts_reg = readl(regs + VIDINTCON1);
964
if (irq_sts_reg & VIDINTCON1_INT_FRAME) {
966
/* VSYNC interrupt, accept it */
967
writel(VIDINTCON1_INT_FRAME, regs + VIDINTCON1);
969
sfb->vsync_info.count++;
970
wake_up_interruptible(&sfb->vsync_info.wait);
973
/* We only support waiting for VSYNC for now, so it's safe
974
* to always disable irqs here.
976
s3c_fb_disable_irq(sfb);
978
spin_unlock(&sfb->slock);
983
* s3c_fb_wait_for_vsync() - sleep until next VSYNC interrupt or timeout
984
* @sfb: main hardware state
987
static int s3c_fb_wait_for_vsync(struct s3c_fb *sfb, u32 crtc)
995
count = sfb->vsync_info.count;
996
s3c_fb_enable_irq(sfb);
997
ret = wait_event_interruptible_timeout(sfb->vsync_info.wait,
998
count != sfb->vsync_info.count,
999
msecs_to_jiffies(VSYNC_TIMEOUT_MSEC));
1006
static int s3c_fb_ioctl(struct fb_info *info, unsigned int cmd,
1009
struct s3c_fb_win *win = info->par;
1010
struct s3c_fb *sfb = win->parent;
1015
case FBIO_WAITFORVSYNC:
1016
if (get_user(crtc, (u32 __user *)arg)) {
1021
ret = s3c_fb_wait_for_vsync(sfb, crtc);
1030
static int s3c_fb_open(struct fb_info *info, int user)
1032
struct s3c_fb_win *win = info->par;
1033
struct s3c_fb *sfb = win->parent;
1035
pm_runtime_get_sync(sfb->dev);
1040
static int s3c_fb_release(struct fb_info *info, int user)
1042
struct s3c_fb_win *win = info->par;
1043
struct s3c_fb *sfb = win->parent;
1045
pm_runtime_put_sync(sfb->dev);
1050
static struct fb_ops s3c_fb_ops = {
1051
.owner = THIS_MODULE,
1052
.fb_open = s3c_fb_open,
1053
.fb_release = s3c_fb_release,
1054
.fb_check_var = s3c_fb_check_var,
1055
.fb_set_par = s3c_fb_set_par,
1056
.fb_blank = s3c_fb_blank,
1057
.fb_setcolreg = s3c_fb_setcolreg,
1058
.fb_fillrect = cfb_fillrect,
1059
.fb_copyarea = cfb_copyarea,
1060
.fb_imageblit = cfb_imageblit,
1061
.fb_pan_display = s3c_fb_pan_display,
1062
.fb_ioctl = s3c_fb_ioctl,
1066
* s3c_fb_missing_pixclock() - calculates pixel clock
1067
* @mode: The video mode to change.
1069
* Calculate the pixel clock when none has been given through platform data.
1071
static void __devinit s3c_fb_missing_pixclock(struct fb_videomode *mode)
1073
u64 pixclk = 1000000000000ULL;
1076
div = mode->left_margin + mode->hsync_len + mode->right_margin +
1078
div *= mode->upper_margin + mode->vsync_len + mode->lower_margin +
1080
div *= mode->refresh ? : 60;
1082
do_div(pixclk, div);
1084
mode->pixclock = pixclk;
1088
* s3c_fb_alloc_memory() - allocate display memory for framebuffer window
1089
* @sfb: The base resources for the hardware.
1090
* @win: The window to initialise memory for.
1092
* Allocate memory for the given framebuffer.
1094
static int __devinit s3c_fb_alloc_memory(struct s3c_fb *sfb,
1095
struct s3c_fb_win *win)
1097
struct s3c_fb_pd_win *windata = win->windata;
1098
unsigned int real_size, virt_size, size;
1099
struct fb_info *fbi = win->fbinfo;
1102
dev_dbg(sfb->dev, "allocating memory for display\n");
1104
real_size = windata->win_mode.xres * windata->win_mode.yres;
1105
virt_size = windata->virtual_x * windata->virtual_y;
1107
dev_dbg(sfb->dev, "real_size=%u (%u.%u), virt_size=%u (%u.%u)\n",
1108
real_size, windata->win_mode.xres, windata->win_mode.yres,
1109
virt_size, windata->virtual_x, windata->virtual_y);
1111
size = (real_size > virt_size) ? real_size : virt_size;
1112
size *= (windata->max_bpp > 16) ? 32 : windata->max_bpp;
1115
fbi->fix.smem_len = size;
1116
size = PAGE_ALIGN(size);
1118
dev_dbg(sfb->dev, "want %u bytes for window\n", size);
1120
fbi->screen_base = dma_alloc_writecombine(sfb->dev, size,
1121
&map_dma, GFP_KERNEL);
1122
if (!fbi->screen_base)
1125
dev_dbg(sfb->dev, "mapped %x to %p\n",
1126
(unsigned int)map_dma, fbi->screen_base);
1128
memset(fbi->screen_base, 0x0, size);
1129
fbi->fix.smem_start = map_dma;
1135
* s3c_fb_free_memory() - free the display memory for the given window
1136
* @sfb: The base resources for the hardware.
1137
* @win: The window to free the display memory for.
1139
* Free the display memory allocated by s3c_fb_alloc_memory().
1141
static void s3c_fb_free_memory(struct s3c_fb *sfb, struct s3c_fb_win *win)
1143
struct fb_info *fbi = win->fbinfo;
1145
if (fbi->screen_base)
1146
dma_free_writecombine(sfb->dev, PAGE_ALIGN(fbi->fix.smem_len),
1147
fbi->screen_base, fbi->fix.smem_start);
1151
* s3c_fb_release_win() - release resources for a framebuffer window.
1152
* @win: The window to cleanup the resources for.
1154
* Release the resources that where claimed for the hardware window,
1155
* such as the framebuffer instance and any memory claimed for it.
1157
static void s3c_fb_release_win(struct s3c_fb *sfb, struct s3c_fb_win *win)
1162
if (sfb->variant.has_shadowcon) {
1163
data = readl(sfb->regs + SHADOWCON);
1164
data &= ~SHADOWCON_CHx_ENABLE(win->index);
1165
data &= ~SHADOWCON_CHx_LOCAL_ENABLE(win->index);
1166
writel(data, sfb->regs + SHADOWCON);
1168
unregister_framebuffer(win->fbinfo);
1169
if (win->fbinfo->cmap.len)
1170
fb_dealloc_cmap(&win->fbinfo->cmap);
1171
s3c_fb_free_memory(sfb, win);
1172
framebuffer_release(win->fbinfo);
1177
* s3c_fb_probe_win() - register an hardware window
1178
* @sfb: The base resources for the hardware
1179
* @variant: The variant information for this window.
1180
* @res: Pointer to where to place the resultant window.
1182
* Allocate and do the basic initialisation for one of the hardware's graphics
1185
static int __devinit s3c_fb_probe_win(struct s3c_fb *sfb, unsigned int win_no,
1186
struct s3c_fb_win_variant *variant,
1187
struct s3c_fb_win **res)
1189
struct fb_var_screeninfo *var;
1190
struct fb_videomode *initmode;
1191
struct s3c_fb_pd_win *windata;
1192
struct s3c_fb_win *win;
1193
struct fb_info *fbinfo;
1197
dev_dbg(sfb->dev, "probing window %d, variant %p\n", win_no, variant);
1199
init_waitqueue_head(&sfb->vsync_info.wait);
1201
palette_size = variant->palette_sz * 4;
1203
fbinfo = framebuffer_alloc(sizeof(struct s3c_fb_win) +
1204
palette_size * sizeof(u32), sfb->dev);
1206
dev_err(sfb->dev, "failed to allocate framebuffer\n");
1210
windata = sfb->pdata->win[win_no];
1211
initmode = &windata->win_mode;
1213
WARN_ON(windata->max_bpp == 0);
1214
WARN_ON(windata->win_mode.xres == 0);
1215
WARN_ON(windata->win_mode.yres == 0);
1220
win->variant = *variant;
1221
win->fbinfo = fbinfo;
1223
win->windata = windata;
1224
win->index = win_no;
1225
win->palette_buffer = (u32 *)(win + 1);
1227
ret = s3c_fb_alloc_memory(sfb, win);
1229
dev_err(sfb->dev, "failed to allocate display memory\n");
1233
/* setup the r/b/g positions for the window's palette */
1234
if (win->variant.palette_16bpp) {
1235
/* Set RGB 5:6:5 as default */
1236
win->palette.r.offset = 11;
1237
win->palette.r.length = 5;
1238
win->palette.g.offset = 5;
1239
win->palette.g.length = 6;
1240
win->palette.b.offset = 0;
1241
win->palette.b.length = 5;
1244
/* Set 8bpp or 8bpp and 1bit alpha */
1245
win->palette.r.offset = 16;
1246
win->palette.r.length = 8;
1247
win->palette.g.offset = 8;
1248
win->palette.g.length = 8;
1249
win->palette.b.offset = 0;
1250
win->palette.b.length = 8;
1253
/* setup the initial video mode from the window */
1254
fb_videomode_to_var(&fbinfo->var, initmode);
1256
fbinfo->fix.type = FB_TYPE_PACKED_PIXELS;
1257
fbinfo->fix.accel = FB_ACCEL_NONE;
1258
fbinfo->var.activate = FB_ACTIVATE_NOW;
1259
fbinfo->var.vmode = FB_VMODE_NONINTERLACED;
1260
fbinfo->var.bits_per_pixel = windata->default_bpp;
1261
fbinfo->fbops = &s3c_fb_ops;
1262
fbinfo->flags = FBINFO_FLAG_DEFAULT;
1263
fbinfo->pseudo_palette = &win->pseudo_palette;
1265
/* prepare to actually start the framebuffer */
1267
ret = s3c_fb_check_var(&fbinfo->var, fbinfo);
1269
dev_err(sfb->dev, "check_var failed on initial video params\n");
1273
/* create initial colour map */
1275
ret = fb_alloc_cmap(&fbinfo->cmap, win->variant.palette_sz, 1);
1277
fb_set_cmap(&fbinfo->cmap, fbinfo);
1279
dev_err(sfb->dev, "failed to allocate fb cmap\n");
1281
s3c_fb_set_par(fbinfo);
1283
dev_dbg(sfb->dev, "about to register framebuffer\n");
1285
/* run the check_var and set_par on our configuration. */
1287
ret = register_framebuffer(fbinfo);
1289
dev_err(sfb->dev, "failed to register framebuffer\n");
1293
dev_info(sfb->dev, "window %d: fb %s\n", win_no, fbinfo->fix.id);
1299
* s3c_fb_clear_win() - clear hardware window registers.
1300
* @sfb: The base resources for the hardware.
1301
* @win: The window to process.
1303
* Reset the specific window registers to a known state.
1305
static void s3c_fb_clear_win(struct s3c_fb *sfb, int win)
1307
void __iomem *regs = sfb->regs;
1310
writel(0, regs + sfb->variant.wincon + (win * 4));
1311
writel(0, regs + VIDOSD_A(win, sfb->variant));
1312
writel(0, regs + VIDOSD_B(win, sfb->variant));
1313
writel(0, regs + VIDOSD_C(win, sfb->variant));
1314
reg = readl(regs + SHADOWCON);
1315
writel(reg & ~SHADOWCON_WINx_PROTECT(win), regs + SHADOWCON);
1318
static int __devinit s3c_fb_probe(struct platform_device *pdev)
1320
const struct platform_device_id *platid;
1321
struct s3c_fb_driverdata *fbdrv;
1322
struct device *dev = &pdev->dev;
1323
struct s3c_fb_platdata *pd;
1325
struct resource *res;
1329
platid = platform_get_device_id(pdev);
1330
fbdrv = (struct s3c_fb_driverdata *)platid->driver_data;
1332
if (fbdrv->variant.nr_windows > S3C_FB_MAX_WIN) {
1333
dev_err(dev, "too many windows, cannot attach\n");
1337
pd = pdev->dev.platform_data;
1339
dev_err(dev, "no platform data specified\n");
1343
sfb = kzalloc(sizeof(struct s3c_fb), GFP_KERNEL);
1345
dev_err(dev, "no memory for framebuffers\n");
1349
dev_dbg(dev, "allocate new framebuffer %p\n", sfb);
1353
sfb->variant = fbdrv->variant;
1355
spin_lock_init(&sfb->slock);
1357
sfb->bus_clk = clk_get(dev, "lcd");
1358
if (IS_ERR(sfb->bus_clk)) {
1359
dev_err(dev, "failed to get bus clock\n");
1360
ret = PTR_ERR(sfb->bus_clk);
1364
clk_enable(sfb->bus_clk);
1366
if (!sfb->variant.has_clksel) {
1367
sfb->lcd_clk = clk_get(dev, "sclk_fimd");
1368
if (IS_ERR(sfb->lcd_clk)) {
1369
dev_err(dev, "failed to get lcd clock\n");
1370
ret = PTR_ERR(sfb->lcd_clk);
1374
clk_enable(sfb->lcd_clk);
1377
pm_runtime_enable(sfb->dev);
1379
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1381
dev_err(dev, "failed to find registers\n");
1386
sfb->regs_res = request_mem_region(res->start, resource_size(res),
1388
if (!sfb->regs_res) {
1389
dev_err(dev, "failed to claim register region\n");
1394
sfb->regs = ioremap(res->start, resource_size(res));
1396
dev_err(dev, "failed to map registers\n");
1398
goto err_req_region;
1401
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1403
dev_err(dev, "failed to acquire irq resource\n");
1407
sfb->irq_no = res->start;
1408
ret = request_irq(sfb->irq_no, s3c_fb_irq,
1411
dev_err(dev, "irq request failed\n");
1415
dev_dbg(dev, "got resources (regs %p), probing windows\n", sfb->regs);
1417
platform_set_drvdata(pdev, sfb);
1418
pm_runtime_get_sync(sfb->dev);
1420
/* setup gpio and output polarity controls */
1424
writel(pd->vidcon1, sfb->regs + VIDCON1);
1426
/* zero all windows before we do anything */
1428
for (win = 0; win < fbdrv->variant.nr_windows; win++)
1429
s3c_fb_clear_win(sfb, win);
1431
/* initialise colour key controls */
1432
for (win = 0; win < (fbdrv->variant.nr_windows - 1); win++) {
1433
void __iomem *regs = sfb->regs + sfb->variant.keycon;
1436
writel(0xffffff, regs + WKEYCON0);
1437
writel(0xffffff, regs + WKEYCON1);
1440
/* we have the register setup, start allocating framebuffers */
1442
for (win = 0; win < fbdrv->variant.nr_windows; win++) {
1446
if (!pd->win[win]->win_mode.pixclock)
1447
s3c_fb_missing_pixclock(&pd->win[win]->win_mode);
1449
ret = s3c_fb_probe_win(sfb, win, fbdrv->win[win],
1450
&sfb->windows[win]);
1452
dev_err(dev, "failed to create window %d\n", win);
1453
for (; win >= 0; win--)
1454
s3c_fb_release_win(sfb, sfb->windows[win]);
1459
platform_set_drvdata(pdev, sfb);
1460
pm_runtime_put_sync(sfb->dev);
1465
free_irq(sfb->irq_no, sfb);
1471
release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1474
if (!sfb->variant.has_clksel) {
1475
clk_disable(sfb->lcd_clk);
1476
clk_put(sfb->lcd_clk);
1480
clk_disable(sfb->bus_clk);
1481
clk_put(sfb->bus_clk);
1489
* s3c_fb_remove() - Cleanup on module finalisation
1490
* @pdev: The platform device we are bound to.
1492
* Shutdown and then release all the resources that the driver allocated
1493
* on initialisation.
1495
static int __devexit s3c_fb_remove(struct platform_device *pdev)
1497
struct s3c_fb *sfb = platform_get_drvdata(pdev);
1500
pm_runtime_get_sync(sfb->dev);
1502
for (win = 0; win < S3C_FB_MAX_WIN; win++)
1503
if (sfb->windows[win])
1504
s3c_fb_release_win(sfb, sfb->windows[win]);
1506
free_irq(sfb->irq_no, sfb);
1510
if (!sfb->variant.has_clksel) {
1511
clk_disable(sfb->lcd_clk);
1512
clk_put(sfb->lcd_clk);
1515
clk_disable(sfb->bus_clk);
1516
clk_put(sfb->bus_clk);
1518
release_mem_region(sfb->regs_res->start, resource_size(sfb->regs_res));
1520
pm_runtime_put_sync(sfb->dev);
1521
pm_runtime_disable(sfb->dev);
1528
static int s3c_fb_suspend(struct device *dev)
1530
struct platform_device *pdev = to_platform_device(dev);
1531
struct s3c_fb *sfb = platform_get_drvdata(pdev);
1532
struct s3c_fb_win *win;
1535
for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1536
win = sfb->windows[win_no];
1540
/* use the blank function to push into power-down */
1541
s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1544
if (!sfb->variant.has_clksel)
1545
clk_disable(sfb->lcd_clk);
1547
clk_disable(sfb->bus_clk);
1551
static int s3c_fb_resume(struct device *dev)
1553
struct platform_device *pdev = to_platform_device(dev);
1554
struct s3c_fb *sfb = platform_get_drvdata(pdev);
1555
struct s3c_fb_platdata *pd = sfb->pdata;
1556
struct s3c_fb_win *win;
1559
clk_enable(sfb->bus_clk);
1561
if (!sfb->variant.has_clksel)
1562
clk_enable(sfb->lcd_clk);
1564
/* setup gpio and output polarity controls */
1566
writel(pd->vidcon1, sfb->regs + VIDCON1);
1568
/* zero all windows before we do anything */
1569
for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1570
s3c_fb_clear_win(sfb, win_no);
1572
for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1573
void __iomem *regs = sfb->regs + sfb->variant.keycon;
1575
regs += (win_no * 8);
1576
writel(0xffffff, regs + WKEYCON0);
1577
writel(0xffffff, regs + WKEYCON1);
1580
/* restore framebuffers */
1581
for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1582
win = sfb->windows[win_no];
1586
dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1587
s3c_fb_set_par(win->fbinfo);
1593
static int s3c_fb_runtime_suspend(struct device *dev)
1595
struct platform_device *pdev = to_platform_device(dev);
1596
struct s3c_fb *sfb = platform_get_drvdata(pdev);
1597
struct s3c_fb_win *win;
1600
for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
1601
win = sfb->windows[win_no];
1605
/* use the blank function to push into power-down */
1606
s3c_fb_blank(FB_BLANK_POWERDOWN, win->fbinfo);
1609
if (!sfb->variant.has_clksel)
1610
clk_disable(sfb->lcd_clk);
1612
clk_disable(sfb->bus_clk);
1616
static int s3c_fb_runtime_resume(struct device *dev)
1618
struct platform_device *pdev = to_platform_device(dev);
1619
struct s3c_fb *sfb = platform_get_drvdata(pdev);
1620
struct s3c_fb_platdata *pd = sfb->pdata;
1621
struct s3c_fb_win *win;
1624
clk_enable(sfb->bus_clk);
1626
if (!sfb->variant.has_clksel)
1627
clk_enable(sfb->lcd_clk);
1629
/* setup gpio and output polarity controls */
1631
writel(pd->vidcon1, sfb->regs + VIDCON1);
1633
/* zero all windows before we do anything */
1634
for (win_no = 0; win_no < sfb->variant.nr_windows; win_no++)
1635
s3c_fb_clear_win(sfb, win_no);
1637
for (win_no = 0; win_no < sfb->variant.nr_windows - 1; win_no++) {
1638
void __iomem *regs = sfb->regs + sfb->variant.keycon;
1640
regs += (win_no * 8);
1641
writel(0xffffff, regs + WKEYCON0);
1642
writel(0xffffff, regs + WKEYCON1);
1645
/* restore framebuffers */
1646
for (win_no = 0; win_no < S3C_FB_MAX_WIN; win_no++) {
1647
win = sfb->windows[win_no];
1651
dev_dbg(&pdev->dev, "resuming window %d\n", win_no);
1652
s3c_fb_set_par(win->fbinfo);
1659
#define s3c_fb_suspend NULL
1660
#define s3c_fb_resume NULL
1661
#define s3c_fb_runtime_suspend NULL
1662
#define s3c_fb_runtime_resume NULL
1666
#define VALID_BPP124 (VALID_BPP(1) | VALID_BPP(2) | VALID_BPP(4))
1667
#define VALID_BPP1248 (VALID_BPP124 | VALID_BPP(8))
1669
static struct s3c_fb_win_variant s3c_fb_data_64xx_wins[] = {
1672
.osd_size_off = 0x8,
1674
.valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1675
VALID_BPP(18) | VALID_BPP(24)),
1680
.osd_size_off = 0xc,
1683
.valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1684
VALID_BPP(18) | VALID_BPP(19) |
1685
VALID_BPP(24) | VALID_BPP(25) |
1691
.osd_size_off = 0xc,
1695
.valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1696
VALID_BPP(18) | VALID_BPP(19) |
1697
VALID_BPP(24) | VALID_BPP(25) |
1705
.valid_bpp = (VALID_BPP124 | VALID_BPP(16) |
1706
VALID_BPP(18) | VALID_BPP(19) |
1707
VALID_BPP(24) | VALID_BPP(25) |
1715
.valid_bpp = (VALID_BPP(1) | VALID_BPP(2) |
1716
VALID_BPP(16) | VALID_BPP(18) |
1717
VALID_BPP(19) | VALID_BPP(24) |
1718
VALID_BPP(25) | VALID_BPP(28)),
1722
static struct s3c_fb_win_variant s3c_fb_data_s5p_wins[] = {
1725
.osd_size_off = 0x8,
1727
.valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1728
VALID_BPP(15) | VALID_BPP(16) |
1729
VALID_BPP(18) | VALID_BPP(19) |
1730
VALID_BPP(24) | VALID_BPP(25) |
1736
.osd_size_off = 0xc,
1739
.valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1740
VALID_BPP(15) | VALID_BPP(16) |
1741
VALID_BPP(18) | VALID_BPP(19) |
1742
VALID_BPP(24) | VALID_BPP(25) |
1748
.osd_size_off = 0xc,
1751
.valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1752
VALID_BPP(15) | VALID_BPP(16) |
1753
VALID_BPP(18) | VALID_BPP(19) |
1754
VALID_BPP(24) | VALID_BPP(25) |
1761
.valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1762
VALID_BPP(15) | VALID_BPP(16) |
1763
VALID_BPP(18) | VALID_BPP(19) |
1764
VALID_BPP(24) | VALID_BPP(25) |
1771
.valid_bpp = (VALID_BPP1248 | VALID_BPP(13) |
1772
VALID_BPP(15) | VALID_BPP(16) |
1773
VALID_BPP(18) | VALID_BPP(19) |
1774
VALID_BPP(24) | VALID_BPP(25) |
1779
static struct s3c_fb_driverdata s3c_fb_data_64xx = {
1782
.vidtcon = VIDTCON0,
1783
.wincon = WINCON(0),
1784
.winmap = WINxMAP(0),
1788
.buf_start = VIDW_BUF_START(0),
1789
.buf_size = VIDW_BUF_SIZE(0),
1790
.buf_end = VIDW_BUF_END(0),
1803
.win[0] = &s3c_fb_data_64xx_wins[0],
1804
.win[1] = &s3c_fb_data_64xx_wins[1],
1805
.win[2] = &s3c_fb_data_64xx_wins[2],
1806
.win[3] = &s3c_fb_data_64xx_wins[3],
1807
.win[4] = &s3c_fb_data_64xx_wins[4],
1810
static struct s3c_fb_driverdata s3c_fb_data_s5pc100 = {
1813
.vidtcon = VIDTCON0,
1814
.wincon = WINCON(0),
1815
.winmap = WINxMAP(0),
1819
.buf_start = VIDW_BUF_START(0),
1820
.buf_size = VIDW_BUF_SIZE(0),
1821
.buf_end = VIDW_BUF_END(0),
1834
.win[0] = &s3c_fb_data_s5p_wins[0],
1835
.win[1] = &s3c_fb_data_s5p_wins[1],
1836
.win[2] = &s3c_fb_data_s5p_wins[2],
1837
.win[3] = &s3c_fb_data_s5p_wins[3],
1838
.win[4] = &s3c_fb_data_s5p_wins[4],
1841
static struct s3c_fb_driverdata s3c_fb_data_s5pv210 = {
1844
.vidtcon = VIDTCON0,
1845
.wincon = WINCON(0),
1846
.winmap = WINxMAP(0),
1850
.buf_start = VIDW_BUF_START(0),
1851
.buf_size = VIDW_BUF_SIZE(0),
1852
.buf_end = VIDW_BUF_END(0),
1865
.win[0] = &s3c_fb_data_s5p_wins[0],
1866
.win[1] = &s3c_fb_data_s5p_wins[1],
1867
.win[2] = &s3c_fb_data_s5p_wins[2],
1868
.win[3] = &s3c_fb_data_s5p_wins[3],
1869
.win[4] = &s3c_fb_data_s5p_wins[4],
1872
static struct s3c_fb_driverdata s3c_fb_data_exynos4 = {
1875
.vidtcon = VIDTCON0,
1876
.wincon = WINCON(0),
1877
.winmap = WINxMAP(0),
1881
.buf_start = VIDW_BUF_START(0),
1882
.buf_size = VIDW_BUF_SIZE(0),
1883
.buf_end = VIDW_BUF_END(0),
1895
.win[0] = &s3c_fb_data_s5p_wins[0],
1896
.win[1] = &s3c_fb_data_s5p_wins[1],
1897
.win[2] = &s3c_fb_data_s5p_wins[2],
1898
.win[3] = &s3c_fb_data_s5p_wins[3],
1899
.win[4] = &s3c_fb_data_s5p_wins[4],
1902
/* S3C2443/S3C2416 style hardware */
1903
static struct s3c_fb_driverdata s3c_fb_data_s3c2443 = {
1924
.win[0] = &(struct s3c_fb_win_variant) {
1926
.valid_bpp = VALID_BPP1248 | VALID_BPP(16) | VALID_BPP(24),
1928
.win[1] = &(struct s3c_fb_win_variant) {
1932
.valid_bpp = (VALID_BPP1248 | VALID_BPP(16) |
1933
VALID_BPP(18) | VALID_BPP(19) |
1934
VALID_BPP(24) | VALID_BPP(25) |
1939
static struct s3c_fb_driverdata s3c_fb_data_s5p64x0 = {
1942
.vidtcon = VIDTCON0,
1943
.wincon = WINCON(0),
1944
.winmap = WINxMAP(0),
1948
.buf_start = VIDW_BUF_START(0),
1949
.buf_size = VIDW_BUF_SIZE(0),
1950
.buf_end = VIDW_BUF_END(0),
1958
.win[0] = &s3c_fb_data_s5p_wins[0],
1959
.win[1] = &s3c_fb_data_s5p_wins[1],
1960
.win[2] = &s3c_fb_data_s5p_wins[2],
1963
static struct platform_device_id s3c_fb_driver_ids[] = {
1966
.driver_data = (unsigned long)&s3c_fb_data_64xx,
1968
.name = "s5pc100-fb",
1969
.driver_data = (unsigned long)&s3c_fb_data_s5pc100,
1971
.name = "s5pv210-fb",
1972
.driver_data = (unsigned long)&s3c_fb_data_s5pv210,
1974
.name = "exynos4-fb",
1975
.driver_data = (unsigned long)&s3c_fb_data_exynos4,
1977
.name = "s3c2443-fb",
1978
.driver_data = (unsigned long)&s3c_fb_data_s3c2443,
1980
.name = "s5p64x0-fb",
1981
.driver_data = (unsigned long)&s3c_fb_data_s5p64x0,
1985
MODULE_DEVICE_TABLE(platform, s3c_fb_driver_ids);
1987
static const struct dev_pm_ops s3cfb_pm_ops = {
1988
.suspend = s3c_fb_suspend,
1989
.resume = s3c_fb_resume,
1990
.runtime_suspend = s3c_fb_runtime_suspend,
1991
.runtime_resume = s3c_fb_runtime_resume,
1994
static struct platform_driver s3c_fb_driver = {
1995
.probe = s3c_fb_probe,
1996
.remove = __devexit_p(s3c_fb_remove),
1997
.id_table = s3c_fb_driver_ids,
2000
.owner = THIS_MODULE,
2001
.pm = &s3cfb_pm_ops,
2005
static int __init s3c_fb_init(void)
2007
return platform_driver_register(&s3c_fb_driver);
2010
static void __exit s3c_fb_cleanup(void)
2012
platform_driver_unregister(&s3c_fb_driver);
2015
module_init(s3c_fb_init);
2016
module_exit(s3c_fb_cleanup);
2018
MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
2019
MODULE_DESCRIPTION("Samsung S3C SoC Framebuffer driver");
2020
MODULE_LICENSE("GPL");
2021
MODULE_ALIAS("platform:s3c-fb");