2
* reset controller for CSR SiRFprimaII
4
* Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company.
6
* Licensed under GPLv2 or later.
9
#include <linux/kernel.h>
10
#include <linux/mutex.h>
12
#include <linux/delay.h>
13
#include <linux/device.h>
15
#include <linux/of_address.h>
17
void __iomem *sirfsoc_rstc_base;
18
static DEFINE_MUTEX(rstc_lock);
20
static struct of_device_id rstc_ids[] = {
21
{ .compatible = "sirf,prima2-rstc" },
25
static int __init sirfsoc_of_rstc_init(void)
27
struct device_node *np;
29
np = of_find_matching_node(NULL, rstc_ids);
31
panic("unable to find compatible rstc node in dtb\n");
33
sirfsoc_rstc_base = of_iomap(np, 0);
34
if (!sirfsoc_rstc_base)
35
panic("unable to map rstc cpu registers\n");
41
early_initcall(sirfsoc_of_rstc_init);
43
int sirfsoc_reset_device(struct device *dev)
45
const unsigned int *prop = of_get_property(dev->of_node, "reset-bit", NULL);
46
unsigned int reset_bit;
51
reset_bit = be32_to_cpup(prop);
53
mutex_lock(&rstc_lock);
56
* Writing 1 to this bit resets corresponding block. Writing 0 to this
57
* bit de-asserts reset signal of the corresponding block.
58
* datasheet doesn't require explicit delay between the set and clear
59
* of reset bit. it could be shorter if tests pass.
61
writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) | reset_bit,
62
sirfsoc_rstc_base + (reset_bit / 32) * 4);
64
writel(readl(sirfsoc_rstc_base + (reset_bit / 32) * 4) & ~reset_bit,
65
sirfsoc_rstc_base + (reset_bit / 32) * 4);
67
mutex_unlock(&rstc_lock);