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#ifndef SPI_ADXRS450_H_
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#define SPI_ADXRS450_H_
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#define ADXRS450_STARTUP_DELAY 50 /* ms */
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/* The MSB for the spi commands */
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#define ADXRS450_SENSOR_DATA 0x20
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#define ADXRS450_WRITE_DATA 0x40
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#define ADXRS450_READ_DATA 0x80
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#define ADXRS450_RATE1 0x00 /* Rate Registers */
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#define ADXRS450_TEMP1 0x02 /* Temperature Registers */
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#define ADXRS450_LOCST1 0x04 /* Low CST Memory Registers */
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#define ADXRS450_HICST1 0x06 /* High CST Memory Registers */
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#define ADXRS450_QUAD1 0x08 /* Quad Memory Registers */
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#define ADXRS450_FAULT1 0x0A /* Fault Registers */
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#define ADXRS450_PID1 0x0C /* Part ID Register 1 */
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#define ADXRS450_SNH 0x0E /* Serial Number Registers, 4 bytes */
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#define ADXRS450_SNL 0x10
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#define ADXRS450_DNC1 0x12 /* Dynamic Null Correction Registers */
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#define ADXRS450_P 0x01
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#define ADXRS450_CHK 0x02
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#define ADXRS450_CST 0x04
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#define ADXRS450_PWR 0x08
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#define ADXRS450_POR 0x10
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#define ADXRS450_NVM 0x20
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#define ADXRS450_Q 0x40
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#define ADXRS450_PLL 0x80
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#define ADXRS450_UV 0x100
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#define ADXRS450_OV 0x200
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#define ADXRS450_AMP 0x400
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#define ADXRS450_FAIL 0x800
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#define ADXRS450_WRERR_MASK (0x7 << 29)
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#define ADXRS450_MAX_RX 4
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#define ADXRS450_MAX_TX 4
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#define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
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* struct adxrs450_state - device instance specific data
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* @us: actual spi_device
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* @buf_lock: mutex to protect tx and rx
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* @tx: transmit buffer
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struct adxrs450_state {
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struct spi_device *us;
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struct mutex buf_lock;
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u8 tx[ADXRS450_MAX_RX] ____cacheline_aligned;
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u8 rx[ADXRS450_MAX_TX];
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#endif /* SPI_ADXRS450_H_ */