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* Copyright (c) 2010 Broadcom Corporation
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
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* SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
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* OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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* CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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#ifndef _BRCM_PHY_INT_H_
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#define _BRCM_PHY_INT_H_
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#include <brcmu_utils.h>
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#include <brcmu_wifi.h>
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#define PHY_VERSION { 1, 82, 8, 0 }
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#define LCNXN_BASEREV 16
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struct brcms_phy_srom_fem {
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/* TSSI positive slope, 1: positive, 0: negative */
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/* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */
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/* support 32 combinations of different Pdet dynamic ranges */
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/* TR switch isolation */
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/* antswctrl lookup table configuration: 32 possible choices */
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#define ISNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_N)
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#define ISLCNPHY(pi) PHYTYPE_IS((pi)->pubpi.phy_type, PHY_TYPE_LCN)
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#define PHY_GET_RFATTN(rfgain) ((rfgain) & 0x0f)
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#define PHY_GET_PADMIX(rfgain) (((rfgain) & 0x10) >> 4)
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#define PHY_GET_RFGAINID(rfattn, padmix, width) ((rfattn) + ((padmix)*(width)))
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#define PHY_SAT(x, n) ((x) > ((1<<((n)-1))-1) ? ((1<<((n)-1))-1) : \
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((x) < -(1<<((n)-1)) ? -(1<<((n)-1)) : (x)))
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#define PHY_SHIFT_ROUND(x, n) ((x) >= 0 ? ((x)+(1<<((n)-1)))>>(n) : (x)>>(n))
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#define PHY_HW_ROUND(x, s) ((x >> s) + ((x >> (s-1)) & (s != 0)))
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#define A_HIGH_CHANS 2
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#define FIRST_REF5_CHANNUM 149
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#define LAST_REF5_CHANNUM 165
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#define FIRST_5G_CHAN 14
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#define LAST_5G_CHAN 50
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#define FIRST_MID_5G_CHAN 14
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#define LAST_MID_5G_CHAN 35
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#define FIRST_HIGH_5G_CHAN 36
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#define LAST_HIGH_5G_CHAN 41
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#define FIRST_LOW_5G_CHAN 42
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#define LAST_LOW_5G_CHAN 50
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#define BASE_LOW_5G_CHAN 4900
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#define BASE_MID_5G_CHAN 5100
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#define BASE_HIGH_5G_CHAN 5500
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#define CHAN5G_FREQ(chan) (5000 + chan*5)
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#define CHAN2G_FREQ(chan) (2407 + chan*5)
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#define TXP_FIRST_CCK 0
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#define TXP_LAST_CCK 3
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#define TXP_FIRST_OFDM 4
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#define TXP_LAST_OFDM 11
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#define TXP_FIRST_OFDM_20_CDD 12
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#define TXP_LAST_OFDM_20_CDD 19
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#define TXP_FIRST_MCS_20_SISO 20
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#define TXP_LAST_MCS_20_SISO 27
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#define TXP_FIRST_MCS_20_CDD 28
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#define TXP_LAST_MCS_20_CDD 35
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#define TXP_FIRST_MCS_20_STBC 36
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#define TXP_LAST_MCS_20_STBC 43
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#define TXP_FIRST_MCS_20_SDM 44
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#define TXP_LAST_MCS_20_SDM 51
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#define TXP_FIRST_OFDM_40_SISO 52
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#define TXP_LAST_OFDM_40_SISO 59
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#define TXP_FIRST_OFDM_40_CDD 60
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#define TXP_LAST_OFDM_40_CDD 67
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#define TXP_FIRST_MCS_40_SISO 68
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#define TXP_LAST_MCS_40_SISO 75
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#define TXP_FIRST_MCS_40_CDD 76
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#define TXP_LAST_MCS_40_CDD 83
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#define TXP_FIRST_MCS_40_STBC 84
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#define TXP_LAST_MCS_40_STBC 91
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#define TXP_FIRST_MCS_40_SDM 92
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#define TXP_LAST_MCS_40_SDM 99
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#define TXP_MCS_32 100
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#define TXP_NUM_RATES 101
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#define ADJ_PWR_TBL_LEN 84
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#define TXP_FIRST_SISO_MCS_20 20
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#define TXP_LAST_SISO_MCS_20 27
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#define PHY_CORE_NUM_1 1
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#define PHY_CORE_NUM_2 2
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#define PHY_CORE_NUM_3 3
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#define PHY_CORE_NUM_4 4
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#define PHY_CORE_MAX PHY_CORE_NUM_4
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#define MA_WINDOW_SZ 8
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#define PHY_NOISE_SAMPLE_MON 1
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#define PHY_NOISE_SAMPLE_EXTERNAL 2
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#define PHY_NOISE_WINDOW_SZ 16
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#define PHY_NOISE_GLITCH_INIT_MA 10
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#define PHY_NOISE_GLITCH_INIT_MA_BADPlCP 10
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#define PHY_NOISE_STATE_MON 0x1
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#define PHY_NOISE_STATE_EXTERNAL 0x2
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#define PHY_NOISE_SAMPLE_LOG_NUM_NPHY 10
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#define PHY_NOISE_SAMPLE_LOG_NUM_UCODE 9
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#define PHY_NOISE_OFFSETFACT_4322 (-103)
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#define PHY_NOISE_MA_WINDOW_SZ 2
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#define PHY_RSSI_TABLE_SIZE 64
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#define RSSI_ANT_MERGE_MAX 0
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#define RSSI_ANT_MERGE_MIN 1
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#define RSSI_ANT_MERGE_AVG 2
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#define PHY_TSSI_TABLE_SIZE 64
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#define APHY_TSSI_TABLE_SIZE 256
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#define TX_GAIN_TABLE_LENGTH 64
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#define DEFAULT_11A_TXP_IDX 24
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#define NUM_TSSI_FRAMES 4
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#define NULL_TSSI 0x7f
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#define NULL_TSSI_W 0x7f7f
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#define PHY_PAPD_EPS_TBL_SIZE_LCNPHY 64
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#define LCNPHY_PERICAL_TEMPBASED_TXPWRCTRL 9
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#define PHY_TXPWR_MIN 10
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#define PHY_TXPWR_MIN_NPHY 8
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#define RADIOPWR_OVERRIDE_DEF (-1)
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#define PWRTBL_NUM_COEFF 3
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#define SPURAVOID_DISABLE 0
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#define SPURAVOID_AUTO 1
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#define SPURAVOID_FORCEON 2
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#define SPURAVOID_FORCEON2 3
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#define PHY_SW_TIMER_FAST 15
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#define PHY_SW_TIMER_SLOW 60
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#define PHY_SW_TIMER_GLACIAL 120
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#define PHY_PERICAL_AUTO 0
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#define PHY_PERICAL_FULL 1
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#define PHY_PERICAL_PARTIAL 2
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#define PHY_PERICAL_NODELAY 0
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#define PHY_PERICAL_INIT_DELAY 5
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#define PHY_PERICAL_ASSOC_DELAY 5
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#define PHY_PERICAL_WDOG_DELAY 5
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#define MPHASE_TXCAL_NUMCMDS 2
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#define PHY_PERICAL_MPHASE_PENDING(pi) \
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(pi->mphase_cal_phase_id > MPHASE_CAL_STATE_IDLE)
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MPHASE_CAL_STATE_IDLE = 0,
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MPHASE_CAL_STATE_INIT = 1,
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MPHASE_CAL_STATE_TXPHASE0,
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MPHASE_CAL_STATE_TXPHASE1,
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MPHASE_CAL_STATE_TXPHASE2,
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MPHASE_CAL_STATE_TXPHASE3,
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MPHASE_CAL_STATE_TXPHASE4,
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MPHASE_CAL_STATE_TXPHASE5,
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MPHASE_CAL_STATE_PAPDCAL,
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MPHASE_CAL_STATE_RXCAL,
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MPHASE_CAL_STATE_RSSICAL,
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MPHASE_CAL_STATE_IDLETSSI
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#define RDR_TIER_SIZE 64
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#define RDR_LIST_SIZE (512/3)
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#define RDR_EPOCH_SIZE 40
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#define RDR_NANTENNAS 2
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#define RDR_NTIER_SIZE RDR_LIST_SIZE
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#define RDR_LP_BUFFER_SIZE 64
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#define LP_LEN_HIS_SIZE 10
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#define STATIC_NUM_RF 32
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#define STATIC_NUM_BB 9
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#define BB_MULT_MASK 0x0000ffff
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#define BB_MULT_VALID_MASK 0x80000000
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#define CORDIC_AG 39797
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#define FIXED(X) ((s32)((X) << 16))
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(((X) >= 0) ? ((((X) >> 15) + 1) >> 1) : -((((-(X)) >> 15) + 1) >> 1))
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#define PHY_CHAIN_TX_DISABLE_TEMP 115
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#define PHY_HYSTERESIS_DELTATEMP 5
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#define SCAN_INPROG_PHY(pi) \
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(mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN))
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#define PLT_INPROG_PHY(pi) (mboolisset(pi->measure_hold, PHY_HOLD_FOR_PLT))
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#define ASSOC_INPROG_PHY(pi) \
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(mboolisset(pi->measure_hold, PHY_HOLD_FOR_ASSOC))
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#define SCAN_RM_IN_PROGRESS(pi) \
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(mboolisset(pi->measure_hold, PHY_HOLD_FOR_SCAN | PHY_HOLD_FOR_RM))
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#define PHY_MUTED(pi) \
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(mboolisset(pi->measure_hold, PHY_HOLD_FOR_MUTE))
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#define PUB_NOT_ASSOC(pi) \
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(mboolisset(pi->measure_hold, PHY_HOLD_FOR_NOT_ASSOC))
250
struct phy_table_info {
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struct interference_info {
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u8 curr_home_channel;
266
u16 crsminpwrthld_40_stored;
267
u16 crsminpwrthld_20L_stored;
268
u16 crsminpwrthld_20U_stored;
269
u16 init_gain_code_core1_stored;
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u16 init_gain_code_core2_stored;
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u16 init_gain_codeb_core1_stored;
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u16 init_gain_codeb_core2_stored;
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u16 init_gain_table_stored[4];
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u16 clip1_hi_gain_code_core1_stored;
276
u16 clip1_hi_gain_code_core2_stored;
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u16 clip1_hi_gain_codeb_core1_stored;
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u16 clip1_hi_gain_codeb_core2_stored;
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u16 nb_clip_thresh_core1_stored;
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u16 nb_clip_thresh_core2_stored;
281
u16 init_ofdmlna2gainchange_stored[4];
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u16 init_ccklna2gainchange_stored[4];
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u16 clip1_lo_gain_code_core1_stored;
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u16 clip1_lo_gain_code_core2_stored;
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u16 clip1_lo_gain_codeb_core1_stored;
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u16 clip1_lo_gain_codeb_core2_stored;
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u16 w1_clip_thresh_core1_stored;
288
u16 w1_clip_thresh_core2_stored;
289
u16 radio_2056_core1_rssi_gain_stored;
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u16 radio_2056_core2_rssi_gain_stored;
291
u16 energy_drop_timeout_len_stored;
293
u16 ed_crs40_assertthld0_stored;
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u16 ed_crs40_assertthld1_stored;
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u16 ed_crs40_deassertthld0_stored;
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u16 ed_crs40_deassertthld1_stored;
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u16 ed_crs20L_assertthld0_stored;
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u16 ed_crs20L_assertthld1_stored;
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u16 ed_crs20L_deassertthld0_stored;
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u16 ed_crs20L_deassertthld1_stored;
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u16 ed_crs20U_assertthld0_stored;
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u16 ed_crs20U_assertthld1_stored;
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u16 ed_crs20U_deassertthld0_stored;
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u16 ed_crs20U_deassertthld1_stored;
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u16 badplcp_ma_previous;
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u16 badplcp_ma_total;
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u16 badplcp_ma_list[MA_WINDOW_SZ];
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int badplcp_ma_index;
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s16 bphy_pre_badplcp_cnt;
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u16 init_gainb_core1;
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u16 init_gainb_core2;
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u16 init_gain_rfseq[4];
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u16 radio_2057_core1_rssi_wb1a_gc_stored;
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u16 radio_2057_core2_rssi_wb1a_gc_stored;
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u16 radio_2057_core1_rssi_wb1g_gc_stored;
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u16 radio_2057_core2_rssi_wb1g_gc_stored;
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u16 radio_2057_core1_rssi_wb2_gc_stored;
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u16 radio_2057_core2_rssi_wb2_gc_stored;
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u16 radio_2057_core1_rssi_nb_gc_stored;
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u16 radio_2057_core2_rssi_nb_gc_stored;
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struct aci_save_gphy {
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u16 div_search_gn_change;
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u16 clip_pwdn_thresh;
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u16 clip_n1p1_thresh;
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u16 clip_n1_pwdn_thresh;
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u16 clip_p1_p2_thresh;
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u16 div_srch_gn_back;
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struct lo_complex_abgphy_info {
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struct nphy_iq_comp {
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struct nphy_txpwrindex {
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s8 index_internal_save;
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struct txiqcal_cache {
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u16 txcal_coeffs_2G[8];
400
u16 txcal_radio_regs_2G[8];
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struct nphy_iq_comp rxcal_coeffs_2G;
403
u16 txcal_coeffs_5G[8];
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u16 txcal_radio_regs_5G[8];
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struct nphy_iq_comp rxcal_coeffs_5G;
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struct nphy_pwrctrl {
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struct nphy_txgains {
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#define PHY_NOISEVAR_BUFSIZE 10
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struct nphy_noisevar_buf {
449
int tone_id[PHY_NOISEVAR_BUFSIZE];
450
u32 noise_vars[PHY_NOISEVAR_BUFSIZE];
451
u32 min_noise_vars[PHY_NOISEVAR_BUFSIZE];
454
struct rssical_cache {
455
u16 rssical_radio_regs_2G[2];
456
u16 rssical_phyregs_2G[12];
458
u16 rssical_radio_regs_5G[2];
459
u16 rssical_phyregs_5G[12];
462
struct lcnphy_cal_results {
472
u16 txiqlocal_bestcoeffs[11];
473
u16 txiqlocal_bestcoeffs_valid;
475
u32 papd_eps_tbl[PHY_PAPD_EPS_TBL_SIZE_LCNPHY];
482
u16 sslpnCalibClkEnCtrl;
484
u16 rxiqcal_coeff_a0;
485
u16 rxiqcal_coeff_b0;
489
struct brcms_phy *phy_head;
492
struct phy_shim_info *physhim;
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s8 phy_noise_window[MA_WINDOW_SZ];
515
uint phy_noise_index;
524
struct brcms_phy_pub {
537
struct phy_func_ptr {
538
void (*init)(struct brcms_phy *);
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void (*calinit)(struct brcms_phy *);
540
void (*chanset)(struct brcms_phy *, u16 chanspec);
541
void (*txpwrrecalc)(struct brcms_phy *);
542
int (*longtrn)(struct brcms_phy *, int);
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void (*txiqccget)(struct brcms_phy *, u16 *, u16 *);
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void (*txiqccset)(struct brcms_phy *, u16, u16);
545
u16 (*txloccget)(struct brcms_phy *);
546
void (*radioloftget)(struct brcms_phy *, u8 *, u8 *, u8 *, u8 *);
547
void (*carrsuppr)(struct brcms_phy *);
548
s32 (*rxsigpwr)(struct brcms_phy *, s32);
549
void (*detach)(struct brcms_phy *);
553
struct brcms_phy_pub pubpi_ro;
554
struct shared_phy *sh;
555
struct phy_func_ptr pi_fptr;
558
struct brcms_phy_lcnphy *pi_lcnphy;
560
bool user_txpwr_at_rfport;
562
struct d11regs __iomem *regs;
563
struct brcms_phy *next;
564
struct brcms_phy_pub pubpi;
568
bool ofdm_rateset_war;
569
bool bf_preempt_4306;
576
bool init_in_progress;
580
bool watchdog_override;
583
int phynoise_chan_watchdog;
584
bool phynoise_polling;
588
s16 txpa_2g[PWRTBL_NUM_COEFF];
589
s16 txpa_2g_low_temp[PWRTBL_NUM_COEFF];
590
s16 txpa_2g_high_temp[PWRTBL_NUM_COEFF];
591
s16 txpa_5g_low[PWRTBL_NUM_COEFF];
592
s16 txpa_5g_mid[PWRTBL_NUM_COEFF];
593
s16 txpa_5g_hi[PWRTBL_NUM_COEFF];
596
u8 tx_srom_max_5g_low;
597
u8 tx_srom_max_5g_mid;
598
u8 tx_srom_max_5g_hi;
599
u8 tx_srom_max_rate_2g[TXP_NUM_RATES];
600
u8 tx_srom_max_rate_5g_low[TXP_NUM_RATES];
601
u8 tx_srom_max_rate_5g_mid[TXP_NUM_RATES];
602
u8 tx_srom_max_rate_5g_hi[TXP_NUM_RATES];
603
u8 tx_user_target[TXP_NUM_RATES];
604
s8 tx_power_offset[TXP_NUM_RATES];
605
u8 tx_power_target[TXP_NUM_RATES];
607
struct brcms_phy_srom_fem srom_fem2g;
608
struct brcms_phy_srom_fem srom_fem5g;
611
u8 tx_power_max_rate_ind;
620
s8 n_preamble_override;
624
s8 idle_tssi[CH_5G_GROUP];
628
u8 txpwr_limit[TXP_NUM_RATES];
629
u8 txpwr_env_limit[TXP_NUM_RATES];
630
u8 adj_pwr_tbl_nphy[ADJ_PWR_TBL_LEN];
632
bool channel_14_wide_filter;
635
bool txpwridx_override_aphy;
636
s16 radiopwr_override;
640
bool edcrs_threshold_lock;
645
s16 ofdm_analog_filt_bw_override;
646
s16 cck_analog_filt_bw_override;
647
s16 ofdm_rccal_override;
648
s16 cck_rccal_override;
651
uint interference_mode_crs_time;
653
bool interference_mode_crs;
655
u32 phy_tx_tone_freq;
658
bool phy_fixed_noise;
661
s8 carrier_suppr_disable;
668
s16 phy_txcore_disable_temp;
669
s16 phy_txcore_enable_temp;
670
s8 phy_tempsense_offset;
671
bool phy_txcore_heatedup;
679
struct lo_complex_abgphy_info gphy_locomp_iq
680
[STATIC_NUM_RF][STATIC_NUM_BB];
681
s8 stats_11b_txpower[STATIC_NUM_RF][STATIC_NUM_BB];
682
u16 gain_table[TX_GAIN_TABLE_LENGTH];
684
s16 max_lpback_gain_hdB;
685
s16 trsw_rx_gain_hdB;
689
int nrssi_table_delta;
690
int nrssi_slope_scale;
691
int nrssi_slope_offset;
698
u8 a_band_high_disable;
701
u16 global_tx_bb_dc_bias_loft;
721
u16 freqtrack_saved_regs[2];
722
int cur_interference_mode;
723
bool hwpwrctrl_capable;
724
bool temppwrctrl_capable;
733
bool nphy_tableloaded;
735
u32 nphy_bb_mult_save;
736
u16 nphy_txiqlocal_bestc[11];
737
bool nphy_txiqlocal_coeffsvalid;
738
struct nphy_txpwrindex nphy_txpwrindex[PHY_CORE_NUM_2];
739
struct nphy_pwrctrl nphy_pwrctrl_info[PHY_CORE_NUM_2];
765
u32 nphy_rxcalparams;
768
bool phy_isspuravoid;
774
s16 nphy_noise_win[PHY_CORE_MAX][PHY_NOISE_WINDOW_SZ];
777
u8 nphy_txpid2g[PHY_CORE_NUM_2];
778
u8 nphy_txpid5g[PHY_CORE_NUM_2];
779
u8 nphy_txpid5gl[PHY_CORE_NUM_2];
780
u8 nphy_txpid5gh[PHY_CORE_NUM_2];
782
bool nphy_gain_boost;
783
bool nphy_elna_gain_config;
785
u16 old_bphy_testcontrol;
791
uint nphy_perical_last;
792
u8 cal_type_override;
793
u8 mphase_cal_phase_id;
794
u8 mphase_txcal_cmdidx;
795
u8 mphase_txcal_numcmds;
796
u16 mphase_txcal_bestcoeffs[11];
797
u16 nphy_txiqlocal_chanspec;
798
u16 nphy_iqcal_chanspec_2G;
799
u16 nphy_iqcal_chanspec_5G;
800
u16 nphy_rssical_chanspec_2G;
801
u16 nphy_rssical_chanspec_5G;
802
struct wlapi_timer *phycal_timer;
803
bool use_int_tx_iqlo_cal_nphy;
804
bool internal_tx_iqlo_cal_tapoff_intpa_nphy;
805
s16 nphy_lastcal_temp;
807
struct txiqcal_cache calibration_cache;
808
struct rssical_cache rssical_cache;
810
u8 nphy_txpwr_idx[2];
811
u8 nphy_papd_cal_type;
812
uint nphy_papd_last_cal;
813
u16 nphy_papd_tx_gain_at_last_cal[2];
814
u8 nphy_papd_cal_gain_index[2];
815
s16 nphy_papd_epsilon_offset[2];
816
bool nphy_papd_recal_enable;
817
u32 nphy_papd_recal_counter;
818
bool nphy_force_papd_cal;
823
u16 classifier_state;
825
uint nphy_deaf_count;
829
u16 rfctrlIntc1_save;
830
u16 rfctrlIntc2_save;
831
bool first_cal_after_assoc;
832
u16 tx_rx_cal_radio_saveregs[22];
833
u16 tx_rx_cal_phy_saveregs[15];
835
u8 nphy_cal_orig_pwr_idx[2];
836
u8 nphy_txcal_pwr_idx[2];
837
u8 nphy_rxcal_pwr_idx[2];
838
u16 nphy_cal_orig_tx_gain[2];
839
struct nphy_txgains nphy_cal_target_gain;
840
u16 nphy_txcal_bbmult;
843
u16 nphy_saved_bbconf;
845
bool nphy_gband_spurwar_en;
846
bool nphy_gband_spurwar2_en;
847
bool nphy_aband_spurwar_en;
848
u16 nphy_rccal_value;
849
u16 nphy_crsminpwr[3];
850
struct nphy_noisevar_buf nphy_saved_noisevars;
851
bool nphy_anarxlpf_adjusted;
852
bool nphy_crsminpwr_adjusted;
853
bool nphy_noisevars_adjusted;
855
bool nphy_rxcal_active;
856
u16 radar_percal_mask;
857
bool dfs_lp_buffer_nphy;
859
u16 nphy_fineclockgatecontrol;
866
s16 noise_crsminpwr_index;
869
u16 init_gainb_core1;
870
u16 init_gainb_core2;
871
u8 aci_noise_curr_channel;
872
u16 init_gain_rfseq[4];
876
bool nphy_sample_play_lpf_bw_ctl_ovr;
883
uint tbl_save_offset;
886
s8 txpwrindex[PHY_CORE_MAX];
907
struct radio_20xx_regs {
913
struct lcnphy_radio_regs {
921
extern u16 read_phy_reg(struct brcms_phy *pi, u16 addr);
922
extern void write_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
923
extern void and_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
924
extern void or_phy_reg(struct brcms_phy *pi, u16 addr, u16 val);
925
extern void mod_phy_reg(struct brcms_phy *pi, u16 addr, u16 mask, u16 val);
927
extern u16 read_radio_reg(struct brcms_phy *pi, u16 addr);
928
extern void or_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
929
extern void and_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
930
extern void mod_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask,
932
extern void xor_radio_reg(struct brcms_phy *pi, u16 addr, u16 mask);
934
extern void write_radio_reg(struct brcms_phy *pi, u16 addr, u16 val);
936
extern void wlc_phyreg_enter(struct brcms_phy_pub *pih);
937
extern void wlc_phyreg_exit(struct brcms_phy_pub *pih);
938
extern void wlc_radioreg_enter(struct brcms_phy_pub *pih);
939
extern void wlc_radioreg_exit(struct brcms_phy_pub *pih);
941
extern void wlc_phy_read_table(struct brcms_phy *pi,
942
const struct phytbl_info *ptbl_info,
943
u16 tblAddr, u16 tblDataHi,
945
extern void wlc_phy_write_table(struct brcms_phy *pi,
946
const struct phytbl_info *ptbl_info,
947
u16 tblAddr, u16 tblDataHi, u16 tblDatalo);
948
extern void wlc_phy_table_addr(struct brcms_phy *pi, uint tbl_id,
949
uint tbl_offset, u16 tblAddr, u16 tblDataHi,
951
extern void wlc_phy_table_data_write(struct brcms_phy *pi, uint width, u32 val);
953
extern void write_phy_channel_reg(struct brcms_phy *pi, uint val);
954
extern void wlc_phy_txpower_update_shm(struct brcms_phy *pi);
956
extern u8 wlc_phy_nbits(s32 value);
957
extern void wlc_phy_compute_dB(u32 *cmplx_pwr, s8 *p_dB, u8 core);
959
extern uint wlc_phy_init_radio_regs_allbands(struct brcms_phy *pi,
960
struct radio_20xx_regs *radioregs);
961
extern uint wlc_phy_init_radio_regs(struct brcms_phy *pi,
962
const struct radio_regs *radioregs,
965
extern void wlc_phy_txpower_ipa_upd(struct brcms_phy *pi);
967
extern void wlc_phy_do_dummy_tx(struct brcms_phy *pi, bool ofdm, bool pa_on);
968
extern void wlc_phy_papd_decode_epsilon(u32 epsilon, s32 *eps_real,
971
extern void wlc_phy_cal_perical_mphase_reset(struct brcms_phy *pi);
972
extern void wlc_phy_cal_perical_mphase_restart(struct brcms_phy *pi);
974
extern bool wlc_phy_attach_nphy(struct brcms_phy *pi);
975
extern bool wlc_phy_attach_lcnphy(struct brcms_phy *pi);
977
extern void wlc_phy_detach_lcnphy(struct brcms_phy *pi);
979
extern void wlc_phy_init_nphy(struct brcms_phy *pi);
980
extern void wlc_phy_init_lcnphy(struct brcms_phy *pi);
982
extern void wlc_phy_cal_init_nphy(struct brcms_phy *pi);
983
extern void wlc_phy_cal_init_lcnphy(struct brcms_phy *pi);
985
extern void wlc_phy_chanspec_set_nphy(struct brcms_phy *pi,
987
extern void wlc_phy_chanspec_set_lcnphy(struct brcms_phy *pi,
989
extern void wlc_phy_chanspec_set_fixup_lcnphy(struct brcms_phy *pi,
991
extern int wlc_phy_channel2freq(uint channel);
992
extern int wlc_phy_chanspec_freq2bandrange_lpssn(uint);
993
extern int wlc_phy_chanspec_bandrange_get(struct brcms_phy *, u16 chanspec);
995
extern void wlc_lcnphy_set_tx_pwr_ctrl(struct brcms_phy *pi, u16 mode);
996
extern s8 wlc_lcnphy_get_current_tx_pwr_idx(struct brcms_phy *pi);
998
extern void wlc_phy_txpower_recalc_target_nphy(struct brcms_phy *pi);
999
extern void wlc_lcnphy_txpower_recalc_target(struct brcms_phy *pi);
1000
extern void wlc_phy_txpower_recalc_target_lcnphy(struct brcms_phy *pi);
1002
extern void wlc_lcnphy_set_tx_pwr_by_index(struct brcms_phy *pi, int index);
1003
extern void wlc_lcnphy_tx_pu(struct brcms_phy *pi, bool bEnable);
1004
extern void wlc_lcnphy_stop_tx_tone(struct brcms_phy *pi);
1005
extern void wlc_lcnphy_start_tx_tone(struct brcms_phy *pi, s32 f_kHz,
1006
u16 max_val, bool iqcalmode);
1008
extern void wlc_phy_txpower_sromlimit_get_nphy(struct brcms_phy *pi, uint chan,
1009
u8 *max_pwr, u8 rate_id);
1010
extern void wlc_phy_ofdm_to_mcs_powers_nphy(u8 *power, u8 rate_mcs_start,
1012
u8 rate_ofdm_start);
1013
extern void wlc_phy_mcs_to_ofdm_powers_nphy(u8 *power,
1018
extern u16 wlc_lcnphy_tempsense(struct brcms_phy *pi, bool mode);
1019
extern s16 wlc_lcnphy_tempsense_new(struct brcms_phy *pi, bool mode);
1020
extern s8 wlc_lcnphy_tempsense_degree(struct brcms_phy *pi, bool mode);
1021
extern s8 wlc_lcnphy_vbatsense(struct brcms_phy *pi, bool mode);
1022
extern void wlc_phy_carrier_suppress_lcnphy(struct brcms_phy *pi);
1023
extern void wlc_lcnphy_crsuprs(struct brcms_phy *pi, int channel);
1024
extern void wlc_lcnphy_epa_switch(struct brcms_phy *pi, bool mode);
1025
extern void wlc_2064_vco_cal(struct brcms_phy *pi);
1027
extern void wlc_phy_txpower_recalc_target(struct brcms_phy *pi);
1029
#define LCNPHY_TBL_ID_PAPDCOMPDELTATBL 0x18
1030
#define LCNPHY_TX_POWER_TABLE_SIZE 128
1031
#define LCNPHY_MAX_TX_POWER_INDEX (LCNPHY_TX_POWER_TABLE_SIZE - 1)
1032
#define LCNPHY_TBL_ID_TXPWRCTL 0x07
1033
#define LCNPHY_TX_PWR_CTRL_OFF 0
1034
#define LCNPHY_TX_PWR_CTRL_SW (0x1 << 15)
1035
#define LCNPHY_TX_PWR_CTRL_HW ((0x1 << 15) | \
1039
#define LCNPHY_TX_PWR_CTRL_TEMPBASED 0xE001
1041
extern void wlc_lcnphy_write_table(struct brcms_phy *pi,
1042
const struct phytbl_info *pti);
1043
extern void wlc_lcnphy_read_table(struct brcms_phy *pi,
1044
struct phytbl_info *pti);
1045
extern void wlc_lcnphy_set_tx_iqcc(struct brcms_phy *pi, u16 a, u16 b);
1046
extern void wlc_lcnphy_set_tx_locc(struct brcms_phy *pi, u16 didq);
1047
extern void wlc_lcnphy_get_tx_iqcc(struct brcms_phy *pi, u16 *a, u16 *b);
1048
extern u16 wlc_lcnphy_get_tx_locc(struct brcms_phy *pi);
1049
extern void wlc_lcnphy_get_radio_loft(struct brcms_phy *pi, u8 *ei0,
1050
u8 *eq0, u8 *fi0, u8 *fq0);
1051
extern void wlc_lcnphy_calib_modes(struct brcms_phy *pi, uint mode);
1052
extern void wlc_lcnphy_deaf_mode(struct brcms_phy *pi, bool mode);
1053
extern bool wlc_phy_tpc_isenabled_lcnphy(struct brcms_phy *pi);
1054
extern void wlc_lcnphy_tx_pwr_update_npt(struct brcms_phy *pi);
1055
extern s32 wlc_lcnphy_tssi2dbm(s32 tssi, s32 a1, s32 b0, s32 b1);
1056
extern void wlc_lcnphy_get_tssi(struct brcms_phy *pi, s8 *ofdm_pwr,
1058
extern void wlc_lcnphy_tx_power_adjustment(struct brcms_phy_pub *ppi);
1060
extern s32 wlc_lcnphy_rx_signal_power(struct brcms_phy *pi, s32 gain_index);
1062
#define NPHY_MAX_HPVGA1_INDEX 10
1063
#define NPHY_DEF_HPVGA1_INDEXLIMIT 7
1071
extern void wlc_phy_stay_in_carriersearch_nphy(struct brcms_phy *pi,
1073
extern void wlc_nphy_deaf_mode(struct brcms_phy *pi, bool mode);
1075
#define wlc_phy_write_table_nphy(pi, pti) \
1076
wlc_phy_write_table(pi, pti, 0x72, 0x74, 0x73)
1078
#define wlc_phy_read_table_nphy(pi, pti) \
1079
wlc_phy_read_table(pi, pti, 0x72, 0x74, 0x73)
1081
#define wlc_nphy_table_addr(pi, id, off) \
1082
wlc_phy_table_addr((pi), (id), (off), 0x72, 0x74, 0x73)
1084
#define wlc_nphy_table_data_write(pi, w, v) \
1085
wlc_phy_table_data_write((pi), (w), (v))
1087
extern void wlc_phy_table_read_nphy(struct brcms_phy *pi, u32, u32 l, u32 o,
1089
extern void wlc_phy_table_write_nphy(struct brcms_phy *pi, u32, u32, u32,
1092
#define PHY_IPA(pi) \
1093
((pi->ipa2g_on && CHSPEC_IS2G(pi->radio_chanspec)) || \
1094
(pi->ipa5g_on && CHSPEC_IS5G(pi->radio_chanspec)))
1096
#define BRCMS_PHY_WAR_PR51571(pi) \
1097
if (NREV_LT((pi)->pubpi.phy_rev, 3)) \
1098
(void)R_REG(&(pi)->regs->maccontrol)
1100
extern void wlc_phy_cal_perical_nphy_run(struct brcms_phy *pi, u8 caltype);
1101
extern void wlc_phy_aci_reset_nphy(struct brcms_phy *pi);
1102
extern void wlc_phy_pa_override_nphy(struct brcms_phy *pi, bool en);
1104
extern u8 wlc_phy_get_chan_freq_range_nphy(struct brcms_phy *pi, uint chan);
1105
extern void wlc_phy_switch_radio_nphy(struct brcms_phy *pi, bool on);
1107
extern void wlc_phy_stf_chain_upd_nphy(struct brcms_phy *pi);
1109
extern void wlc_phy_force_rfseq_nphy(struct brcms_phy *pi, u8 cmd);
1110
extern s16 wlc_phy_tempsense_nphy(struct brcms_phy *pi);
1112
extern u16 wlc_phy_classifier_nphy(struct brcms_phy *pi, u16 mask, u16 val);
1114
extern void wlc_phy_rx_iq_est_nphy(struct brcms_phy *pi, struct phy_iq_est *est,
1115
u16 num_samps, u8 wait_time,
1118
extern void wlc_phy_rx_iq_coeffs_nphy(struct brcms_phy *pi, u8 write,
1119
struct nphy_iq_comp *comp);
1120
extern void wlc_phy_aci_and_noise_reduction_nphy(struct brcms_phy *pi);
1122
extern void wlc_phy_rxcore_setstate_nphy(struct brcms_phy_pub *pih,
1124
extern u8 wlc_phy_rxcore_getstate_nphy(struct brcms_phy_pub *pih);
1126
extern void wlc_phy_txpwrctrl_enable_nphy(struct brcms_phy *pi, u8 ctrl_type);
1127
extern void wlc_phy_txpwr_fixpower_nphy(struct brcms_phy *pi);
1128
extern void wlc_phy_txpwr_apply_nphy(struct brcms_phy *pi);
1129
extern void wlc_phy_txpwr_papd_cal_nphy(struct brcms_phy *pi);
1130
extern u16 wlc_phy_txpwr_idx_get_nphy(struct brcms_phy *pi);
1132
extern struct nphy_txgains wlc_phy_get_tx_gain_nphy(struct brcms_phy *pi);
1133
extern int wlc_phy_cal_txiqlo_nphy(struct brcms_phy *pi,
1134
struct nphy_txgains target_gain,
1136
extern int wlc_phy_cal_rxiq_nphy(struct brcms_phy *pi,
1137
struct nphy_txgains target_gain,
1139
extern void wlc_phy_txpwr_index_nphy(struct brcms_phy *pi, u8 core_mask,
1140
s8 txpwrindex, bool res);
1141
extern void wlc_phy_rssisel_nphy(struct brcms_phy *pi, u8 core, u8 rssi_type);
1142
extern int wlc_phy_poll_rssi_nphy(struct brcms_phy *pi, u8 rssi_type,
1143
s32 *rssi_buf, u8 nsamps);
1144
extern void wlc_phy_rssi_cal_nphy(struct brcms_phy *pi);
1145
extern int wlc_phy_aci_scan_nphy(struct brcms_phy *pi);
1146
extern void wlc_phy_cal_txgainctrl_nphy(struct brcms_phy *pi,
1147
s32 dBm_targetpower, bool debug);
1148
extern int wlc_phy_tx_tone_nphy(struct brcms_phy *pi, u32 f_kHz, u16 max_val,
1150
extern void wlc_phy_stopplayback_nphy(struct brcms_phy *pi);
1151
extern void wlc_phy_est_tonepwr_nphy(struct brcms_phy *pi, s32 *qdBm_pwrbuf,
1153
extern void wlc_phy_radio205x_vcocal_nphy(struct brcms_phy *pi);
1155
extern int wlc_phy_rssi_compute_nphy(struct brcms_phy *pi,
1156
struct d11rxhdr *rxh);
1158
#define NPHY_TESTPATTERN_BPHY_EVM 0
1159
#define NPHY_TESTPATTERN_BPHY_RFCS 1
1161
extern void wlc_phy_nphy_tkip_rifs_war(struct brcms_phy *pi, u8 rifs);
1163
void wlc_phy_get_pwrdet_offsets(struct brcms_phy *pi, s8 *cckoffset,
1165
extern s8 wlc_phy_upd_rssi_offset(struct brcms_phy *pi, s8 rssi,
1168
extern bool wlc_phy_n_txpower_ipa_ison(struct brcms_phy *pih);
1169
#endif /* _BRCM_PHY_INT_H_ */