2
* TI DaVinci DM646X EVM board
4
* Derived from: arch/arm/mach-davinci/board-evm.c
5
* Copyright (C) 2006 Texas Instruments.
7
* (C) 2007-2008, MontaVista Software, Inc.
9
* This file is licensed under the terms of the GNU General Public License
10
* version 2. This program is licensed "as is" without any warranty of any
11
* kind, whether express or implied.
15
/**************************************************************************
17
**************************************************************************/
19
#include <linux/kernel.h>
20
#include <linux/init.h>
21
#include <linux/leds.h>
22
#include <linux/gpio.h>
23
#include <linux/platform_device.h>
24
#include <linux/i2c.h>
25
#include <linux/i2c/at24.h>
26
#include <linux/i2c/pcf857x.h>
28
#include <media/tvp514x.h>
30
#include <linux/mtd/mtd.h>
31
#include <linux/mtd/nand.h>
32
#include <linux/mtd/partitions.h>
33
#include <linux/clk.h>
34
#include <linux/export.h>
36
#include <asm/mach-types.h>
37
#include <asm/mach/arch.h>
39
#include <mach/dm646x.h>
40
#include <mach/common.h>
41
#include <mach/serial.h>
43
#include <mach/nand.h>
44
#include <mach/clock.h>
45
#include <mach/cdce949.h>
46
#include <mach/aemif.h>
50
#define NAND_BLOCK_SIZE SZ_128K
52
/* Note: We are setting first partition as 'bootloader' constituting UBL, U-Boot
53
* and U-Boot environment this avoids dependency on any particular combination
54
* of UBL, U-Boot or flashing tools etc.
56
static struct mtd_partition davinci_nand_partitions[] = {
58
/* UBL, U-Boot with environment */
60
.offset = MTDPART_OFS_APPEND,
61
.size = 16 * NAND_BLOCK_SIZE,
62
.mask_flags = MTD_WRITEABLE, /* force read-only */
65
.offset = MTDPART_OFS_APPEND,
70
.offset = MTDPART_OFS_APPEND,
71
.size = MTDPART_SIZ_FULL,
76
static struct davinci_aemif_timing dm6467tevm_nandflash_timing = {
86
static struct davinci_nand_pdata davinci_nand_data = {
89
.parts = davinci_nand_partitions,
90
.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
91
.ecc_mode = NAND_ECC_HW,
95
static struct resource davinci_nand_resources[] = {
97
.start = DM646X_ASYNC_EMIF_CS2_SPACE_BASE,
98
.end = DM646X_ASYNC_EMIF_CS2_SPACE_BASE + SZ_32M - 1,
99
.flags = IORESOURCE_MEM,
101
.start = DM646X_ASYNC_EMIF_CONTROL_BASE,
102
.end = DM646X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
103
.flags = IORESOURCE_MEM,
107
static struct platform_device davinci_nand_device = {
108
.name = "davinci_nand",
111
.num_resources = ARRAY_SIZE(davinci_nand_resources),
112
.resource = davinci_nand_resources,
115
.platform_data = &davinci_nand_data,
119
#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
120
defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
126
/* CPLD Register 0 bits to control ATA */
127
#define DM646X_EVM_ATA_RST BIT(0)
128
#define DM646X_EVM_ATA_PWD BIT(1)
130
/* CPLD Register 0 Client: used for I/O Control */
131
static int cpld_reg0_probe(struct i2c_client *client,
132
const struct i2c_device_id *id)
136
struct i2c_msg msg[2] = {
138
.addr = client->addr,
144
.addr = client->addr,
151
/* Clear ATA_RSTn and ATA_PWD bits to enable ATA operation. */
152
i2c_transfer(client->adapter, msg, 1);
153
data &= ~(DM646X_EVM_ATA_RST | DM646X_EVM_ATA_PWD);
154
i2c_transfer(client->adapter, msg + 1, 1);
160
static const struct i2c_device_id cpld_reg_ids[] = {
165
static struct i2c_driver dm6467evm_cpld_driver = {
166
.driver.name = "cpld_reg0",
167
.id_table = cpld_reg_ids,
168
.probe = cpld_reg0_probe,
173
static struct gpio_led evm_leds[] = {
174
{ .name = "DS1", .active_low = 1, },
175
{ .name = "DS2", .active_low = 1, },
176
{ .name = "DS3", .active_low = 1, },
177
{ .name = "DS4", .active_low = 1, },
180
static const struct gpio_led_platform_data evm_led_data = {
181
.num_leds = ARRAY_SIZE(evm_leds),
185
static struct platform_device *evm_led_dev;
187
static int evm_led_setup(struct i2c_client *client, int gpio,
188
unsigned int ngpio, void *c)
190
struct gpio_led *leds = evm_leds;
198
evm_led_dev = platform_device_alloc("leds-gpio", 0);
199
platform_device_add_data(evm_led_dev, &evm_led_data,
200
sizeof(evm_led_data));
202
evm_led_dev->dev.parent = &client->dev;
203
status = platform_device_add(evm_led_dev);
205
platform_device_put(evm_led_dev);
211
static int evm_led_teardown(struct i2c_client *client, int gpio,
212
unsigned ngpio, void *c)
215
platform_device_unregister(evm_led_dev);
221
static int evm_sw_gpio[4] = { -EINVAL, -EINVAL, -EINVAL, -EINVAL };
223
static int evm_sw_setup(struct i2c_client *client, int gpio,
224
unsigned ngpio, void *c)
230
for (i = 0; i < 4; ++i) {
231
snprintf(label, 10, "user_sw%d", i);
232
status = gpio_request(gpio, label);
235
evm_sw_gpio[i] = gpio++;
237
status = gpio_direction_input(evm_sw_gpio[i]);
239
gpio_free(evm_sw_gpio[i]);
240
evm_sw_gpio[i] = -EINVAL;
244
status = gpio_export(evm_sw_gpio[i], 0);
246
gpio_free(evm_sw_gpio[i]);
247
evm_sw_gpio[i] = -EINVAL;
253
for (i = 0; i < 4; ++i) {
254
if (evm_sw_gpio[i] != -EINVAL) {
255
gpio_free(evm_sw_gpio[i]);
256
evm_sw_gpio[i] = -EINVAL;
262
static int evm_sw_teardown(struct i2c_client *client, int gpio,
263
unsigned ngpio, void *c)
267
for (i = 0; i < 4; ++i) {
268
if (evm_sw_gpio[i] != -EINVAL) {
269
gpio_unexport(evm_sw_gpio[i]);
270
gpio_free(evm_sw_gpio[i]);
271
evm_sw_gpio[i] = -EINVAL;
277
static int evm_pcf_setup(struct i2c_client *client, int gpio,
278
unsigned int ngpio, void *c)
285
status = evm_sw_setup(client, gpio, 4, c);
289
return evm_led_setup(client, gpio+4, 4, c);
292
static int evm_pcf_teardown(struct i2c_client *client, int gpio,
293
unsigned int ngpio, void *c)
297
evm_sw_teardown(client, gpio, 4, c);
298
evm_led_teardown(client, gpio+4, 4, c);
303
static struct pcf857x_platform_data pcf_data = {
304
.gpio_base = DAVINCI_N_GPIO+1,
305
.setup = evm_pcf_setup,
306
.teardown = evm_pcf_teardown,
309
/* Most of this EEPROM is unused, but U-Boot uses some data:
310
* - 0x7f00, 6 bytes Ethernet Address
311
* - ... newer boards may have more
314
static struct at24_platform_data eeprom_info = {
315
.byte_len = (256*1024) / 8,
317
.flags = AT24_FLAG_ADDR16,
318
.setup = davinci_get_mac_addr,
319
.context = (void *)0x7f00,
322
static u8 dm646x_iis_serializer_direction[] = {
323
TX_MODE, RX_MODE, INACTIVE_MODE, INACTIVE_MODE,
326
static u8 dm646x_dit_serializer_direction[] = {
330
static struct snd_platform_data dm646x_evm_snd_data[] = {
332
.tx_dma_offset = 0x400,
333
.rx_dma_offset = 0x400,
334
.op_mode = DAVINCI_MCASP_IIS_MODE,
335
.num_serializer = ARRAY_SIZE(dm646x_iis_serializer_direction),
337
.serial_dir = dm646x_iis_serializer_direction,
338
.asp_chan_q = EVENTQ_0,
341
.tx_dma_offset = 0x400,
343
.op_mode = DAVINCI_MCASP_DIT_MODE,
344
.num_serializer = ARRAY_SIZE(dm646x_dit_serializer_direction),
346
.serial_dir = dm646x_dit_serializer_direction,
347
.asp_chan_q = EVENTQ_0,
351
static struct i2c_client *cpld_client;
353
static int cpld_video_probe(struct i2c_client *client,
354
const struct i2c_device_id *id)
356
cpld_client = client;
360
static int __devexit cpld_video_remove(struct i2c_client *client)
366
static const struct i2c_device_id cpld_video_id[] = {
371
static struct i2c_driver cpld_video_driver = {
373
.name = "cpld_video",
375
.probe = cpld_video_probe,
376
.remove = cpld_video_remove,
377
.id_table = cpld_video_id,
380
static void evm_init_cpld(void)
382
i2c_add_driver(&cpld_video_driver);
385
static struct i2c_board_info __initdata i2c_info[] = {
387
I2C_BOARD_INFO("24c256", 0x50),
388
.platform_data = &eeprom_info,
391
I2C_BOARD_INFO("pcf8574a", 0x38),
392
.platform_data = &pcf_data,
395
I2C_BOARD_INFO("cpld_reg0", 0x3a),
398
I2C_BOARD_INFO("tlv320aic33", 0x18),
401
I2C_BOARD_INFO("cpld_video", 0x3b),
404
I2C_BOARD_INFO("cdce949", 0x6c),
408
static struct davinci_i2c_platform_data i2c_pdata = {
409
.bus_freq = 100 /* kHz */,
410
.bus_delay = 0 /* usec */,
413
#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
414
#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
415
#define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
416
#define VCH2CLK_SYSCLK8 (BIT(9))
417
#define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
418
#define VCH3CLK_MASK (BIT_MASK(14) | BIT_MASK(13) | BIT_MASK(12))
419
#define VCH3CLK_SYSCLK8 (BIT(13))
420
#define VCH3CLK_AUXCLK (BIT(14) | BIT(13))
422
#define VIDCH2CLK (BIT(10))
423
#define VIDCH3CLK (BIT(11))
424
#define VIDCH1CLK (BIT(4))
425
#define TVP7002_INPUT (BIT(4))
426
#define TVP5147_INPUT (~BIT(4))
427
#define VPIF_INPUT_ONE_CHANNEL (BIT(5))
428
#define VPIF_INPUT_TWO_CHANNEL (~BIT(5))
429
#define TVP5147_CH0 "tvp514x-0"
430
#define TVP5147_CH1 "tvp514x-1"
432
static void __iomem *vpif_vidclkctl_reg;
433
static void __iomem *vpif_vsclkdis_reg;
434
/* spin lock for updating above registers */
435
static spinlock_t vpif_reg_lock;
437
static int set_vpif_clock(int mux_mode, int hd)
444
if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
447
/* disable the clock */
448
spin_lock_irqsave(&vpif_reg_lock, flags);
449
value = __raw_readl(vpif_vsclkdis_reg);
450
value |= (VIDCH3CLK | VIDCH2CLK);
451
__raw_writel(value, vpif_vsclkdis_reg);
452
spin_unlock_irqrestore(&vpif_reg_lock, flags);
454
val = i2c_smbus_read_byte(cpld_client);
463
err = i2c_smbus_write_byte(cpld_client, val);
467
value = __raw_readl(vpif_vidclkctl_reg);
468
value &= ~(VCH2CLK_MASK);
469
value &= ~(VCH3CLK_MASK);
472
value |= (VCH2CLK_SYSCLK8 | VCH3CLK_SYSCLK8);
474
value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
476
__raw_writel(value, vpif_vidclkctl_reg);
478
spin_lock_irqsave(&vpif_reg_lock, flags);
479
value = __raw_readl(vpif_vsclkdis_reg);
480
/* enable the clock */
481
value &= ~(VIDCH3CLK | VIDCH2CLK);
482
__raw_writel(value, vpif_vsclkdis_reg);
483
spin_unlock_irqrestore(&vpif_reg_lock, flags);
488
static struct vpif_subdev_info dm646x_vpif_subdev[] = {
492
I2C_BOARD_INFO("adv7343", 0x2a),
498
I2C_BOARD_INFO("ths7303", 0x2c),
503
static const char *output[] = {
509
static struct vpif_display_config dm646x_vpif_display_config = {
510
.set_clock = set_vpif_clock,
511
.subdevinfo = dm646x_vpif_subdev,
512
.subdev_count = ARRAY_SIZE(dm646x_vpif_subdev),
514
.output_count = ARRAY_SIZE(output),
515
.card_name = "DM646x EVM",
519
* setup_vpif_input_path()
520
* @channel: channel id (0 - CH0, 1 - CH1)
521
* @sub_dev_name: ptr sub device name
523
* This will set vpif input to capture data from tvp514x or
526
static int setup_vpif_input_path(int channel, const char *sub_dev_name)
531
/* for channel 1, we don't do anything */
538
val = i2c_smbus_read_byte(cpld_client);
542
if (!strcmp(sub_dev_name, TVP5147_CH0) ||
543
!strcmp(sub_dev_name, TVP5147_CH1))
544
val &= TVP5147_INPUT;
546
val |= TVP7002_INPUT;
548
err = i2c_smbus_write_byte(cpld_client, val);
555
* setup_vpif_input_channel_mode()
556
* @mux_mode: mux mode. 0 - 1 channel or (1) - 2 channel
558
* This will setup input mode to one channel (TVP7002) or 2 channel (TVP5147)
560
static int setup_vpif_input_channel_mode(int mux_mode)
567
if (!vpif_vidclkctl_reg || !cpld_client)
570
val = i2c_smbus_read_byte(cpld_client);
574
spin_lock_irqsave(&vpif_reg_lock, flags);
575
value = __raw_readl(vpif_vidclkctl_reg);
577
val &= VPIF_INPUT_TWO_CHANNEL;
580
val |= VPIF_INPUT_ONE_CHANNEL;
583
__raw_writel(value, vpif_vidclkctl_reg);
584
spin_unlock_irqrestore(&vpif_reg_lock, flags);
586
err = i2c_smbus_write_byte(cpld_client, val);
593
static struct tvp514x_platform_data tvp5146_pdata = {
599
#define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
601
static struct vpif_subdev_info vpif_capture_sdev_info[] = {
605
I2C_BOARD_INFO("tvp5146", 0x5d),
606
.platform_data = &tvp5146_pdata,
608
.input = INPUT_CVBS_VI2B,
609
.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
612
.if_type = VPIF_IF_BT656,
621
I2C_BOARD_INFO("tvp5146", 0x5c),
622
.platform_data = &tvp5146_pdata,
624
.input = INPUT_SVIDEO_VI2C_VI1C,
625
.output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
628
.if_type = VPIF_IF_BT656,
636
static const struct vpif_input dm6467_ch0_inputs[] = {
641
.type = V4L2_INPUT_TYPE_CAMERA,
642
.std = TVP514X_STD_ALL,
644
.subdev_name = TVP5147_CH0,
648
static const struct vpif_input dm6467_ch1_inputs[] = {
653
.type = V4L2_INPUT_TYPE_CAMERA,
654
.std = TVP514X_STD_ALL,
656
.subdev_name = TVP5147_CH1,
660
static struct vpif_capture_config dm646x_vpif_capture_cfg = {
661
.setup_input_path = setup_vpif_input_path,
662
.setup_input_channel_mode = setup_vpif_input_channel_mode,
663
.subdev_info = vpif_capture_sdev_info,
664
.subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
666
.inputs = dm6467_ch0_inputs,
667
.input_count = ARRAY_SIZE(dm6467_ch0_inputs),
670
.inputs = dm6467_ch1_inputs,
671
.input_count = ARRAY_SIZE(dm6467_ch1_inputs),
675
static void __init evm_init_video(void)
677
vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
678
vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
679
if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
680
pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
683
spin_lock_init(&vpif_reg_lock);
685
dm646x_setup_vpif(&dm646x_vpif_display_config,
686
&dm646x_vpif_capture_cfg);
689
static void __init evm_init_i2c(void)
691
davinci_init_i2c(&i2c_pdata);
692
i2c_add_driver(&dm6467evm_cpld_driver);
693
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
698
#define CDCE949_XIN_RATE 27000000
700
/* CDCE949 support - "lpsc" field is overridden to work as clock number */
701
static struct clk cdce_clk_in = {
703
.rate = CDCE949_XIN_RATE,
706
static struct clk_lookup cdce_clks[] = {
707
CLK(NULL, "xin", &cdce_clk_in),
708
CLK(NULL, NULL, NULL),
711
static void __init cdce_clk_init(void)
713
struct clk_lookup *c;
716
for (c = cdce_clks; c->clk; c++) {
723
#define DM6467T_EVM_REF_FREQ 33000000
725
static void __init davinci_map_io(void)
729
if (machine_is_davinci_dm6467tevm())
730
davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
735
static struct davinci_uart_config uart_config __initdata = {
736
.enabled_uarts = (1 << 0),
739
#define DM646X_EVM_PHY_ID "0:01"
741
* The following EDMA channels/slots are not being used by drivers (for
742
* example: Timer, GPIO, UART events etc) on dm646x, hence they are being
743
* reserved for codecs on the DSP side.
745
static const s16 dm646x_dma_rsv_chans[][2] = {
746
/* (offset, number) */
755
static const s16 dm646x_dma_rsv_slots[][2] = {
756
/* (offset, number) */
766
static struct edma_rsv_info dm646x_edma_rsv[] = {
768
.rsv_chans = dm646x_dma_rsv_chans,
769
.rsv_slots = dm646x_dma_rsv_slots,
773
static __init void evm_init(void)
775
struct davinci_soc_info *soc_info = &davinci_soc_info;
778
davinci_serial_init(&uart_config);
779
dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
780
dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
782
if (machine_is_davinci_dm6467tevm())
783
davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
785
platform_device_register(&davinci_nand_device);
787
dm646x_init_edma(dm646x_edma_rsv);
792
soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
795
MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
796
.atag_offset = 0x100,
797
.map_io = davinci_map_io,
798
.init_irq = davinci_irq_init,
799
.timer = &davinci_timer,
800
.init_machine = evm_init,
801
.dma_zone_size = SZ_128M,
804
MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
805
.atag_offset = 0x100,
806
.map_io = davinci_map_io,
807
.init_irq = davinci_irq_init,
808
.timer = &davinci_timer,
809
.init_machine = evm_init,
810
.dma_zone_size = SZ_128M,