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/******************************************************************************
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* (C)Copyright 1998,1999 SysKonnect,
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* a business unit of Schneider & Koch & Co. Datensysteme GmbH.
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* See the file "skfddi.c" for further information.
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* The information in this file is provided "AS IS" without warranty.
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******************************************************************************/
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Physical Connection Management
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* Hardware independent state machine implemantation
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* The following external SMT functions are referenced :
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* The following external HW dependent functions are referenced :
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* The following HW dependent events are required :
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#include "h/supern_2.h"
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#include "h/smtstate.h"
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static const char ID_sccs[] = "@(#)pcmplc.c 2.55 99/08/05 (C) SK " ;
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extern int snmp_fddi_trap(
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struct s_smc * smc, int type, int index
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extern int plc_is_installed(
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#define GO_STATE(x) (mib->fddiPORTPCMState = (x)|AFLAG)
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#define ACTIONS_DONE() (mib->fddiPORTPCMState &= ~AFLAG)
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#define ACTIONS(x) (x|AFLAG)
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* symbolic state names
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static const char * const pcm_states[] = {
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"PC0_OFF","PC1_BREAK","PC2_TRACE","PC3_CONNECT","PC4_NEXT",
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"PC5_SIGNAL","PC6_JOIN","PC7_VERIFY","PC8_ACTIVE","PC9_MAINT"
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* symbolic event names
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static const char * const pcm_events[] = {
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"NONE","PC_START","PC_STOP","PC_LOOP","PC_JOIN","PC_SIGNAL",
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"PC_REJECT","PC_MAINT","PC_TRACE","PC_PDR",
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"PC_ENABLE","PC_DISABLE",
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"PC_QLS","PC_ILS","PC_MLS","PC_HLS","PC_LS_PDR","PC_LS_NONE",
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"PC_TIMEOUT_TB_MAX","PC_TIMEOUT_TB_MIN",
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"PC_TIMEOUT_C_MIN","PC_TIMEOUT_T_OUT",
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"PC_TIMEOUT_TL_MIN","PC_TIMEOUT_T_NEXT","PC_TIMEOUT_LCT",
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* PCL-S control register
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* this register in the PLC-S controls the scrambling parameters
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#define PLCS_CONTROL_C_U 0
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#define PLCS_CONTROL_C_S (PL_C_SDOFF_ENABLE | PL_C_SDON_ENABLE | \
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#define PLCS_FASSERT_U 0
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#define PLCS_FASSERT_S 0xFd76 /* 52.0 us */
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#define PLCS_FDEASSERT_U 0
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#define PLCS_FDEASSERT_S 0
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* PCL-S control register
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* this register in the PLC-S controls the scrambling parameters
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* can be patched for ANSI compliance if standard changes
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static const u_char plcs_control_c_u[17] = "PLC_CNTRL_C_U=\0\0" ;
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static const u_char plcs_control_c_s[17] = "PLC_CNTRL_C_S=\01\02" ;
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#define PLCS_CONTROL_C_U (plcs_control_c_u[14] | (plcs_control_c_u[15]<<8))
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#define PLCS_CONTROL_C_S (plcs_control_c_s[14] | (plcs_control_c_s[15]<<8))
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#endif /* nMOT_ELM */
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/* struct definition see 'cmtdef.h' (also used by CFM) */
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#define LCT_LEM_MAX 255
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* PLC timing parameter
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#define PLC_MS(m) ((int)((0x10000L-(m*100000L/2048))))
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#define SLOW_TL_MIN PLC_MS(6)
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#define SLOW_C_MIN PLC_MS(10)
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static const struct plt {
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int timer ; /* relative plc timer address */
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int para ; /* default timing parameters */
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{ PL_C_MIN, SLOW_C_MIN }, /* min t. to remain Connect State */
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{ PL_TL_MIN, SLOW_TL_MIN }, /* min t. to transmit a Line State */
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{ PL_TB_MIN, TP_TB_MIN }, /* min break time */
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{ PL_T_OUT, TP_T_OUT }, /* Signaling timeout */
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{ PL_LC_LENGTH, TP_LC_LENGTH }, /* Link Confidence Test Time */
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{ PL_T_SCRUB, TP_T_SCRUB }, /* Scrub Time == MAC TVX time ! */
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{ PL_NS_MAX, TP_NS_MAX }, /* max t. that noise is tolerated */
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* Do we need the EBUF error during signaling, too, to detect SUPERNET_3
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static const int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
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PL_PCM_ENABLED | PL_SELF_TEST | PL_EBUF_ERR;
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#else /* SUPERNET_3 */
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* We do NOT need the elasticity buffer error during signaling.
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static int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
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PL_PCM_ENABLED | PL_SELF_TEST ;
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#endif /* SUPERNET_3 */
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static const int plc_imsk_act = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
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PL_PCM_ENABLED | PL_SELF_TEST | PL_EBUF_ERR;
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/* internal functions */
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static void pcm_fsm(struct s_smc *smc, struct s_phy *phy, int cmd);
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static void pc_rcode_actions(struct s_smc *smc, int bit, struct s_phy *phy);
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static void pc_tcode_actions(struct s_smc *smc, const int bit, struct s_phy *phy);
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static void reset_lem_struct(struct s_phy *phy);
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static void plc_init(struct s_smc *smc, int p);
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static void sm_ph_lem_start(struct s_smc *smc, int np, int threshold);
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static void sm_ph_lem_stop(struct s_smc *smc, int np);
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static void sm_ph_linestate(struct s_smc *smc, int phy, int ls);
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static void real_init_plc(struct s_smc *smc);
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* SMT timer interface
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static void start_pcm_timer0(struct s_smc *smc, u_long value, int event,
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phy->timer0_exp = FALSE ; /* clear timer event flag */
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smt_timer_start(smc,&phy->pcm_timer0,value,
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EV_TOKEN(EVENT_PCM+phy->np,event)) ;
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* SMT timer interface
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static void stop_pcm_timer0(struct s_smc *smc, struct s_phy *phy)
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if (phy->pcm_timer0.tm_active)
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smt_timer_stop(smc,&phy->pcm_timer0) ;
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init PCM state machine (called by driver)
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clear all PCM vars and flags
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void pcm_init(struct s_smc *smc)
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struct fddi_mib_p *mib ;
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for (np = 0,phy = smc->y ; np < NUMPHYS ; np++,phy++) {
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/* Indicates the type of PHY being used */
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mib->fddiPORTPCMState = ACTIONS(PC0_OFF) ;
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switch (smc->s.sas) {
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mib->fddiPORTMy_Type = (np == PS) ? TS : TM ;
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mib->fddiPORTMy_Type = (np == PA) ? TA :
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(np == PB) ? TB : TM ;
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mib->fddiPORTMy_Type = TM ;
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mib->fddiPORTMy_Type = (np == PS) ? TS : TNONE ;
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mib->fddiPORTHardwarePresent = (np == PS) ? TRUE :
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smc->y[PA].mib->fddiPORTPCMState = PC0_OFF ;
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smc->y[PB].mib->fddiPORTPCMState = PC0_OFF ;
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mib->fddiPORTMy_Type = (np == PB) ? TB : TA ;
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phy->pmd_scramble = 0 ;
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switch (phy->pmd_type[PMD_SK_PMD]) {
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mib->fddiPORTPMDClass = MIB_PMDCLASS_MULTI ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_LCF ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
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phy->pmd_scramble = TRUE ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
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phy->pmd_scramble = TRUE ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE1 ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE2 ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE2 ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_SINGLE1 ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_UNKNOWN ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_TP ;
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mib->fddiPORTPMDClass = MIB_PMDCLASS_UNKNOWN ;
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* A and B port can be on primary and secondary path
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switch (mib->fddiPORTMy_Type) {
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mib->fddiPORTAvailablePaths |= MIB_PATH_S ;
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mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
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mib->fddiPORTRequestedPaths[2] =
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MIB_P_PATH_CON_ALTER |
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MIB_P_PATH_SEC_PREFER ;
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mib->fddiPORTRequestedPaths[3] =
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MIB_P_PATH_CON_ALTER |
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MIB_P_PATH_SEC_PREFER |
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mib->fddiPORTAvailablePaths |= MIB_PATH_S ;
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mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
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mib->fddiPORTRequestedPaths[2] =
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MIB_P_PATH_PRIM_PREFER ;
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mib->fddiPORTRequestedPaths[3] =
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MIB_P_PATH_PRIM_PREFER |
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MIB_P_PATH_CON_PREFER |
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mib->fddiPORTAvailablePaths |= MIB_PATH_S ;
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mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
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mib->fddiPORTRequestedPaths[2] =
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MIB_P_PATH_CON_ALTER |
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MIB_P_PATH_PRIM_PREFER ;
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mib->fddiPORTRequestedPaths[3] =
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MIB_P_PATH_CON_ALTER |
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MIB_P_PATH_PRIM_PREFER ;
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mib->fddiPORTRequestedPaths[1] = MIB_P_PATH_LOCAL ;
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mib->fddiPORTRequestedPaths[2] =
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MIB_P_PATH_SEC_ALTER |
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MIB_P_PATH_PRIM_ALTER ;
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mib->fddiPORTRequestedPaths[3] = 0 ;
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phy->pc_lem_fail = FALSE ;
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mib->fddiPORTPCMStateX = mib->fddiPORTPCMState ;
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mib->fddiPORTLCTFail_Ct = 0 ;
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mib->fddiPORTBS_Flag = 0 ;
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mib->fddiPORTCurrentPath = MIB_PATH_ISOLATED ;
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mib->fddiPORTNeighborType = TNONE ;
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phy->phy_name = '0' + np - PM ;
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phy->phy_name = 'A' + np ;
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phy->wc_flag = FALSE ; /* set by SMT */
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memset((char *)&phy->lem,0,sizeof(struct lem_counter)) ;
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reset_lem_struct(phy) ;
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memset((char *)&phy->plc,0,sizeof(struct s_plc)) ;
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phy->plc.p_state = PS_OFF ;
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for (i = 0 ; i < NUMBITS ; i++) {
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void init_plc(struct s_smc *smc)
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* this is an obsolete public entry point that has to remain
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* for compat. It is used by various drivers.
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* the work is now done in real_init_plc()
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* which is called from pcm_init() ;
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static void real_init_plc(struct s_smc *smc)
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for (p = 0 ; p < NUMPHYS ; p++)
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static void plc_init(struct s_smc *smc, int p)
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int rev ; /* Revision of PLC-x */
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/* transit PCM state machine to MAINT state */
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outpw(PLC(p,PL_CNTRL_B),0) ;
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outpw(PLC(p,PL_CNTRL_B),PL_PCM_STOP) ;
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outpw(PLC(p,PL_CNTRL_A),0) ;
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* if PLC-S then set control register C
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rev = inpw(PLC(p,PL_STATUS_A)) & PLC_REV_MASK ;
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if (rev != PLC_REVISION_A)
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if (smc->y[p].pmd_scramble) {
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outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_S) ;
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outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_S) ;
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outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_S) ;
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outpw(PLC(p,PL_CNTRL_C),PLCS_CONTROL_C_U) ;
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outpw(PLC(p,PL_T_FOT_ASS),PLCS_FASSERT_U) ;
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outpw(PLC(p,PL_T_FOT_DEASS),PLCS_FDEASSERT_U) ;
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for ( i = 0 ; pltm[i].timer; i++) /* set timer parameter reg */
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outpw(PLC(p,pltm[i].timer),pltm[i].para) ;
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(void)inpw(PLC(p,PL_INTR_EVENT)) ; /* clear interrupt event reg */
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plc_clear_irq(smc,p) ;
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outpw(PLC(p,PL_INTR_MASK),plc_imsk_na); /* enable non active irq's */
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* if PCM is configured for class s, it will NOT go to the
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* REMOVE state if offline (page 3-36;)
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* in the concentrator, all inactive PHYS always must be in
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* there's no real need to use this feature at all ..
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if ((smc->s.sas == SMT_SAS) && (p == PS)) {
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outpw(PLC(p,PL_CNTRL_B),PL_CLASS_S) ;
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* control PCM state machine
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static void plc_go_state(struct s_smc *smc, int p, int state)
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port = (HW_PTR) (PLC(p,PL_CNTRL_B)) ;
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val = inpw(port) & ~(PL_PCM_CNTRL | PL_MAINT) ;
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outpw(port,val | state) ;
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* read current line state (called by ECM & PCM)
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int sm_pm_get_ls(struct s_smc *smc, int phy)
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if (!plc_is_installed(smc,phy))
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state = inpw(PLC(phy,PL_STATUS_A)) & PL_LINE_ST ;
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static int plc_send_bits(struct s_smc *smc, struct s_phy *phy, int len)
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int np = phy->np ; /* PHY index */
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/* create bit vector */
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for (i = len-1,n = 0 ; i >= 0 ; i--) {
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n = (n<<1) | phy->t_val[phy->bitn+i] ;
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if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {
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printf("PL_PCM_SIGNAL is set\n") ;
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/* write bit[n] & length = 1 to regs */
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outpw(PLC(np,PL_VECTOR_LEN),len-1) ; /* len=nr-1 */
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outpw(PLC(np,PL_XMIT_VECTOR),n) ;
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if (smc->debug.d_plc & 0x80)
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if (debug.d_plc & 0x80)
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printf("SIGNALING bit %d .. %d\n",phy->bitn,phy->bitn+len-1) ;
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void plc_config_mux(struct s_smc *smc, int mux)
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if (smc->s.sas != SMT_DAS)
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if (mux == MUX_WRAPB) {
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SETMASK(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL,PL_CONFIG_CNTRL) ;
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SETMASK(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP,PL_SC_REM_LOOP) ;
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CLEAR(PLC(PA,PL_CNTRL_B),PL_CONFIG_CNTRL) ;
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CLEAR(PLC(PA,PL_CNTRL_A),PL_SC_REM_LOOP) ;
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CLEAR(PLC(PB,PL_CNTRL_B),PL_CONFIG_CNTRL) ;
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CLEAR(PLC(PB,PL_CNTRL_A),PL_SC_REM_LOOP) ;
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called by dispatcher & fddi_init() (driver)
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void pcm(struct s_smc *smc, const int np, int event)
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struct fddi_mib_p *mib ;
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* ignore 2nd PHY if SAS
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if ((np != PS) && (smc->s.sas == SMT_SAS))
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oldstate = mib->fddiPORTPCMState ;
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DB_PCM("PCM %c: state %s",
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(mib->fddiPORTPCMState & AFLAG) ? "ACTIONS " : "") ;
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DB_PCM("%s, event %s\n",
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pcm_states[mib->fddiPORTPCMState & ~AFLAG],
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state = mib->fddiPORTPCMState ;
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pcm_fsm(smc,phy,event) ;
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} while (state != mib->fddiPORTPCMState) ;
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* because the PLC does the bit signaling for us,
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* we're always in SIGNAL state
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* the MIB want's to see CONNECT
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* we therefore fake an entry in the MIB
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if (state == PC5_SIGNAL)
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mib->fddiPORTPCMStateX = PC3_CONNECT ;
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mib->fddiPORTPCMStateX = state ;
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if ( mib->fddiPORTPCMState != oldstate &&
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((oldstate == PC8_ACTIVE) || (mib->fddiPORTPCMState == PC8_ACTIVE))) {
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smt_srf_event(smc,SMT_EVENT_PORT_PATH_CHANGE,
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(int) (INDEX_PORT+ phy->np),0) ;
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/* check whether a snmp-trap has to be sent */
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if ( mib->fddiPORTPCMState != oldstate ) {
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/* a real state change took place */
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DB_SNMP ("PCM from %d to %d\n", oldstate, mib->fddiPORTPCMState);
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if ( mib->fddiPORTPCMState == PC0_OFF ) {
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/* send first trap */
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snmp_fddi_trap (smc, 1, (int) mib->fddiPORTIndex );
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} else if ( oldstate == PC0_OFF ) {
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/* send second trap */
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snmp_fddi_trap (smc, 2, (int) mib->fddiPORTIndex );
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} else if ( mib->fddiPORTPCMState != PC2_TRACE &&
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oldstate == PC8_ACTIVE ) {
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/* send third trap */
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snmp_fddi_trap (smc, 3, (int) mib->fddiPORTIndex );
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} else if ( mib->fddiPORTPCMState == PC8_ACTIVE ) {
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/* send fourth trap */
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snmp_fddi_trap (smc, 4, (int) mib->fddiPORTIndex );
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pcm_state_change(smc,np,state) ;
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static void pcm_fsm(struct s_smc *smc, struct s_phy *phy, int cmd)
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int np = phy->np ; /* PHY index */
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struct fddi_mib_p *mib ;
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u_short plc_rev ; /* Revision of the plc */
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#endif /* nMOT_ELM */
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* general transitions independent of state
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if (mib->fddiPORTPCMState != PC9_MAINT) {
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AIX_EVENT(smc, (u_long) FDDI_RING_STATUS, (u_long)
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FDDI_PORT_EVENT, (u_long) FDDI_PORT_STOP,
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smt_get_port_event_word(smc));
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if (mib->fddiPORTPCMState != PC9_MAINT)
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GO_STATE(PC1_BREAK) ;
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GO_STATE(PC9_MAINT) ;
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AIX_EVENT(smc, (u_long) FDDI_RING_STATUS, (u_long)
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FDDI_PORT_EVENT, (u_long) FDDI_PORT_DISABLED,
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smt_get_port_event_word(smc));
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case PC_TIMEOUT_LCT :
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/* if long or extended LCT */
714
stop_pcm_timer0(smc,phy) ;
715
CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
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/* end of LCT is indicate by PCM_CODE (initiate PCM event) */
720
switch(mib->fddiPORTPCMState) {
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case ACTIONS(PC0_OFF) :
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stop_pcm_timer0(smc,phy) ;
723
outpw(PLC(np,PL_CNTRL_A),0) ;
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CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
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CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
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sm_ph_lem_stop(smc,np) ; /* disable LEM */
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phy->cf_loop = FALSE ;
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phy->cf_join = FALSE ;
729
queue_event(smc,EVENT_CFM,CF_JOIN+np) ;
730
plc_go_state(smc,np,PL_PCM_STOP) ;
731
mib->fddiPORTConnectState = PCM_DISABLED ;
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if (cmd == PC_MAINT) {
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GO_STATE(PC9_MAINT) ;
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case ACTIONS(PC1_BREAK) :
742
/* Stop the LCT timer if we came from Signal state */
743
stop_pcm_timer0(smc,phy) ;
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plc_go_state(smc,np,0) ;
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CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
747
CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
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sm_ph_lem_stop(smc,np) ; /* disable LEM */
750
* if vector is already loaded, go to OFF to clear PCM_SIGNAL
753
if (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL) {
754
plc_go_state(smc,np,PL_PCM_STOP) ;
759
* Go to OFF state in any case.
761
plc_go_state(smc,np,PL_PCM_STOP) ;
763
if (mib->fddiPORTPC_Withhold == PC_WH_NONE)
764
mib->fddiPORTConnectState = PCM_CONNECTING ;
765
phy->cf_loop = FALSE ;
766
phy->cf_join = FALSE ;
767
queue_event(smc,EVENT_CFM,CF_JOIN+np) ;
768
phy->ls_flag = FALSE ;
769
phy->pc_mode = PM_NONE ; /* needed by CFM */
770
phy->bitn = 0 ; /* bit signaling start bit */
771
for (i = 0 ; i < 3 ; i++)
772
pc_tcode_actions(smc,i,phy) ;
774
/* Set the non-active interrupt mask register */
775
outpw(PLC(np,PL_INTR_MASK),plc_imsk_na) ;
778
* If the LCT was stopped. There might be a
779
* PCM_CODE interrupt event present.
780
* This must be cleared.
782
(void)inpw(PLC(np,PL_INTR_EVENT)) ;
784
/* Get the plc revision for revision dependent code */
785
plc_rev = inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK ;
787
if (plc_rev != PLC_REV_SN3)
791
* No supernet III PLC, so set Xmit verctor and
792
* length BEFORE starting the state machine.
794
if (plc_send_bits(smc,phy,3)) {
800
* Now give the Start command.
801
* - The start command shall be done before setting the bits
802
* to be signaled. (In PLC-S description and PLCS in SN3.
803
* - The start command shall be issued AFTER setting the
804
* XMIT vector and the XMIT length register.
806
* We do it exactly according this specs for the old PLC and
807
* the new PLCS inside the SN3.
808
* For the usual PLCS we try it the way it is done for the
809
* old PLC and set the XMIT registers again, if the PLC is
810
* not in SIGNAL state. This is done according to an PLCS
814
plc_go_state(smc,np,PL_PCM_START) ;
817
* workaround for PLC-S eng. sample errata
820
if (!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
822
if (((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) !=
824
!(inpw(PLC(np,PL_STATUS_B)) & PL_PCM_SIGNAL))
825
#endif /* nMOT_ELM */
828
* Set register again (PLCS errata) or the first time
831
(void) plc_send_bits(smc,phy,3) ;
837
GO_STATE(PC5_SIGNAL) ;
838
plc->p_state = PS_BIT3 ;
845
case ACTIONS(PC2_TRACE) :
846
plc_go_state(smc,np,PL_PCM_TRACE) ;
852
case PC3_CONNECT : /* these states are done by hardware */
856
case ACTIONS(PC5_SIGNAL) :
859
if ((cmd != PC_SIGNAL) && (cmd != PC_TIMEOUT_LCT))
861
switch (plc->p_state) {
863
for (i = 0 ; i <= 2 ; i++)
864
pc_rcode_actions(smc,i,phy) ;
865
pc_tcode_actions(smc,3,phy) ;
866
plc->p_state = PS_BIT4 ;
870
if (plc_send_bits(smc,phy,1)) {
875
pc_rcode_actions(smc,3,phy) ;
876
for (i = 4 ; i <= 6 ; i++)
877
pc_tcode_actions(smc,i,phy) ;
878
plc->p_state = PS_BIT7 ;
882
if (plc_send_bits(smc,phy,3)) {
887
for (i = 3 ; i <= 6 ; i++)
888
pc_rcode_actions(smc,i,phy) ;
889
plc->p_state = PS_LCT ;
893
sm_ph_lem_start(smc,np,(int)smc->s.lct_short) ; /* enable LEM */
895
i = inpw(PLC(np,PL_CNTRL_B)) & ~PL_PC_LOOP ;
896
outpw(PLC(np,PL_CNTRL_B),i) ; /* must be cleared */
897
outpw(PLC(np,PL_CNTRL_B),i | PL_RLBP) ;
900
/* check for local LCT failure */
901
pc_tcode_actions(smc,7,phy) ;
905
plc->p_state = PS_BIT8 ;
909
if (plc_send_bits(smc,phy,1)) {
914
/* check for remote LCT failure */
915
pc_rcode_actions(smc,7,phy) ;
916
if (phy->t_val[7] || phy->r_val[7]) {
917
plc_go_state(smc,np,PL_PCM_STOP) ;
918
GO_STATE(PC1_BREAK) ;
921
for (i = 8 ; i <= 9 ; i++)
922
pc_tcode_actions(smc,i,phy) ;
923
plc->p_state = PS_JOIN ;
927
if (plc_send_bits(smc,phy,2)) {
932
for (i = 8 ; i <= 9 ; i++)
933
pc_rcode_actions(smc,i,phy) ;
934
plc->p_state = PS_ACTIVE ;
940
case ACTIONS(PC6_JOIN) :
942
* prevent mux error when going from WRAP_A to WRAP_B
944
if (smc->s.sas == SMT_DAS && np == PB &&
945
(smc->y[PA].pc_mode == PM_TREE ||
946
smc->y[PB].pc_mode == PM_TREE)) {
947
SETMASK(PLC(np,PL_CNTRL_A),
948
PL_SC_REM_LOOP,PL_SC_REM_LOOP) ;
949
SETMASK(PLC(np,PL_CNTRL_B),
950
PL_CONFIG_CNTRL,PL_CONFIG_CNTRL) ;
952
SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;
953
SETMASK(PLC(np,PL_CNTRL_B),PL_PC_JOIN,PL_PC_JOIN) ;
958
switch (plc->p_state) {
962
phy->cf_join = TRUE ;
963
queue_event(smc,EVENT_CFM,CF_JOIN+np) ;
966
GO_STATE(PC8_ACTIVE) ;
968
if (cmd == PC_TRACE) {
969
GO_STATE(PC2_TRACE) ;
979
case ACTIONS(PC8_ACTIVE) :
983
sm_ph_lem_start(smc,(int)phy->np,LCT_LEM_MAX) ;
985
phy->tr_flag = FALSE ;
986
mib->fddiPORTConnectState = PCM_ACTIVE ;
988
/* Set the active interrupt mask register */
989
outpw(PLC(np,PL_INTR_MASK),plc_imsk_act) ;
994
/*PC81 is done by PL_TNE_EXPIRED irq */
996
if (cmd == PC_TRACE) {
997
GO_STATE(PC2_TRACE) ;
1000
/*PC88c: is done by TRACE_PROP irq */
1003
case ACTIONS(PC9_MAINT) :
1004
stop_pcm_timer0(smc,phy) ;
1005
CLEAR(PLC(np,PL_CNTRL_B),PL_PC_JOIN) ;
1006
CLEAR(PLC(np,PL_CNTRL_B),PL_LONG) ;
1007
CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ; /* disable LEM int. */
1008
sm_ph_lem_stop(smc,np) ; /* disable LEM */
1009
phy->cf_loop = FALSE ;
1010
phy->cf_join = FALSE ;
1011
queue_event(smc,EVENT_CFM,CF_JOIN+np) ;
1012
plc_go_state(smc,np,PL_PCM_STOP) ;
1013
mib->fddiPORTConnectState = PCM_DISABLED ;
1014
SETMASK(PLC(np,PL_CNTRL_B),PL_MAINT,PL_MAINT) ;
1015
sm_ph_linestate(smc,np,(int) MIB2LS(mib->fddiPORTMaint_LS)) ;
1016
outpw(PLC(np,PL_CNTRL_A),PL_SC_BYPASS) ;
1020
DB_PCMN(1,"PCM %c : MAINT\n",phy->phy_name,0) ;
1022
if (cmd == PC_ENABLE) {
1029
SMT_PANIC(smc,SMT_E0118, SMT_E0118_MSG) ;
1035
* force line state on a PHY output (only in MAINT state)
1037
static void sm_ph_linestate(struct s_smc *smc, int phy, int ls)
1043
cntrl = (inpw(PLC(phy,PL_CNTRL_B)) & ~PL_MAINT_LS) |
1044
PL_PCM_STOP | PL_MAINT ;
1046
case PC_QLS: /* Force Quiet */
1047
cntrl |= PL_M_QUI0 ;
1049
case PC_MLS: /* Force Master */
1050
cntrl |= PL_M_MASTR ;
1052
case PC_HLS: /* Force Halt */
1053
cntrl |= PL_M_HALT ;
1056
case PC_ILS: /* Force Idle */
1057
cntrl |= PL_M_IDLE ;
1059
case PC_LS_PDR: /* Enable repeat filter */
1060
cntrl |= PL_M_TPDR ;
1063
outpw(PLC(phy,PL_CNTRL_B),cntrl) ;
1066
static void reset_lem_struct(struct s_phy *phy)
1068
struct lem_counter *lem = &phy->lem ;
1070
phy->mib->fddiPORTLer_Estimate = 15 ;
1071
lem->lem_float_ber = 15 * 100 ;
1075
* link error monitor
1077
static void lem_evaluate(struct s_smc *smc, struct s_phy *phy)
1081
struct lem_counter *lem = &phy->lem ;
1082
struct fddi_mib_p *mib ;
1090
errors = inpw(PLC(((int) phy->np),PL_LINK_ERR_CTR)) ;
1091
lem->lem_errors += errors ;
1092
mib->fddiPORTLem_Ct += errors ;
1094
errors = lem->lem_errors ;
1096
* calculation is called on a intervall of 8 seconds
1097
* -> this means, that one error in 8 sec. is one of 8*125*10E6
1098
* the same as BER = 10E-9
1100
* -> 9 errors in 8 seconds mean:
1101
* BER = 9 * 10E-9 and this is
1102
* < 10E-8, so the limit of 10E-8 is not reached!
1105
if (!errors) ber = 15 ;
1106
else if (errors <= 9) ber = 9 ;
1107
else if (errors <= 99) ber = 8 ;
1108
else if (errors <= 999) ber = 7 ;
1109
else if (errors <= 9999) ber = 6 ;
1110
else if (errors <= 99999) ber = 5 ;
1111
else if (errors <= 999999) ber = 4 ;
1112
else if (errors <= 9999999) ber = 3 ;
1113
else if (errors <= 99999999) ber = 2 ;
1114
else if (errors <= 999999999) ber = 1 ;
1121
lem->lem_float_ber = lem->lem_float_ber * 7 + ber * 3 ;
1122
lem->lem_float_ber /= 10 ;
1123
mib->fddiPORTLer_Estimate = lem->lem_float_ber / 100 ;
1124
if (mib->fddiPORTLer_Estimate < 4) {
1125
mib->fddiPORTLer_Estimate = 4 ;
1128
if (lem->lem_errors) {
1129
DB_PCMN(1,"LEM %c :\n",phy->np == PB? 'B' : 'A',0) ;
1130
DB_PCMN(1,"errors : %ld\n",lem->lem_errors,0) ;
1131
DB_PCMN(1,"sum_errors : %ld\n",mib->fddiPORTLem_Ct,0) ;
1132
DB_PCMN(1,"current BER : 10E-%d\n",ber/100,0) ;
1133
DB_PCMN(1,"float BER : 10E-(%d/100)\n",lem->lem_float_ber,0) ;
1134
DB_PCMN(1,"avg. BER : 10E-%d\n",
1135
mib->fddiPORTLer_Estimate,0) ;
1138
lem->lem_errors = 0L ;
1141
cond = (mib->fddiPORTLer_Estimate <= mib->fddiPORTLer_Alarm) ?
1143
#ifdef SMT_EXT_CUTOFF
1144
smt_ler_alarm_check(smc,phy,cond) ;
1145
#endif /* nSMT_EXT_CUTOFF */
1146
if (cond != mib->fddiPORTLerFlag) {
1147
smt_srf_event(smc,SMT_COND_PORT_LER,
1148
(int) (INDEX_PORT+ phy->np) ,cond) ;
1152
if ( mib->fddiPORTLer_Estimate <= mib->fddiPORTLer_Cutoff) {
1153
phy->pc_lem_fail = TRUE ; /* flag */
1154
mib->fddiPORTLem_Reject_Ct++ ;
1156
* "forgive 10e-2" if we cutoff so we can come
1159
lem->lem_float_ber += 2*100 ;
1163
DB_PCMN(1,"PCM: LER cutoff on port %d cutoff %d\n",
1164
phy->np, mib->fddiPORTLer_Cutoff) ;
1166
#ifdef SMT_EXT_CUTOFF
1167
smt_port_off_event(smc,phy->np);
1168
#else /* nSMT_EXT_CUTOFF */
1169
queue_event(smc,(int)(EVENT_PCM+phy->np),PC_START) ;
1170
#endif /* nSMT_EXT_CUTOFF */
1175
* called by SMT to calculate LEM bit error rate
1177
void sm_lem_evaluate(struct s_smc *smc)
1181
for (np = 0 ; np < NUMPHYS ; np++)
1182
lem_evaluate(smc,&smc->y[np]) ;
1185
static void lem_check_lct(struct s_smc *smc, struct s_phy *phy)
1187
struct lem_counter *lem = &phy->lem ;
1188
struct fddi_mib_p *mib ;
1193
phy->pc_lem_fail = FALSE ; /* flag */
1194
errors = inpw(PLC(((int)phy->np),PL_LINK_ERR_CTR)) ;
1195
lem->lem_errors += errors ;
1196
mib->fddiPORTLem_Ct += errors ;
1197
if (lem->lem_errors) {
1198
switch(phy->lc_test) {
1200
if (lem->lem_errors >= smc->s.lct_short)
1201
phy->pc_lem_fail = TRUE ;
1204
if (lem->lem_errors >= smc->s.lct_medium)
1205
phy->pc_lem_fail = TRUE ;
1208
if (lem->lem_errors >= smc->s.lct_long)
1209
phy->pc_lem_fail = TRUE ;
1212
if (lem->lem_errors >= smc->s.lct_extended)
1213
phy->pc_lem_fail = TRUE ;
1216
DB_PCMN(1," >>errors : %d\n",lem->lem_errors,0) ;
1218
if (phy->pc_lem_fail) {
1219
mib->fddiPORTLCTFail_Ct++ ;
1220
mib->fddiPORTLem_Reject_Ct++ ;
1223
mib->fddiPORTLCTFail_Ct = 0 ;
1229
static void sm_ph_lem_start(struct s_smc *smc, int np, int threshold)
1231
struct lem_counter *lem = &smc->y[np].lem ;
1234
lem->lem_errors = 0L ;
1236
/* Do NOT reset mib->fddiPORTLer_Estimate here. It is called too
1240
outpw(PLC(np,PL_LE_THRESHOLD),threshold) ;
1241
(void)inpw(PLC(np,PL_LINK_ERR_CTR)) ; /* clear error counter */
1244
SETMASK(PLC(np,PL_INTR_MASK),PL_LE_CTR,PL_LE_CTR) ;
1247
static void sm_ph_lem_stop(struct s_smc *smc, int np)
1249
struct lem_counter *lem = &smc->y[np].lem ;
1252
CLEAR(PLC(np,PL_INTR_MASK),PL_LE_CTR) ;
1256
void sm_pm_ls_latch(struct s_smc *smc, int phy, int on_off)
1257
/* int on_off; en- or disable ident. ls */
1261
phy = phy ; on_off = on_off ;
1267
* receive actions are called AFTER the bit n is received,
1268
* i.e. if pc_rcode_actions(5) is called, bit 6 is the next bit to be received
1272
* PCM pseudo code 5.1 .. 6.1
1274
static void pc_rcode_actions(struct s_smc *smc, int bit, struct s_phy *phy)
1276
struct fddi_mib_p *mib ;
1280
DB_PCMN(1,"SIG rec %x %x:\n", bit,phy->r_val[bit] ) ;
1289
if (phy->r_val[1] == 0 && phy->r_val[2] == 0)
1290
mib->fddiPORTNeighborType = TA ;
1291
else if (phy->r_val[1] == 0 && phy->r_val[2] == 1)
1292
mib->fddiPORTNeighborType = TB ;
1293
else if (phy->r_val[1] == 1 && phy->r_val[2] == 0)
1294
mib->fddiPORTNeighborType = TS ;
1295
else if (phy->r_val[1] == 1 && phy->r_val[2] == 1)
1296
mib->fddiPORTNeighborType = TM ;
1299
if (mib->fddiPORTMy_Type == TM &&
1300
mib->fddiPORTNeighborType == TM) {
1301
DB_PCMN(1,"PCM %c : E100 withhold M-M\n",
1303
mib->fddiPORTPC_Withhold = PC_WH_M_M ;
1304
RS_SET(smc,RS_EVENT) ;
1306
else if (phy->t_val[3] || phy->r_val[3]) {
1307
mib->fddiPORTPC_Withhold = PC_WH_NONE ;
1308
if (mib->fddiPORTMy_Type == TM ||
1309
mib->fddiPORTNeighborType == TM)
1310
phy->pc_mode = PM_TREE ;
1312
phy->pc_mode = PM_PEER ;
1314
/* reevaluate the selection criteria (wc_flag) */
1315
all_selection_criteria (smc);
1318
mib->fddiPORTPC_Withhold = PC_WH_PATH ;
1322
mib->fddiPORTPC_Withhold = PC_WH_OTHER ;
1323
RS_SET(smc,RS_EVENT) ;
1324
DB_PCMN(1,"PCM %c : E101 withhold other\n",
1327
phy->twisted = ((mib->fddiPORTMy_Type != TS) &&
1328
(mib->fddiPORTMy_Type != TM) &&
1329
(mib->fddiPORTNeighborType ==
1330
mib->fddiPORTMy_Type)) ;
1332
DB_PCMN(1,"PCM %c : E102 !!! TWISTED !!!\n",
1339
if (phy->t_val[4] || phy->r_val[4]) {
1340
if ((phy->t_val[4] && phy->t_val[5]) ||
1341
(phy->r_val[4] && phy->r_val[5]) )
1342
phy->lc_test = LC_EXTENDED ;
1344
phy->lc_test = LC_LONG ;
1346
else if (phy->t_val[5] || phy->r_val[5])
1347
phy->lc_test = LC_MEDIUM ;
1349
phy->lc_test = LC_SHORT ;
1350
switch (phy->lc_test) {
1351
case LC_SHORT : /* 50ms */
1352
outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LENGTH ) ;
1353
phy->t_next[7] = smc->s.pcm_lc_short ;
1355
case LC_MEDIUM : /* 500ms */
1356
outpw(PLC((int)phy->np,PL_LC_LENGTH), TP_LC_LONGLN ) ;
1357
phy->t_next[7] = smc->s.pcm_lc_medium ;
1360
SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;
1361
phy->t_next[7] = smc->s.pcm_lc_long ;
1364
SETMASK(PLC((int)phy->np,PL_CNTRL_B),PL_LONG,PL_LONG) ;
1365
phy->t_next[7] = smc->s.pcm_lc_extended ;
1368
if (phy->t_next[7] > smc->s.pcm_lc_medium) {
1369
start_pcm_timer0(smc,phy->t_next[7],PC_TIMEOUT_LCT,phy);
1371
DB_PCMN(1,"LCT timer = %ld us\n", phy->t_next[7], 0) ;
1372
phy->t_next[9] = smc->s.pcm_t_next_9 ;
1375
if (phy->t_val[6]) {
1376
phy->cf_loop = TRUE ;
1378
phy->td_flag = TRUE ;
1381
if (phy->t_val[7] || phy->r_val[7]) {
1382
DB_PCMN(1,"PCM %c : E103 LCT fail %s\n",
1383
phy->phy_name,phy->t_val[7]? "local":"remote") ;
1384
queue_event(smc,(int)(EVENT_PCM+phy->np),PC_START) ;
1388
if (phy->t_val[8] || phy->r_val[8]) {
1390
phy->cf_loop = TRUE ;
1391
phy->td_flag = TRUE ;
1395
if (phy->r_val[9]) {
1396
/* neighbor intends to have MAC on output */ ;
1397
mib->fddiPORTMacIndicated.R_val = TRUE ;
1400
/* neighbor does not intend to have MAC on output */ ;
1401
mib->fddiPORTMacIndicated.R_val = FALSE ;
1408
* PCM pseudo code 5.1 .. 6.1
1410
static void pc_tcode_actions(struct s_smc *smc, const int bit, struct s_phy *phy)
1413
struct fddi_mib_p *mib ;
1419
phy->t_val[0] = 0 ; /* no escape used */
1422
if (mib->fddiPORTMy_Type == TS || mib->fddiPORTMy_Type == TM)
1428
if (mib->fddiPORTMy_Type == TB || mib->fddiPORTMy_Type == TM)
1438
type = mib->fddiPORTMy_Type ;
1439
ne = mib->fddiPORTNeighborType ;
1440
policy = smc->mib.fddiSMTConnectionPolicy ;
1442
phy->t_val[3] = 1 ; /* Accept connection */
1446
((policy & POLICY_AA) && ne == TA) ||
1447
((policy & POLICY_AB) && ne == TB) ||
1448
((policy & POLICY_AS) && ne == TS) ||
1449
((policy & POLICY_AM) && ne == TM) )
1450
phy->t_val[3] = 0 ; /* Reject */
1454
((policy & POLICY_BA) && ne == TA) ||
1455
((policy & POLICY_BB) && ne == TB) ||
1456
((policy & POLICY_BS) && ne == TS) ||
1457
((policy & POLICY_BM) && ne == TM) )
1458
phy->t_val[3] = 0 ; /* Reject */
1462
((policy & POLICY_SA) && ne == TA) ||
1463
((policy & POLICY_SB) && ne == TB) ||
1464
((policy & POLICY_SS) && ne == TS) ||
1465
((policy & POLICY_SM) && ne == TM) )
1466
phy->t_val[3] = 0 ; /* Reject */
1470
((policy & POLICY_MA) && ne == TA) ||
1471
((policy & POLICY_MB) && ne == TB) ||
1472
((policy & POLICY_MS) && ne == TS) ||
1473
((policy & POLICY_MM) && ne == TM) )
1474
phy->t_val[3] = 0 ; /* Reject */
1479
* detect undesirable connection attempt event
1481
if ( (type == TA && ne == TA ) ||
1482
(type == TA && ne == TS ) ||
1483
(type == TB && ne == TB ) ||
1484
(type == TB && ne == TS ) ||
1485
(type == TS && ne == TA ) ||
1486
(type == TS && ne == TB ) ) {
1487
smt_srf_event(smc,SMT_EVENT_PORT_CONNECTION,
1488
(int) (INDEX_PORT+ phy->np) ,0) ;
1494
if (mib->fddiPORTPC_Withhold == PC_WH_NONE) {
1495
if (phy->pc_lem_fail) {
1496
phy->t_val[4] = 1 ; /* long */
1501
if (mib->fddiPORTLCTFail_Ct > 0)
1502
phy->t_val[5] = 1 ; /* medium */
1504
phy->t_val[5] = 0 ; /* short */
1507
* Implementers choice: use medium
1508
* instead of short when undesired
1509
* connection attempt is made.
1512
phy->t_val[5] = 1 ; /* medium */
1514
mib->fddiPORTConnectState = PCM_CONNECTING ;
1517
mib->fddiPORTConnectState = PCM_STANDBY ;
1518
phy->t_val[4] = 1 ; /* extended */
1525
/* we do NOT have a MAC for LCT */
1529
phy->cf_loop = FALSE ;
1530
lem_check_lct(smc,phy) ;
1531
if (phy->pc_lem_fail) {
1532
DB_PCMN(1,"PCM %c : E104 LCT failed\n",
1540
phy->t_val[8] = 0 ; /* Don't request MAC loopback */
1544
if ((mib->fddiPORTPC_Withhold != PC_WH_NONE) ||
1545
((smc->s.sas == SMT_DAS) && (phy->wc_flag))) {
1546
queue_event(smc,EVENT_PCM+np,PC_START) ;
1549
phy->t_val[9] = FALSE ;
1550
switch (smc->s.sas) {
1553
* MAC intended on output
1555
if (phy->pc_mode == PM_TREE) {
1556
if ((np == PB) || ((np == PA) &&
1557
(smc->y[PB].mib->fddiPORTConnectState !=
1559
phy->t_val[9] = TRUE ;
1563
phy->t_val[9] = TRUE ;
1568
phy->t_val[9] = TRUE ;
1573
* MAC intended on output
1576
phy->t_val[9] = TRUE ;
1580
mib->fddiPORTMacIndicated.T_val = phy->t_val[9] ;
1583
DB_PCMN(1,"SIG snd %x %x:\n", bit,phy->t_val[bit] ) ;
1587
* return status twisted (called by SMT)
1589
int pcm_status_twisted(struct s_smc *smc)
1592
if (smc->s.sas != SMT_DAS)
1594
if (smc->y[PA].twisted && (smc->y[PA].mib->fddiPORTPCMState == PC8_ACTIVE))
1596
if (smc->y[PB].twisted && (smc->y[PB].mib->fddiPORTPCMState == PC8_ACTIVE))
1602
* return status (called by SMT)
1608
void pcm_status_state(struct s_smc *smc, int np, int *type, int *state,
1609
int *remote, int *mac)
1611
struct s_phy *phy = &smc->y[np] ;
1612
struct fddi_mib_p *mib ;
1616
/* remote PHY type and MAC - set only if active */
1618
*type = mib->fddiPORTMy_Type ; /* our PHY type */
1619
*state = mib->fddiPORTConnectState ;
1620
*remote = mib->fddiPORTNeighborType ;
1622
switch(mib->fddiPORTPCMState) {
1624
*mac = mib->fddiPORTMacIndicated.R_val ;
1630
* return rooted station status (called by SMT)
1632
int pcm_rooted_station(struct s_smc *smc)
1636
for (n = 0 ; n < NUMPHYS ; n++) {
1637
if (smc->y[n].mib->fddiPORTPCMState == PC8_ACTIVE &&
1638
smc->y[n].mib->fddiPORTNeighborType == TM)
1645
* Interrupt actions for PLC & PCM events
1647
void plc_irq(struct s_smc *smc, int np, unsigned int cmd)
1648
/* int np; PHY index */
1650
struct s_phy *phy = &smc->y[np] ;
1651
struct s_plc *plc = &phy->plc ;
1655
#endif /* SUPERNET_3 */
1658
if (np >= smc->s.numphys) {
1662
if (cmd & PL_EBUF_ERR) { /* elastic buff. det. over-|underflow*/
1664
* Check whether the SRF Condition occurred.
1666
if (!plc->ebuf_cont && phy->mib->fddiPORTPCMState == PC8_ACTIVE){
1668
* This is the real Elasticity Error.
1669
* More than one in a row are treated as a
1671
* Only count this in the active state.
1673
phy->mib->fddiPORTEBError_Ct ++ ;
1678
if (plc->ebuf_cont <= 1000) {
1680
* Prevent counter from being wrapped after
1681
* hanging years in that interrupt.
1683
plc->ebuf_cont++ ; /* Ebuf continuous error */
1687
if (plc->ebuf_cont == 1000 &&
1688
((inpw(PLC(np,PL_STATUS_A)) & PLC_REV_MASK) ==
1691
* This interrupt remeained high for at least
1692
* 1000 consecutive interrupt calls.
1694
* This is caused by a hardware error of the
1695
* ORION part of the Supernet III chipset.
1697
* Disable this bit from the mask.
1699
corr_mask = (plc_imsk_na & ~PL_EBUF_ERR) ;
1700
outpw(PLC(np,PL_INTR_MASK),corr_mask);
1703
* Disconnect from the ring.
1704
* Call the driver with the reset indication.
1706
queue_event(smc,EVENT_ECM,EC_DISCONNECT) ;
1709
* Make an error log entry.
1711
SMT_ERR_LOG(smc,SMT_E0136, SMT_E0136_MSG) ;
1714
* Indicate the Reset.
1716
drv_reset_indication(smc) ;
1718
#endif /* SUPERNET_3 */
1720
/* Reset the continuous error variable */
1721
plc->ebuf_cont = 0 ; /* reset Ebuf continuous error */
1723
if (cmd & PL_PHYINV) { /* physical layer invalid signal */
1726
if (cmd & PL_VSYM_CTR) { /* violation symbol counter has incr.*/
1729
if (cmd & PL_MINI_CTR) { /* dep. on PLC_CNTRL_A's MINI_CTR_INT*/
1732
if (cmd & PL_LE_CTR) { /* link error event counter */
1736
* note: PL_LINK_ERR_CTR MUST be read to clear it
1738
j = inpw(PLC(np,PL_LE_THRESHOLD)) ;
1739
i = inpw(PLC(np,PL_LINK_ERR_CTR)) ;
1742
/* wrapped around */
1746
if (phy->lem.lem_on) {
1747
/* Note: Lem errors shall only be counted when
1748
* link is ACTIVE or LCT is active.
1750
phy->lem.lem_errors += i ;
1751
phy->mib->fddiPORTLem_Ct += i ;
1754
if (cmd & PL_TPC_EXPIRED) { /* TPC timer reached zero */
1755
if (plc->p_state == PS_LCT) {
1763
if (cmd & PL_LS_MATCH) { /* LS == LS in PLC_CNTRL_B's MATCH_LS*/
1764
switch (inpw(PLC(np,PL_CNTRL_B)) & PL_MATCH_LS) {
1765
case PL_I_IDLE : phy->curr_ls = PC_ILS ; break ;
1766
case PL_I_HALT : phy->curr_ls = PC_HLS ; break ;
1767
case PL_I_MASTR : phy->curr_ls = PC_MLS ; break ;
1768
case PL_I_QUIET : phy->curr_ls = PC_QLS ; break ;
1771
if (cmd & PL_PCM_BREAK) { /* PCM has entered the BREAK state */
1774
reason = inpw(PLC(np,PL_STATUS_B)) & PL_BREAK_REASON ;
1777
case PL_B_PCS : plc->b_pcs++ ; break ;
1778
case PL_B_TPC : plc->b_tpc++ ; break ;
1779
case PL_B_TNE : plc->b_tne++ ; break ;
1780
case PL_B_QLS : plc->b_qls++ ; break ;
1781
case PL_B_ILS : plc->b_ils++ ; break ;
1782
case PL_B_HLS : plc->b_hls++ ; break ;
1785
/*jd 05-Aug-1999 changed: Bug #10419 */
1786
DB_PCMN(1,"PLC %d: MDcF = %x\n", np, smc->e.DisconnectFlag);
1787
if (smc->e.DisconnectFlag == FALSE) {
1788
DB_PCMN(1,"PLC %d: restart (reason %x)\n", np, reason);
1789
queue_event(smc,EVENT_PCM+np,PC_START) ;
1792
DB_PCMN(1,"PLC %d: NO!! restart (reason %x)\n", np, reason);
1797
* If both CODE & ENABLE are set ignore enable
1799
if (cmd & PL_PCM_CODE) { /* receive last sign.-bit | LCT complete */
1800
queue_event(smc,EVENT_PCM+np,PC_SIGNAL) ;
1801
n = inpw(PLC(np,PL_RCV_VECTOR)) ;
1802
for (i = 0 ; i < plc->p_bits ; i++) {
1803
phy->r_val[plc->p_start+i] = n & 1 ;
1807
else if (cmd & PL_PCM_ENABLED) { /* asserted SC_JOIN, scrub.completed*/
1808
queue_event(smc,EVENT_PCM+np,PC_JOIN) ;
1810
if (cmd & PL_TRACE_PROP) { /* MLS while PC8_ACTIV || PC2_TRACE */
1812
if (!phy->tr_flag) {
1813
DB_PCMN(1,"PCM : irq TRACE_PROP %d %d\n",
1814
np,smc->mib.fddiSMTECMState) ;
1815
phy->tr_flag = TRUE ;
1816
smc->e.trace_prop |= ENTITY_BIT(ENTITY_PHY(np)) ;
1817
queue_event(smc,EVENT_ECM,EC_TRACE_PROP) ;
1821
* filter PLC glitch ???
1822
* QLS || HLS only while in PC2_TRACE state
1824
if ((cmd & PL_SELF_TEST) && (phy->mib->fddiPORTPCMState == PC2_TRACE)) {
1826
if (smc->e.path_test == PT_PASSED) {
1827
DB_PCMN(1,"PCM : state = %s %d\n", get_pcmstate(smc,np),
1828
phy->mib->fddiPORTPCMState) ;
1830
smc->e.path_test = PT_PENDING ;
1831
queue_event(smc,EVENT_ECM,EC_PATH_TEST) ;
1834
if (cmd & PL_TNE_EXPIRED) { /* TNE: length of noise events */
1835
/* break_required (TNE > NS_Max) */
1836
if (phy->mib->fddiPORTPCMState == PC8_ACTIVE) {
1837
if (!phy->tr_flag) {
1838
DB_PCMN(1,"PCM %c : PC81 %s\n",phy->phy_name,"NSE");
1839
queue_event(smc,EVENT_PCM+np,PC_START) ;
1845
if (cmd & PL_NP_ERR) { /* NP has requested to r/w an inv reg*/
1851
/* pin inactiv (GND) */
1852
if (cmd & PL_PARITY_ERR) { /* p. error dedected on TX9-0 inp */
1855
if (cmd & PL_LSDO) { /* carrier detected */
1865
void pcm_get_state(struct s_smc *smc, struct smt_state *state)
1868
struct pcm_state *pcs ;
1873
struct fddi_mib_p *mib ;
1875
for (i = 0, phy = smc->y, pcs = state->pcm_state ; i < NUMPHYS ;
1876
i++ , phy++, pcs++ ) {
1878
pcs->pcm_type = (u_char) mib->fddiPORTMy_Type ;
1879
pcs->pcm_state = (u_char) mib->fddiPORTPCMState ;
1880
pcs->pcm_mode = phy->pc_mode ;
1881
pcs->pcm_neighbor = (u_char) mib->fddiPORTNeighborType ;
1882
pcs->pcm_bsf = mib->fddiPORTBS_Flag ;
1883
pcs->pcm_lsf = phy->ls_flag ;
1884
pcs->pcm_lct_fail = (u_char) mib->fddiPORTLCTFail_Ct ;
1885
pcs->pcm_ls_rx = LS2MIB(sm_pm_get_ls(smc,i)) ;
1886
for (ii = 0, rbits = tbits = 0 ; ii < NUMBITS ; ii++) {
1889
if (phy->r_val[NUMBITS-1-ii])
1891
if (phy->t_val[NUMBITS-1-ii])
1894
pcs->pcm_r_val = rbits ;
1895
pcs->pcm_t_val = tbits ;
1899
int get_pcm_state(struct s_smc *smc, int np)
1905
switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {
1906
case PL_PC0 : pcs = PC_STOP ; break ;
1907
case PL_PC1 : pcs = PC_START ; break ;
1908
case PL_PC2 : pcs = PC_TRACE ; break ;
1909
case PL_PC3 : pcs = PC_SIGNAL ; break ;
1910
case PL_PC4 : pcs = PC_SIGNAL ; break ;
1911
case PL_PC5 : pcs = PC_SIGNAL ; break ;
1912
case PL_PC6 : pcs = PC_JOIN ; break ;
1913
case PL_PC7 : pcs = PC_JOIN ; break ;
1914
case PL_PC8 : pcs = PC_ENABLE ; break ;
1915
case PL_PC9 : pcs = PC_MAINT ; break ;
1916
default : pcs = PC_DISABLE ; break ;
1921
char *get_linestate(struct s_smc *smc, int np)
1927
switch (inpw(PLC(np,PL_STATUS_A)) & PL_LINE_ST) {
1928
case PL_L_NLS : ls = "NOISE" ; break ;
1929
case PL_L_ALS : ls = "ACTIV" ; break ;
1930
case PL_L_UND : ls = "UNDEF" ; break ;
1931
case PL_L_ILS4: ls = "ILS 4" ; break ;
1932
case PL_L_QLS : ls = "QLS" ; break ;
1933
case PL_L_MLS : ls = "MLS" ; break ;
1934
case PL_L_HLS : ls = "HLS" ; break ;
1935
case PL_L_ILS16:ls = "ILS16" ; break ;
1937
default: ls = "unknown" ; break ;
1943
char *get_pcmstate(struct s_smc *smc, int np)
1949
switch (inpw(PLC(np,PL_STATUS_B)) & PL_PCM_STATE) {
1950
case PL_PC0 : pcs = "OFF" ; break ;
1951
case PL_PC1 : pcs = "BREAK" ; break ;
1952
case PL_PC2 : pcs = "TRACE" ; break ;
1953
case PL_PC3 : pcs = "CONNECT"; break ;
1954
case PL_PC4 : pcs = "NEXT" ; break ;
1955
case PL_PC5 : pcs = "SIGNAL" ; break ;
1956
case PL_PC6 : pcs = "JOIN" ; break ;
1957
case PL_PC7 : pcs = "VERIFY" ; break ;
1958
case PL_PC8 : pcs = "ACTIV" ; break ;
1959
case PL_PC9 : pcs = "MAINT" ; break ;
1960
default : pcs = "UNKNOWN" ; break ;
1965
void list_phy(struct s_smc *smc)
1970
for (np = 0 ; np < NUMPHYS ; np++) {
1971
plc = &smc->y[np].plc ;
1972
printf("PHY %d:\tERRORS\t\t\tBREAK_REASONS\t\tSTATES:\n",np) ;
1973
printf("\tsoft_error: %ld \t\tPC_Start : %ld\n",
1974
plc->soft_err,plc->b_pcs);
1975
printf("\tparity_err: %ld \t\tTPC exp. : %ld\t\tLine: %s\n",
1976
plc->parity_err,plc->b_tpc,get_linestate(smc,np)) ;
1977
printf("\tebuf_error: %ld \t\tTNE exp. : %ld\n",
1978
plc->ebuf_err,plc->b_tne) ;
1979
printf("\tphyinvalid: %ld \t\tQLS det. : %ld\t\tPCM : %s\n",
1980
plc->phyinv,plc->b_qls,get_pcmstate(smc,np)) ;
1981
printf("\tviosym_ctr: %ld \t\tILS det. : %ld\n",
1982
plc->vsym_ctr,plc->b_ils) ;
1983
printf("\tmingap_ctr: %ld \t\tHLS det. : %ld\n",
1984
plc->mini_ctr,plc->b_hls) ;
1985
printf("\tnodepr_err: %ld\n",plc->np_err) ;
1986
printf("\tTPC_exp : %ld\n",plc->tpc_exp) ;
1987
printf("\tLEM_err : %ld\n",smc->y[np].lem.lem_errors) ;
1993
void pcm_lem_dump(struct s_smc *smc)
1997
struct fddi_mib_p *mib ;
1999
char *entostring() ;
2001
printf("PHY errors BER\n") ;
2002
printf("----------------------\n") ;
2003
for (i = 0,phy = smc->y ; i < NUMPHYS ; i++,phy++) {
2004
if (!plc_is_installed(smc,i))
2007
printf("%s\t%ld\t10E-%d\n",
2008
entostring(smc,ENTITY_PHY(i)),
2009
mib->fddiPORTLem_Ct,
2010
mib->fddiPORTLer_Estimate) ;