3
* BRIEF MODULE DESCRIPTION
5
* 2.6 port, Embedded Alley Solutions, Inc
8
* Author: source@mvista.com
10
* This program is free software; you can distribute it and/or modify it
11
* under the terms of the GNU General Public License (Version 2) as
12
* published by the Free Software Foundation.
14
* This program is distributed in the hope it will be useful, but WITHOUT
15
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19
* You should have received a copy of the GNU General Public License along
20
* with this program; if not, write to the Free Software Foundation, Inc.,
21
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
23
#include <linux/types.h>
24
#include <linux/pci.h>
25
#include <linux/kernel.h>
26
#include <linux/init.h>
27
#include <linux/vmalloc.h>
28
#include <linux/delay.h>
30
#include <asm/mach-pnx8550/pci.h>
31
#include <asm/mach-pnx8550/glb.h>
33
static inline void clear_status(void)
35
unsigned long pci_stat;
37
pci_stat = inl(PCI_BASE | PCI_GPPM_STATUS);
38
outl(pci_stat, PCI_BASE | PCI_GPPM_ICLR);
41
static inline unsigned int
42
calc_cfg_addr(struct pci_bus *bus, unsigned int devfn, int where)
46
addr = ((bus->number > 0) ? (((bus->number & 0xff) << PCI_CFG_BUS_SHIFT) | 1) : 0);
47
addr |= ((devfn & 0xff) << PCI_CFG_FUNC_SHIFT) | (where & 0xfc);
53
config_access(unsigned int pci_cmd, struct pci_bus *bus, unsigned int devfn, int where, unsigned int pci_mode, unsigned int *val)
56
unsigned long loops = 0;
57
unsigned long ioaddr = calc_cfg_addr(bus, devfn, where);
59
local_irq_save(flags);
60
/*Clear pending interrupt status */
61
if (inl(PCI_BASE | PCI_GPPM_STATUS)) {
63
while (!(inl(PCI_BASE | PCI_GPPM_STATUS) == 0)) ;
66
outl(ioaddr, PCI_BASE | PCI_GPPM_ADDR);
68
if ((pci_cmd == PCI_CMD_IOW) || (pci_cmd == PCI_CMD_CONFIG_WRITE))
69
outl(*val, PCI_BASE | PCI_GPPM_WDAT);
71
outl(INIT_PCI_CYCLE | pci_cmd | (pci_mode & PCI_BYTE_ENABLE_MASK),
72
PCI_BASE | PCI_GPPM_CTRL);
76
PCI_IO_JIFFIES_TIMEOUT) >> (PCI_IO_JIFFIES_SHIFT));
78
if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_DONE) {
79
if ((pci_cmd == PCI_CMD_IOR) ||
80
(pci_cmd == PCI_CMD_CONFIG_READ))
81
*val = inl(PCI_BASE | PCI_GPPM_RDAT);
83
local_irq_restore(flags);
84
return PCIBIOS_SUCCESSFUL;
85
} else if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_R_MABORT) {
91
printk("%s : Arbiter Locked.\n", __func__);
96
if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_IOW)) {
97
printk("%s timeout (GPPM_CTRL=%X) ioaddr %lX pci_cmd %X\n",
98
__func__, inl(PCI_BASE | PCI_GPPM_CTRL), ioaddr,
102
if ((pci_cmd == PCI_CMD_IOR) || (pci_cmd == PCI_CMD_CONFIG_READ))
104
local_irq_restore(flags);
105
return PCIBIOS_DEVICE_NOT_FOUND;
109
* We can't address 8 and 16 bit words directly. Instead we have to
110
* read/write a 32bit word and mask/modify the data we actually want.
113
read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 * val)
115
unsigned int data = 0;
121
err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(1 << (where & 3)), &data);
122
switch (where & 0x03) {
124
*val = (unsigned char)(data & 0x000000ff);
127
*val = (unsigned char)((data & 0x0000ff00) >> 8);
130
*val = (unsigned char)((data & 0x00ff0000) >> 16);
133
*val = (unsigned char)((data & 0xff000000) >> 24);
141
read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 * val)
143
unsigned int data = 0;
150
return PCIBIOS_BAD_REGISTER_NUMBER;
152
err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, ~(3 << (where & 3)), &data);
153
switch (where & 0x02) {
155
*val = (unsigned short)(data & 0x0000ffff);
158
*val = (unsigned short)((data & 0xffff0000) >> 16);
166
read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 * val)
173
return PCIBIOS_BAD_REGISTER_NUMBER;
175
err = config_access(PCI_CMD_CONFIG_READ, bus, devfn, where, 0, val);
181
write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val)
183
unsigned int data = (unsigned int)val;
189
switch (where & 0x03) {
203
err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(1 << (where & 3)), &data);
209
write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val)
211
unsigned int data = (unsigned int)val;
218
return PCIBIOS_BAD_REGISTER_NUMBER;
220
switch (where & 0x02) {
227
err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, ~(3 << (where & 3)), &data);
233
write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val)
240
return PCIBIOS_BAD_REGISTER_NUMBER;
242
err = config_access(PCI_CMD_CONFIG_WRITE, bus, devfn, where, 0, &val);
247
static int config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * val)
252
int rc = read_config_byte(bus, devfn, where, &_val);
258
int rc = read_config_word(bus, devfn, where, &_val);
263
return read_config_dword(bus, devfn, where, val);
267
static int config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
271
return write_config_byte(bus, devfn, where, (u8) val);
273
return write_config_word(bus, devfn, where, (u16) val);
275
return write_config_dword(bus, devfn, where, val);
279
struct pci_ops pnx8550_pci_ops = {