2
* Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
4
* Largely derived from at91_dataflash.c:
5
* Copyright (C) 2003-2005 SAN People (Pty) Ltd
7
* This program is free software; you can redistribute it and/or
8
* modify it under the terms of the GNU General Public License
9
* as published by the Free Software Foundation; either version
10
* 2 of the License, or (at your option) any later version.
12
#include <linux/module.h>
13
#include <linux/init.h>
14
#include <linux/slab.h>
15
#include <linux/delay.h>
16
#include <linux/device.h>
17
#include <linux/mutex.h>
18
#include <linux/err.h>
19
#include <linux/math64.h>
21
#include <linux/of_device.h>
23
#include <linux/spi/spi.h>
24
#include <linux/spi/flash.h>
26
#include <linux/mtd/mtd.h>
27
#include <linux/mtd/partitions.h>
30
* DataFlash is a kind of SPI flash. Most AT45 chips have two buffers in
31
* each chip, which may be used for double buffered I/O; but this driver
32
* doesn't (yet) use these for any kind of i/o overlap or prefetching.
34
* Sometimes DataFlash is packaged in MMC-format cards, although the
35
* MMC stack can't (yet?) distinguish between MMC and DataFlash
36
* protocols during enumeration.
39
/* reads can bypass the buffers */
40
#define OP_READ_CONTINUOUS 0xE8
41
#define OP_READ_PAGE 0xD2
43
/* group B requests can run even while status reports "busy" */
44
#define OP_READ_STATUS 0xD7 /* group B */
46
/* move data between host and buffer */
47
#define OP_READ_BUFFER1 0xD4 /* group B */
48
#define OP_READ_BUFFER2 0xD6 /* group B */
49
#define OP_WRITE_BUFFER1 0x84 /* group B */
50
#define OP_WRITE_BUFFER2 0x87 /* group B */
53
#define OP_ERASE_PAGE 0x81
54
#define OP_ERASE_BLOCK 0x50
56
/* move data between buffer and flash */
57
#define OP_TRANSFER_BUF1 0x53
58
#define OP_TRANSFER_BUF2 0x55
59
#define OP_MREAD_BUFFER1 0xD4
60
#define OP_MREAD_BUFFER2 0xD6
61
#define OP_MWERASE_BUFFER1 0x83
62
#define OP_MWERASE_BUFFER2 0x86
63
#define OP_MWRITE_BUFFER1 0x88 /* sector must be pre-erased */
64
#define OP_MWRITE_BUFFER2 0x89 /* sector must be pre-erased */
66
/* write to buffer, then write-erase to flash */
67
#define OP_PROGRAM_VIA_BUF1 0x82
68
#define OP_PROGRAM_VIA_BUF2 0x85
70
/* compare buffer to flash */
71
#define OP_COMPARE_BUF1 0x60
72
#define OP_COMPARE_BUF2 0x61
74
/* read flash to buffer, then write-erase to flash */
75
#define OP_REWRITE_VIA_BUF1 0x58
76
#define OP_REWRITE_VIA_BUF2 0x59
78
/* newer chips report JEDEC manufacturer and device IDs; chip
79
* serial number and OTP bits; and per-sector writeprotect.
81
#define OP_READ_ID 0x9F
82
#define OP_READ_SECURITY 0x77
83
#define OP_WRITE_SECURITY_REVC 0x9A
84
#define OP_WRITE_SECURITY 0x9B /* revision D */
91
unsigned partitioned:1;
93
unsigned short page_offset; /* offset in flash address */
94
unsigned int page_size; /* of bytes per page */
97
struct spi_device *spi;
103
static const struct of_device_id dataflash_dt_ids[] = {
104
{ .compatible = "atmel,at45", },
105
{ .compatible = "atmel,dataflash", },
109
#define dataflash_dt_ids NULL
112
/* ......................................................................... */
115
* Return the status of the DataFlash device.
117
static inline int dataflash_status(struct spi_device *spi)
119
/* NOTE: at45db321c over 25 MHz wants to write
120
* a dummy byte after the opcode...
122
return spi_w8r8(spi, OP_READ_STATUS);
126
* Poll the DataFlash device until it is READY.
127
* This usually takes 5-20 msec or so; more for sector erase.
129
static int dataflash_waitready(struct spi_device *spi)
134
status = dataflash_status(spi);
136
pr_debug("%s: status %d?\n",
137
dev_name(&spi->dev), status);
141
if (status & (1 << 7)) /* RDY/nBSY */
148
/* ......................................................................... */
151
* Erase pages of flash.
153
static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
155
struct dataflash *priv = mtd->priv;
156
struct spi_device *spi = priv->spi;
157
struct spi_transfer x = { .tx_dma = 0, };
158
struct spi_message msg;
159
unsigned blocksize = priv->page_size << 3;
163
pr_debug("%s: erase addr=0x%llx len 0x%llx\n",
164
dev_name(&spi->dev), (long long)instr->addr,
165
(long long)instr->len);
168
if (instr->addr + instr->len > mtd->size)
170
div_u64_rem(instr->len, priv->page_size, &rem);
173
div_u64_rem(instr->addr, priv->page_size, &rem);
177
spi_message_init(&msg);
179
x.tx_buf = command = priv->command;
181
spi_message_add_tail(&x, &msg);
183
mutex_lock(&priv->lock);
184
while (instr->len > 0) {
185
unsigned int pageaddr;
189
/* Calculate flash page address; use block erase (for speed) if
190
* we're at a block boundary and need to erase the whole block.
192
pageaddr = div_u64(instr->addr, priv->page_size);
193
do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
194
pageaddr = pageaddr << priv->page_offset;
196
command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
197
command[1] = (uint8_t)(pageaddr >> 16);
198
command[2] = (uint8_t)(pageaddr >> 8);
201
pr_debug("ERASE %s: (%x) %x %x %x [%i]\n",
202
do_block ? "block" : "page",
203
command[0], command[1], command[2], command[3],
206
status = spi_sync(spi, &msg);
207
(void) dataflash_waitready(spi);
210
printk(KERN_ERR "%s: erase %x, err %d\n",
211
dev_name(&spi->dev), pageaddr, status);
212
/* REVISIT: can retry instr->retries times; or
213
* giveup and instr->fail_addr = instr->addr;
219
instr->addr += blocksize;
220
instr->len -= blocksize;
222
instr->addr += priv->page_size;
223
instr->len -= priv->page_size;
226
mutex_unlock(&priv->lock);
228
/* Inform MTD subsystem that erase is complete */
229
instr->state = MTD_ERASE_DONE;
230
mtd_erase_callback(instr);
236
* Read from the DataFlash device.
237
* from : Start offset in flash device
238
* len : Amount to read
239
* retlen : About of data actually read
240
* buf : Buffer containing the data
242
static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
243
size_t *retlen, u_char *buf)
245
struct dataflash *priv = mtd->priv;
246
struct spi_transfer x[2] = { { .tx_dma = 0, }, };
247
struct spi_message msg;
252
pr_debug("%s: read 0x%x..0x%x\n", dev_name(&priv->spi->dev),
253
(unsigned)from, (unsigned)(from + len));
260
if (from + len > mtd->size)
263
/* Calculate flash page/byte address */
264
addr = (((unsigned)from / priv->page_size) << priv->page_offset)
265
+ ((unsigned)from % priv->page_size);
267
command = priv->command;
269
pr_debug("READ: (%x) %x %x %x\n",
270
command[0], command[1], command[2], command[3]);
272
spi_message_init(&msg);
274
x[0].tx_buf = command;
276
spi_message_add_tail(&x[0], &msg);
280
spi_message_add_tail(&x[1], &msg);
282
mutex_lock(&priv->lock);
284
/* Continuous read, max clock = f(car) which may be less than
285
* the peak rate available. Some chips support commands with
286
* fewer "don't care" bytes. Both buffers stay unchanged.
288
command[0] = OP_READ_CONTINUOUS;
289
command[1] = (uint8_t)(addr >> 16);
290
command[2] = (uint8_t)(addr >> 8);
291
command[3] = (uint8_t)(addr >> 0);
292
/* plus 4 "don't care" bytes */
294
status = spi_sync(priv->spi, &msg);
295
mutex_unlock(&priv->lock);
298
*retlen = msg.actual_length - 8;
301
pr_debug("%s: read %x..%x --> %d\n",
302
dev_name(&priv->spi->dev),
303
(unsigned)from, (unsigned)(from + len),
309
* Write to the DataFlash device.
310
* to : Start offset in flash device
311
* len : Amount to write
312
* retlen : Amount of data actually written
313
* buf : Buffer containing the data
315
static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
316
size_t * retlen, const u_char * buf)
318
struct dataflash *priv = mtd->priv;
319
struct spi_device *spi = priv->spi;
320
struct spi_transfer x[2] = { { .tx_dma = 0, }, };
321
struct spi_message msg;
322
unsigned int pageaddr, addr, offset, writelen;
323
size_t remaining = len;
324
u_char *writebuf = (u_char *) buf;
325
int status = -EINVAL;
328
pr_debug("%s: write 0x%x..0x%x\n",
329
dev_name(&spi->dev), (unsigned)to, (unsigned)(to + len));
336
if ((to + len) > mtd->size)
339
spi_message_init(&msg);
341
x[0].tx_buf = command = priv->command;
343
spi_message_add_tail(&x[0], &msg);
345
pageaddr = ((unsigned)to / priv->page_size);
346
offset = ((unsigned)to % priv->page_size);
347
if (offset + len > priv->page_size)
348
writelen = priv->page_size - offset;
352
mutex_lock(&priv->lock);
353
while (remaining > 0) {
354
pr_debug("write @ %i:%i len=%i\n",
355
pageaddr, offset, writelen);
358
* (a) each page in a sector must be rewritten at least
359
* once every 10K sibling erase/program operations.
360
* (b) for pages that are already erased, we could
361
* use WRITE+MWRITE not PROGRAM for ~30% speedup.
362
* (c) WRITE to buffer could be done while waiting for
363
* a previous MWRITE/MWERASE to complete ...
364
* (d) error handling here seems to be mostly missing.
366
* Two persistent bits per page, plus a per-sector counter,
367
* could support (a) and (b) ... we might consider using
368
* the second half of sector zero, which is just one block,
369
* to track that state. (On AT91, that sector should also
370
* support boot-from-DataFlash.)
373
addr = pageaddr << priv->page_offset;
375
/* (1) Maybe transfer partial page to Buffer1 */
376
if (writelen != priv->page_size) {
377
command[0] = OP_TRANSFER_BUF1;
378
command[1] = (addr & 0x00FF0000) >> 16;
379
command[2] = (addr & 0x0000FF00) >> 8;
382
pr_debug("TRANSFER: (%x) %x %x %x\n",
383
command[0], command[1], command[2], command[3]);
385
status = spi_sync(spi, &msg);
387
pr_debug("%s: xfer %u -> %d\n",
388
dev_name(&spi->dev), addr, status);
390
(void) dataflash_waitready(priv->spi);
393
/* (2) Program full page via Buffer1 */
395
command[0] = OP_PROGRAM_VIA_BUF1;
396
command[1] = (addr & 0x00FF0000) >> 16;
397
command[2] = (addr & 0x0000FF00) >> 8;
398
command[3] = (addr & 0x000000FF);
400
pr_debug("PROGRAM: (%x) %x %x %x\n",
401
command[0], command[1], command[2], command[3]);
403
x[1].tx_buf = writebuf;
405
spi_message_add_tail(x + 1, &msg);
406
status = spi_sync(spi, &msg);
407
spi_transfer_del(x + 1);
409
pr_debug("%s: pgm %u/%u -> %d\n",
410
dev_name(&spi->dev), addr, writelen, status);
412
(void) dataflash_waitready(priv->spi);
415
#ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
417
/* (3) Compare to Buffer1 */
418
addr = pageaddr << priv->page_offset;
419
command[0] = OP_COMPARE_BUF1;
420
command[1] = (addr & 0x00FF0000) >> 16;
421
command[2] = (addr & 0x0000FF00) >> 8;
424
pr_debug("COMPARE: (%x) %x %x %x\n",
425
command[0], command[1], command[2], command[3]);
427
status = spi_sync(spi, &msg);
429
pr_debug("%s: compare %u -> %d\n",
430
dev_name(&spi->dev), addr, status);
432
status = dataflash_waitready(priv->spi);
434
/* Check result of the compare operation */
435
if (status & (1 << 6)) {
436
printk(KERN_ERR "%s: compare page %u, err %d\n",
437
dev_name(&spi->dev), pageaddr, status);
444
#endif /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
446
remaining = remaining - writelen;
449
writebuf += writelen;
452
if (remaining > priv->page_size)
453
writelen = priv->page_size;
455
writelen = remaining;
457
mutex_unlock(&priv->lock);
462
/* ......................................................................... */
464
#ifdef CONFIG_MTD_DATAFLASH_OTP
466
static int dataflash_get_otp_info(struct mtd_info *mtd,
467
struct otp_info *info, size_t len)
469
/* Report both blocks as identical: bytes 0..64, locked.
470
* Unless the user block changed from all-ones, we can't
471
* tell whether it's still writable; so we assume it isn't.
476
return sizeof(*info);
479
static ssize_t otp_read(struct spi_device *spi, unsigned base,
480
uint8_t *buf, loff_t off, size_t len)
482
struct spi_message m;
485
struct spi_transfer t;
491
if ((off + len) > 64)
496
spi_message_init(&m);
498
l = 4 + base + off + len;
499
scratch = kzalloc(l, GFP_KERNEL);
503
/* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
504
* IN: ignore 4 bytes, data bytes 0..N (max 127)
506
scratch[0] = OP_READ_SECURITY;
508
memset(&t, 0, sizeof t);
512
spi_message_add_tail(&t, &m);
514
dataflash_waitready(spi);
516
status = spi_sync(spi, &m);
518
memcpy(buf, scratch + 4 + base + off, len);
526
static int dataflash_read_fact_otp(struct mtd_info *mtd,
527
loff_t from, size_t len, size_t *retlen, u_char *buf)
529
struct dataflash *priv = mtd->priv;
532
/* 64 bytes, from 0..63 ... start at 64 on-chip */
533
mutex_lock(&priv->lock);
534
status = otp_read(priv->spi, 64, buf, from, len);
535
mutex_unlock(&priv->lock);
543
static int dataflash_read_user_otp(struct mtd_info *mtd,
544
loff_t from, size_t len, size_t *retlen, u_char *buf)
546
struct dataflash *priv = mtd->priv;
549
/* 64 bytes, from 0..63 ... start at 0 on-chip */
550
mutex_lock(&priv->lock);
551
status = otp_read(priv->spi, 0, buf, from, len);
552
mutex_unlock(&priv->lock);
560
static int dataflash_write_user_otp(struct mtd_info *mtd,
561
loff_t from, size_t len, size_t *retlen, u_char *buf)
563
struct spi_message m;
564
const size_t l = 4 + 64;
566
struct spi_transfer t;
567
struct dataflash *priv = mtd->priv;
573
/* Strictly speaking, we *could* truncate the write ... but
574
* let's not do that for the only write that's ever possible.
576
if ((from + len) > 64)
579
/* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
582
scratch = kzalloc(l, GFP_KERNEL);
585
scratch[0] = OP_WRITE_SECURITY;
586
memcpy(scratch + 4 + from, buf, len);
588
spi_message_init(&m);
590
memset(&t, 0, sizeof t);
593
spi_message_add_tail(&t, &m);
595
/* Write the OTP bits, if they've not yet been written.
596
* This modifies SRAM buffer1.
598
mutex_lock(&priv->lock);
599
dataflash_waitready(priv->spi);
600
status = spi_sync(priv->spi, &m);
601
mutex_unlock(&priv->lock);
612
static char *otp_setup(struct mtd_info *device, char revision)
614
device->get_fact_prot_info = dataflash_get_otp_info;
615
device->read_fact_prot_reg = dataflash_read_fact_otp;
616
device->get_user_prot_info = dataflash_get_otp_info;
617
device->read_user_prot_reg = dataflash_read_user_otp;
619
/* rev c parts (at45db321c and at45db1281 only!) use a
620
* different write procedure; not (yet?) implemented.
623
device->write_user_prot_reg = dataflash_write_user_otp;
630
static char *otp_setup(struct mtd_info *device, char revision)
637
/* ......................................................................... */
640
* Register DataFlash device with MTD subsystem.
643
add_dataflash_otp(struct spi_device *spi, char *name,
644
int nr_pages, int pagesize, int pageoffset, char revision)
646
struct dataflash *priv;
647
struct mtd_info *device;
648
struct mtd_part_parser_data ppdata;
649
struct flash_platform_data *pdata = spi->dev.platform_data;
653
priv = kzalloc(sizeof *priv, GFP_KERNEL);
657
mutex_init(&priv->lock);
659
priv->page_size = pagesize;
660
priv->page_offset = pageoffset;
662
/* name must be usable with cmdlinepart */
663
sprintf(priv->name, "spi%d.%d-%s",
664
spi->master->bus_num, spi->chip_select,
668
device->name = (pdata && pdata->name) ? pdata->name : priv->name;
669
device->size = nr_pages * pagesize;
670
device->erasesize = pagesize;
671
device->writesize = pagesize;
672
device->owner = THIS_MODULE;
673
device->type = MTD_DATAFLASH;
674
device->flags = MTD_WRITEABLE;
675
device->erase = dataflash_erase;
676
device->read = dataflash_read;
677
device->write = dataflash_write;
680
device->dev.parent = &spi->dev;
683
otp_tag = otp_setup(device, revision);
685
dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
686
name, (long long)((device->size + 1023) >> 10),
688
dev_set_drvdata(&spi->dev, priv);
690
ppdata.of_node = spi->dev.of_node;
691
err = mtd_device_parse_register(device, NULL, &ppdata,
692
pdata ? pdata->parts : NULL,
693
pdata ? pdata->nr_parts : 0);
698
dev_set_drvdata(&spi->dev, NULL);
703
static inline int __devinit
704
add_dataflash(struct spi_device *spi, char *name,
705
int nr_pages, int pagesize, int pageoffset)
707
return add_dataflash_otp(spi, name, nr_pages, pagesize,
714
/* JEDEC id has a high byte of zero plus three data bytes:
715
* the manufacturer id, then a two byte device id.
719
/* The size listed here is what works with OP_ERASE_PAGE. */
725
#define SUP_POW2PS 0x0002 /* supports 2^N byte pages */
726
#define IS_POW2PS 0x0001 /* uses 2^N byte pages */
729
static struct flash_info __devinitdata dataflash_data [] = {
732
* NOTE: chips with SUP_POW2PS (rev D and up) need two entries,
733
* one with IS_POW2PS and the other without. The entry with the
734
* non-2^N byte page size can't name exact chip revisions without
735
* losing backwards compatibility for cmdlinepart.
737
* These newer chips also support 128-byte security registers (with
738
* 64 bytes one-time-programmable) and software write-protection.
740
{ "AT45DB011B", 0x1f2200, 512, 264, 9, SUP_POW2PS},
741
{ "at45db011d", 0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
743
{ "AT45DB021B", 0x1f2300, 1024, 264, 9, SUP_POW2PS},
744
{ "at45db021d", 0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
746
{ "AT45DB041x", 0x1f2400, 2048, 264, 9, SUP_POW2PS},
747
{ "at45db041d", 0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
749
{ "AT45DB081B", 0x1f2500, 4096, 264, 9, SUP_POW2PS},
750
{ "at45db081d", 0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
752
{ "AT45DB161x", 0x1f2600, 4096, 528, 10, SUP_POW2PS},
753
{ "at45db161d", 0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
755
{ "AT45DB321x", 0x1f2700, 8192, 528, 10, 0}, /* rev C */
757
{ "AT45DB321x", 0x1f2701, 8192, 528, 10, SUP_POW2PS},
758
{ "at45db321d", 0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
760
{ "AT45DB642x", 0x1f2800, 8192, 1056, 11, SUP_POW2PS},
761
{ "at45db642d", 0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
764
static struct flash_info *__devinit jedec_probe(struct spi_device *spi)
767
uint8_t code = OP_READ_ID;
770
struct flash_info *info;
773
/* JEDEC also defines an optional "extended device information"
774
* string for after vendor-specific data, after the three bytes
775
* we use here. Supporting some chips might require using it.
777
* If the vendor ID isn't Atmel's (0x1f), assume this call failed.
778
* That's not an error; only rev C and newer chips handle it, and
779
* only Atmel sells these chips.
781
tmp = spi_write_then_read(spi, &code, 1, id, 3);
783
pr_debug("%s: error %d reading JEDEC ID\n",
784
dev_name(&spi->dev), tmp);
796
for (tmp = 0, info = dataflash_data;
797
tmp < ARRAY_SIZE(dataflash_data);
799
if (info->jedec_id == jedec) {
800
pr_debug("%s: OTP, sector protect%s\n",
802
(info->flags & SUP_POW2PS)
803
? ", binary pagesize" : ""
805
if (info->flags & SUP_POW2PS) {
806
status = dataflash_status(spi);
808
pr_debug("%s: status error %d\n",
809
dev_name(&spi->dev), status);
810
return ERR_PTR(status);
813
if (info->flags & IS_POW2PS)
816
if (!(info->flags & IS_POW2PS))
825
* Treat other chips as errors ... we won't know the right page
826
* size (it might be binary) even when we can tell which density
827
* class is involved (legacy chip id scheme).
829
dev_warn(&spi->dev, "JEDEC id %06x not handled\n", jedec);
830
return ERR_PTR(-ENODEV);
834
* Detect and initialize DataFlash device, using JEDEC IDs on newer chips
835
* or else the ID code embedded in the status bits:
837
* Device Density ID code #Pages PageSize Offset
838
* AT45DB011B 1Mbit (128K) xx0011xx (0x0c) 512 264 9
839
* AT45DB021B 2Mbit (256K) xx0101xx (0x14) 1024 264 9
840
* AT45DB041B 4Mbit (512K) xx0111xx (0x1c) 2048 264 9
841
* AT45DB081B 8Mbit (1M) xx1001xx (0x24) 4096 264 9
842
* AT45DB0161B 16Mbit (2M) xx1011xx (0x2c) 4096 528 10
843
* AT45DB0321B 32Mbit (4M) xx1101xx (0x34) 8192 528 10
844
* AT45DB0642 64Mbit (8M) xx111xxx (0x3c) 8192 1056 11
845
* AT45DB1282 128Mbit (16M) xx0100xx (0x10) 16384 1056 11
847
static int __devinit dataflash_probe(struct spi_device *spi)
850
struct flash_info *info;
853
* Try to detect dataflash by JEDEC ID.
854
* If it succeeds we know we have either a C or D part.
855
* D will support power of 2 pagesize option.
856
* Both support the security register, though with different
859
info = jedec_probe(spi);
861
return PTR_ERR(info);
863
return add_dataflash_otp(spi, info->name, info->nr_pages,
864
info->pagesize, info->pageoffset,
865
(info->flags & SUP_POW2PS) ? 'd' : 'c');
868
* Older chips support only legacy commands, identifing
869
* capacity using bits in the status byte.
871
status = dataflash_status(spi);
872
if (status <= 0 || status == 0xff) {
873
pr_debug("%s: status error %d\n",
874
dev_name(&spi->dev), status);
875
if (status == 0 || status == 0xff)
880
/* if there's a device there, assume it's dataflash.
881
* board setup should have set spi->max_speed_max to
882
* match f(car) for continuous reads, mode 0 or 3.
884
switch (status & 0x3c) {
885
case 0x0c: /* 0 0 1 1 x x */
886
status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
888
case 0x14: /* 0 1 0 1 x x */
889
status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
891
case 0x1c: /* 0 1 1 1 x x */
892
status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
894
case 0x24: /* 1 0 0 1 x x */
895
status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
897
case 0x2c: /* 1 0 1 1 x x */
898
status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
900
case 0x34: /* 1 1 0 1 x x */
901
status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
903
case 0x38: /* 1 1 1 x x x */
905
status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
907
/* obsolete AT45DB1282 not (yet?) supported */
909
pr_debug("%s: unsupported device (%x)\n", dev_name(&spi->dev),
915
pr_debug("%s: add_dataflash --> %d\n", dev_name(&spi->dev),
921
static int __devexit dataflash_remove(struct spi_device *spi)
923
struct dataflash *flash = dev_get_drvdata(&spi->dev);
926
pr_debug("%s: remove\n", dev_name(&spi->dev));
928
status = mtd_device_unregister(&flash->mtd);
930
dev_set_drvdata(&spi->dev, NULL);
936
static struct spi_driver dataflash_driver = {
938
.name = "mtd_dataflash",
939
.bus = &spi_bus_type,
940
.owner = THIS_MODULE,
941
.of_match_table = dataflash_dt_ids,
944
.probe = dataflash_probe,
945
.remove = __devexit_p(dataflash_remove),
947
/* FIXME: investigate suspend and resume... */
950
static int __init dataflash_init(void)
952
return spi_register_driver(&dataflash_driver);
954
module_init(dataflash_init);
956
static void __exit dataflash_exit(void)
958
spi_unregister_driver(&dataflash_driver);
960
module_exit(dataflash_exit);
963
MODULE_LICENSE("GPL");
964
MODULE_AUTHOR("Andrew Victor, David Brownell");
965
MODULE_DESCRIPTION("MTD DataFlash driver");
966
MODULE_ALIAS("spi:mtd_dataflash");