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* Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
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* Linux driver for Brocade Fibre Channel Host Bus Adapter.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License (GPL) Version 2 as
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* published by the Free Software Foundation
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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#include "bfa_defs_svc.h"
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/* Per dma segment max size */
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#define BFI_MEM_DMA_SEG_SZ (131072)
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/* Get number of dma segments required */
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#define BFI_MEM_DMA_NSEGS(_num_reqs, _req_sz) \
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((u16)(((((_num_reqs) * (_req_sz)) + BFI_MEM_DMA_SEG_SZ - 1) & \
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~(BFI_MEM_DMA_SEG_SZ - 1)) / BFI_MEM_DMA_SEG_SZ))
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/* Get num dma reqs - that fit in a segment */
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#define BFI_MEM_NREQS_SEG(_rqsz) (BFI_MEM_DMA_SEG_SZ / (_rqsz))
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/* Get segment num from tag */
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#define BFI_MEM_SEG_FROM_TAG(_tag, _rqsz) ((_tag) / BFI_MEM_NREQS_SEG(_rqsz))
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/* Get dma req offset in a segment */
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#define BFI_MEM_SEG_REQ_OFFSET(_tag, _sz) \
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((_tag) - (BFI_MEM_SEG_FROM_TAG(_tag, _sz) * BFI_MEM_NREQS_SEG(_sz)))
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#define BFI_FLASH_CHUNK_SZ 256 /* Flash chunk size */
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#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
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* Msg header common to all msgs
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u8 msg_class; /* @ref bfi_mclass_t */
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u8 msg_id; /* msg opcode with in the class */
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u8 fn_lpu; /* msg destination */
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u16 i2htok; /* token in msgs to host */
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#define bfi_fn_lpu(__fn, __lpu) ((__fn) << 1 | (__lpu))
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#define bfi_mhdr_2_fn(_mh) ((_mh)->mtag.h2i.fn_lpu >> 1)
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#define bfi_h2i_set(_mh, _mc, _op, _fn_lpu) do { \
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(_mh).msg_class = (_mc); \
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(_mh).msg_id = (_op); \
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(_mh).mtag.h2i.fn_lpu = (_fn_lpu); \
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#define bfi_i2h_set(_mh, _mc, _op, _i2htok) do { \
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(_mh).msg_class = (_mc); \
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(_mh).msg_id = (_op); \
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(_mh).mtag.i2htok = (_i2htok); \
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* Message opcodes: 0-127 to firmware, 128-255 to host
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#define BFI_I2H_OPCODE_BASE 128
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#define BFA_I2HM(_x) ((_x) + BFI_I2H_OPCODE_BASE)
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****************************************************************************
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* Scatter Gather Element and Page definition
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****************************************************************************
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#define BFI_SGE_INLINE 1
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#define BFI_SGE_INLINE_MAX (BFI_SGE_INLINE + 1)
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BFI_SGE_DATA = 0, /* data address, not last */
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BFI_SGE_DATA_CPL = 1, /* data addr, last in current page */
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BFI_SGE_DATA_LAST = 3, /* data address, last */
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BFI_SGE_LINK = 2, /* link address */
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BFI_SGE_PGDLEN = 2, /* cumulative data length for page */
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* Scatter Gather Element used for fast-path IO requests
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union bfi_addr_u sga;
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* Generic DMA addr-len pair.
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union bfi_addr_u al_addr; /* DMA addr of buffer */
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u32 al_len; /* length of buffer */
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* Scatter Gather Page
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#define BFI_SGPG_DATA_SGES 7
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#define BFI_SGPG_SGES_MAX (BFI_SGPG_DATA_SGES + 1)
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#define BFI_SGPG_RSVD_WD_LEN 8
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struct bfi_sge_s sges[BFI_SGPG_SGES_MAX];
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u32 rsvd[BFI_SGPG_RSVD_WD_LEN];
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/* FCP module definitions */
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#define BFI_IO_MAX (2000)
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#define BFI_IOIM_SNSLEN (256)
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#define BFI_IOIM_SNSBUF_SEGS \
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BFI_MEM_DMA_NSEGS(BFI_IO_MAX, BFI_IOIM_SNSLEN)
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* Large Message structure - 128 Bytes size Msgs
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#define BFI_LMSG_SZ 128
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#define BFI_LMSG_PL_WSZ \
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((BFI_LMSG_SZ - sizeof(struct bfi_mhdr_s)) / 4)
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struct bfi_mhdr_s mhdr;
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u32 pl[BFI_LMSG_PL_WSZ];
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* Mailbox message structure
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#define BFI_MBMSG_SZ 7
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struct bfi_mhdr_s mh;
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u32 pl[BFI_MBMSG_SZ];
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* Supported PCI function class codes (personality)
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enum bfi_pcifn_class {
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BFI_PCIFN_CLASS_FC = 0x0c04,
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BFI_PCIFN_CLASS_ETH = 0x0200,
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BFI_MC_IOC = 1, /* IO Controller (IOC) */
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BFI_MC_DIAG = 2, /* Diagnostic Msgs */
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BFI_MC_FLASH = 3, /* Flash message class */
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BFI_MC_CEE = 4, /* CEE */
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BFI_MC_FCPORT = 5, /* FC port */
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BFI_MC_IOCFC = 6, /* FC - IO Controller (IOC) */
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BFI_MC_ABLK = 7, /* ASIC block configuration */
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BFI_MC_UF = 8, /* Unsolicited frame receive */
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BFI_MC_FCXP = 9, /* FC Transport */
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BFI_MC_LPS = 10, /* lport fc login services */
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BFI_MC_RPORT = 11, /* Remote port */
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BFI_MC_ITN = 12, /* I-T nexus (Initiator mode) */
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BFI_MC_IOIM_READ = 13, /* read IO (Initiator mode) */
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BFI_MC_IOIM_WRITE = 14, /* write IO (Initiator mode) */
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BFI_MC_IOIM_IO = 15, /* IO (Initiator mode) */
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BFI_MC_IOIM = 16, /* IO (Initiator mode) */
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BFI_MC_IOIM_IOCOM = 17, /* good IO completion */
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BFI_MC_TSKIM = 18, /* Initiator Task management */
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BFI_MC_PORT = 21, /* Physical port */
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BFI_MC_SFP = 22, /* SFP module */
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BFI_MC_PHY = 25, /* External PHY message class */
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#define BFI_IOC_MAX_CQS 4
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#define BFI_IOC_MAX_CQS_ASIC 8
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#define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
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*----------------------------------------------------------------------
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*----------------------------------------------------------------------
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* Different asic generations
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BFI_ASIC_GEN_CB = 1, /* crossbow 8G FC */
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BFI_ASIC_GEN_CT = 2, /* catapult 8G FC or 10G CNA */
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BFI_ASIC_GEN_CT2 = 3, /* catapult-2 16G FC or 10G CNA */
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BFI_ASIC_MODE_FC = 1, /* FC upto 8G speed */
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BFI_ASIC_MODE_FC16 = 2, /* FC upto 16G speed */
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BFI_ASIC_MODE_ETH = 3, /* Ethernet ports */
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BFI_ASIC_MODE_COMBO = 4, /* FC 16G and Ethernet 10G port */
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enum bfi_ioc_h2i_msgs {
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BFI_IOC_H2I_ENABLE_REQ = 1,
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BFI_IOC_H2I_DISABLE_REQ = 2,
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BFI_IOC_H2I_GETATTR_REQ = 3,
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BFI_IOC_H2I_DBG_SYNC = 4,
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BFI_IOC_H2I_DBG_DUMP = 5,
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enum bfi_ioc_i2h_msgs {
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BFI_IOC_I2H_ENABLE_REPLY = BFA_I2HM(1),
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BFI_IOC_I2H_DISABLE_REPLY = BFA_I2HM(2),
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BFI_IOC_I2H_GETATTR_REPLY = BFA_I2HM(3),
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BFI_IOC_I2H_HBEAT = BFA_I2HM(4),
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BFI_IOC_I2H_ACQ_ADDR_REPLY = BFA_I2HM(5),
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* BFI_IOC_H2I_GETATTR_REQ message
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struct bfi_ioc_getattr_req_s {
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struct bfi_mhdr_s mh;
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union bfi_addr_u attr_addr;
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struct bfi_ioc_attr_s {
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wwn_t mfg_pwwn; /* Mfg port wwn */
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wwn_t mfg_nwwn; /* Mfg node wwn */
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mac_t mfg_mac; /* Mfg mac */
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u8 port_mode; /* bfi_port_mode */
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mac_t mac; /* PBC or Mfg mac */
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char brcd_serialnum[STRSZ(BFA_MFG_SERIALNUM_SIZE)];
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u8 rx_bbcredit; /* receive buffer credits */
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u32 adapter_prop; /* adapter properties */
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u16 maxfrsize; /* max receive frame size */
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char fw_version[BFA_VERSION_LEN];
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char optrom_version[BFA_VERSION_LEN];
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struct bfa_mfg_vpd_s vpd;
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u32 card_type; /* card type */
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* BFI_IOC_I2H_GETATTR_REPLY message
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struct bfi_ioc_getattr_reply_s {
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struct bfi_mhdr_s mh; /* Common msg header */
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u8 status; /* cfg reply status */
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* Firmware memory page offsets
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#define BFI_IOC_SMEM_PG0_CB (0x40)
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#define BFI_IOC_SMEM_PG0_CT (0x180)
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* Firmware statistic offset
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#define BFI_IOC_FWSTATS_OFF (0x6B40)
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#define BFI_IOC_FWSTATS_SZ (4096)
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* Firmware trace offset
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#define BFI_IOC_TRC_OFF (0x4b00)
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#define BFI_IOC_TRC_ENTS 256
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#define BFI_IOC_FW_SIGNATURE (0xbfadbfad)
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#define BFI_IOC_MD5SUM_SZ 4
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struct bfi_ioc_image_hdr_s {
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u32 signature; /* constant signature */
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u8 asic_gen; /* asic generation */
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u8 port0_mode; /* device mode for port 0 */
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u8 port1_mode; /* device mode for port 1 */
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u32 exec; /* exec vector */
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u32 bootenv; /* fimware boot env */
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u32 md5sum[BFI_IOC_MD5SUM_SZ];
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#define BFI_FWBOOT_DEVMODE_OFF 4
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#define BFI_FWBOOT_TYPE_OFF 8
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#define BFI_FWBOOT_ENV_OFF 12
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#define BFI_FWBOOT_DEVMODE(__asic_gen, __asic_mode, __p0_mode, __p1_mode) \
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(((u32)(__asic_gen)) << 24 | \
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((u32)(__asic_mode)) << 16 | \
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((u32)(__p0_mode)) << 8 | \
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#define BFI_FWBOOT_TYPE_NORMAL 0
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#define BFI_FWBOOT_TYPE_MEMTEST 2
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#define BFI_FWBOOT_ENV_OS 0
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BFI_PORT_MODE_FC = 1,
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BFI_PORT_MODE_ETH = 2,
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struct bfi_ioc_hbeat_s {
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struct bfi_mhdr_s mh; /* common msg header */
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u32 hb_count; /* current heart beat count */
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* IOC hardware/firmware state
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BFI_IOC_UNINIT = 0, /* not initialized */
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BFI_IOC_INITING = 1, /* h/w is being initialized */
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BFI_IOC_HWINIT = 2, /* h/w is initialized */
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BFI_IOC_CFG = 3, /* IOC configuration in progress */
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BFI_IOC_OP = 4, /* IOC is operational */
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BFI_IOC_DISABLING = 5, /* IOC is being disabled */
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BFI_IOC_DISABLED = 6, /* IOC is disabled */
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BFI_IOC_CFG_DISABLED = 7, /* IOC is being disabled;transient */
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BFI_IOC_FAIL = 8, /* IOC heart-beat failure */
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BFI_IOC_MEMTEST = 9, /* IOC is doing memtest */
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#define BFI_IOC_ENDIAN_SIG 0x12345678
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BFI_ADAPTER_TYPE_FC = 0x01, /* FC adapters */
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BFI_ADAPTER_TYPE_MK = 0x0f0000, /* adapter type mask */
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BFI_ADAPTER_TYPE_SH = 16, /* adapter type shift */
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BFI_ADAPTER_NPORTS_MK = 0xff00, /* number of ports mask */
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BFI_ADAPTER_NPORTS_SH = 8, /* number of ports shift */
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BFI_ADAPTER_SPEED_MK = 0xff, /* adapter speed mask */
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BFI_ADAPTER_SPEED_SH = 0, /* adapter speed shift */
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BFI_ADAPTER_PROTO = 0x100000, /* prototype adapaters */
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BFI_ADAPTER_TTV = 0x200000, /* TTV debug capable */
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BFI_ADAPTER_UNSUPP = 0x400000, /* unknown adapter type */
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#define BFI_ADAPTER_GETP(__prop, __adap_prop) \
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(((__adap_prop) & BFI_ADAPTER_ ## __prop ## _MK) >> \
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BFI_ADAPTER_ ## __prop ## _SH)
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#define BFI_ADAPTER_SETP(__prop, __val) \
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((__val) << BFI_ADAPTER_ ## __prop ## _SH)
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#define BFI_ADAPTER_IS_PROTO(__adap_type) \
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((__adap_type) & BFI_ADAPTER_PROTO)
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#define BFI_ADAPTER_IS_TTV(__adap_type) \
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((__adap_type) & BFI_ADAPTER_TTV)
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#define BFI_ADAPTER_IS_UNSUPP(__adap_type) \
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((__adap_type) & BFI_ADAPTER_UNSUPP)
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#define BFI_ADAPTER_IS_SPECIAL(__adap_type) \
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((__adap_type) & (BFI_ADAPTER_TTV | BFI_ADAPTER_PROTO | \
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* BFI_IOC_H2I_ENABLE_REQ & BFI_IOC_H2I_DISABLE_REQ messages
406
struct bfi_ioc_ctrl_req_s {
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struct bfi_mhdr_s mh;
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#define bfi_ioc_enable_req_t struct bfi_ioc_ctrl_req_s;
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#define bfi_ioc_disable_req_t struct bfi_ioc_ctrl_req_s;
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* BFI_IOC_I2H_ENABLE_REPLY & BFI_IOC_I2H_DISABLE_REPLY messages
418
struct bfi_ioc_ctrl_reply_s {
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struct bfi_mhdr_s mh; /* Common msg header */
420
u8 status; /* enable/disable status */
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u8 port_mode; /* bfa_mode_s */
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u8 cap_bm; /* capability bit mask */
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#define bfi_ioc_enable_reply_t struct bfi_ioc_ctrl_reply_s;
426
#define bfi_ioc_disable_reply_t struct bfi_ioc_ctrl_reply_s;
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#define BFI_IOC_MSGSZ 8
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union bfi_ioc_h2i_msg_u {
433
struct bfi_mhdr_s mh;
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struct bfi_ioc_ctrl_req_s enable_req;
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struct bfi_ioc_ctrl_req_s disable_req;
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struct bfi_ioc_getattr_req_s getattr_req;
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u32 mboxmsg[BFI_IOC_MSGSZ];
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union bfi_ioc_i2h_msg_u {
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struct bfi_mhdr_s mh;
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struct bfi_ioc_ctrl_reply_s fw_event;
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u32 mboxmsg[BFI_IOC_MSGSZ];
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*----------------------------------------------------------------------
453
*----------------------------------------------------------------------
456
#define BFI_PBC_MAX_BLUNS 8
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#define BFI_PBC_MAX_VPORTS 16
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#define BFI_PBC_PORT_DISABLED 2
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* PBC boot lun configuration
463
struct bfi_pbc_blun_s {
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struct scsi_lun tgt_lun;
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* PBC virtual port configuration
471
struct bfi_pbc_vport_s {
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* BFI pre-boot configuration information
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struct bfi_pbc_blun_s blun[BFI_PBC_MAX_BLUNS];
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struct bfi_pbc_vport_s vport[BFI_PBC_MAX_VPORTS];
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*----------------------------------------------------------------------
496
*----------------------------------------------------------------------
498
#define BFI_MSGQ_FULL(_q) (((_q->pi + 1) % _q->q_depth) == _q->ci)
499
#define BFI_MSGQ_EMPTY(_q) (_q->pi == _q->ci)
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#define BFI_MSGQ_UPDATE_CI(_q) (_q->ci = (_q->ci + 1) % _q->q_depth)
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#define BFI_MSGQ_UPDATE_PI(_q) (_q->pi = (_q->pi + 1) % _q->q_depth)
503
/* q_depth must be power of 2 */
504
#define BFI_MSGQ_FREE_CNT(_q) ((_q->ci - _q->pi - 1) & (_q->q_depth - 1))
506
enum bfi_msgq_h2i_msgs_e {
507
BFI_MSGQ_H2I_INIT_REQ = 1,
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BFI_MSGQ_H2I_DOORBELL = 2,
509
BFI_MSGQ_H2I_SHUTDOWN = 3,
512
enum bfi_msgq_i2h_msgs_e {
513
BFI_MSGQ_I2H_INIT_RSP = 1,
514
BFI_MSGQ_I2H_DOORBELL = 2,
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/* Messages(commands/responsed/AENS will have the following header */
519
struct bfi_msgq_mhdr_s {
528
#define bfi_msgq_mhdr_set(_mh, _mc, _mid, _tok, _enet_id) do { \
529
(_mh).msg_class = (_mc); \
530
(_mh).msg_id = (_mid); \
531
(_mh).msg_token = (_tok); \
532
(_mh).enet_id = (_enet_id); \
536
* Mailbox for messaging interface
539
#define BFI_MSGQ_CMD_ENTRY_SIZE (64) /* TBD */
540
#define BFI_MSGQ_RSP_ENTRY_SIZE (64) /* TBD */
541
#define BFI_MSGQ_MSG_SIZE_MAX (2048) /* TBD */
544
union bfi_addr_u addr;
545
u16 q_depth; /* Total num of entries in the queue */
549
/* BFI_ENET_MSGQ_CFG_REQ TBD init or cfg? */
550
struct bfi_msgq_cfg_req_s {
551
struct bfi_mhdr_s mh;
552
struct bfi_msgq_s cmdq;
553
struct bfi_msgq_s rspq;
556
/* BFI_ENET_MSGQ_CFG_RSP */
557
struct bfi_msgq_cfg_rsp_s {
558
struct bfi_mhdr_s mh;
564
/* BFI_MSGQ_H2I_DOORBELL */
565
struct bfi_msgq_h2i_db_s {
566
struct bfi_mhdr_s mh;
571
/* BFI_MSGQ_I2H_DOORBELL */
572
struct bfi_msgq_i2h_db_s {
573
struct bfi_mhdr_s mh;
580
/* BFI port specific */
584
BFI_PORT_H2I_ENABLE_REQ = (1),
585
BFI_PORT_H2I_DISABLE_REQ = (2),
586
BFI_PORT_H2I_GET_STATS_REQ = (3),
587
BFI_PORT_H2I_CLEAR_STATS_REQ = (4),
591
BFI_PORT_I2H_ENABLE_RSP = BFA_I2HM(1),
592
BFI_PORT_I2H_DISABLE_RSP = BFA_I2HM(2),
593
BFI_PORT_I2H_GET_STATS_RSP = BFA_I2HM(3),
594
BFI_PORT_I2H_CLEAR_STATS_RSP = BFA_I2HM(4),
600
struct bfi_port_generic_req_s {
601
struct bfi_mhdr_s mh; /* msg header */
602
u32 msgtag; /* msgtag for reply */
609
struct bfi_port_generic_rsp_s {
610
struct bfi_mhdr_s mh; /* common msg header */
611
u8 status; /* port enable status */
613
u32 msgtag; /* msgtag for reply */
617
* BFI_PORT_H2I_GET_STATS_REQ
619
struct bfi_port_get_stats_req_s {
620
struct bfi_mhdr_s mh; /* common msg header */
621
union bfi_addr_u dma_addr;
624
union bfi_port_h2i_msg_u {
625
struct bfi_mhdr_s mh;
626
struct bfi_port_generic_req_s enable_req;
627
struct bfi_port_generic_req_s disable_req;
628
struct bfi_port_get_stats_req_s getstats_req;
629
struct bfi_port_generic_req_s clearstats_req;
632
union bfi_port_i2h_msg_u {
633
struct bfi_mhdr_s mh;
634
struct bfi_port_generic_rsp_s enable_rsp;
635
struct bfi_port_generic_rsp_s disable_rsp;
636
struct bfi_port_generic_rsp_s getstats_rsp;
637
struct bfi_port_generic_rsp_s clearstats_rsp;
641
*----------------------------------------------------------------------
643
*----------------------------------------------------------------------
645
enum bfi_ablk_h2i_msgs_e {
646
BFI_ABLK_H2I_QUERY = 1,
647
BFI_ABLK_H2I_ADPT_CONFIG = 2,
648
BFI_ABLK_H2I_PORT_CONFIG = 3,
649
BFI_ABLK_H2I_PF_CREATE = 4,
650
BFI_ABLK_H2I_PF_DELETE = 5,
651
BFI_ABLK_H2I_PF_UPDATE = 6,
652
BFI_ABLK_H2I_OPTROM_ENABLE = 7,
653
BFI_ABLK_H2I_OPTROM_DISABLE = 8,
656
enum bfi_ablk_i2h_msgs_e {
657
BFI_ABLK_I2H_QUERY = BFA_I2HM(BFI_ABLK_H2I_QUERY),
658
BFI_ABLK_I2H_ADPT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_ADPT_CONFIG),
659
BFI_ABLK_I2H_PORT_CONFIG = BFA_I2HM(BFI_ABLK_H2I_PORT_CONFIG),
660
BFI_ABLK_I2H_PF_CREATE = BFA_I2HM(BFI_ABLK_H2I_PF_CREATE),
661
BFI_ABLK_I2H_PF_DELETE = BFA_I2HM(BFI_ABLK_H2I_PF_DELETE),
662
BFI_ABLK_I2H_PF_UPDATE = BFA_I2HM(BFI_ABLK_H2I_PF_UPDATE),
663
BFI_ABLK_I2H_OPTROM_ENABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_ENABLE),
664
BFI_ABLK_I2H_OPTROM_DISABLE = BFA_I2HM(BFI_ABLK_H2I_OPTROM_DISABLE),
667
/* BFI_ABLK_H2I_QUERY */
668
struct bfi_ablk_h2i_query_s {
669
struct bfi_mhdr_s mh;
670
union bfi_addr_u addr;
673
/* BFI_ABL_H2I_ADPT_CONFIG, BFI_ABLK_H2I_PORT_CONFIG */
674
struct bfi_ablk_h2i_cfg_req_s {
675
struct bfi_mhdr_s mh;
683
* BFI_ABLK_H2I_PF_CREATE, BFI_ABLK_H2I_PF_DELETE,
685
struct bfi_ablk_h2i_pf_req_s {
686
struct bfi_mhdr_s mh;
693
/* BFI_ABLK_H2I_OPTROM_ENABLE, BFI_ABLK_H2I_OPTROM_DISABLE */
694
struct bfi_ablk_h2i_optrom_s {
695
struct bfi_mhdr_s mh;
700
* BFI_ABLK_I2H_PORT_CONFIG
701
* BFI_ABLK_I2H_PF_CREATE
702
* BFI_ABLK_I2H_PF_DELETE
703
* BFI_ABLK_I2H_PF_UPDATE
704
* BFI_ABLK_I2H_OPTROM_ENABLE
705
* BFI_ABLK_I2H_OPTROM_DISABLE
707
struct bfi_ablk_i2h_rsp_s {
708
struct bfi_mhdr_s mh;
716
* CEE module specific messages
719
/* Mailbox commands from host to firmware */
720
enum bfi_cee_h2i_msgs_e {
721
BFI_CEE_H2I_GET_CFG_REQ = 1,
722
BFI_CEE_H2I_RESET_STATS = 2,
723
BFI_CEE_H2I_GET_STATS_REQ = 3,
726
enum bfi_cee_i2h_msgs_e {
727
BFI_CEE_I2H_GET_CFG_RSP = BFA_I2HM(1),
728
BFI_CEE_I2H_RESET_STATS_RSP = BFA_I2HM(2),
729
BFI_CEE_I2H_GET_STATS_RSP = BFA_I2HM(3),
733
* H2I command structure for resetting the stats
735
struct bfi_cee_reset_stats_s {
736
struct bfi_mhdr_s mh;
740
* Get configuration command from host
742
struct bfi_cee_get_req_s {
743
struct bfi_mhdr_s mh;
744
union bfi_addr_u dma_addr;
748
* Reply message from firmware
750
struct bfi_cee_get_rsp_s {
751
struct bfi_mhdr_s mh;
757
* Reply message from firmware
759
struct bfi_cee_stats_rsp_s {
760
struct bfi_mhdr_s mh;
765
/* Mailbox message structures from firmware to host */
766
union bfi_cee_i2h_msg_u {
767
struct bfi_mhdr_s mh;
768
struct bfi_cee_get_rsp_s get_rsp;
769
struct bfi_cee_stats_rsp_s stats_rsp;
777
BFI_SFP_H2I_SHOW = 1,
782
BFI_SFP_I2H_SHOW = BFA_I2HM(BFI_SFP_H2I_SHOW),
783
BFI_SFP_I2H_SCN = BFA_I2HM(BFI_SFP_H2I_SCN),
787
* SFP state change notification
789
struct bfi_sfp_scn_s {
790
struct bfi_mhdr_s mhr; /* host msg header */
793
u8 pomlvl; /* pom level: normal/warning/alarm */
794
u8 is_elb; /* e-loopback */
800
enum bfa_sfp_stat_e {
801
BFA_SFP_STATE_INIT = 0, /* SFP state is uninit */
802
BFA_SFP_STATE_REMOVED = 1, /* SFP is removed */
803
BFA_SFP_STATE_INSERTED = 2, /* SFP is inserted */
804
BFA_SFP_STATE_VALID = 3, /* SFP is valid */
805
BFA_SFP_STATE_UNSUPPORT = 4, /* SFP is unsupport */
806
BFA_SFP_STATE_FAILED = 5, /* SFP i2c read fail */
810
* SFP memory access type
813
BFI_SFP_MEM_ALL = 0x1, /* access all data field */
814
BFI_SFP_MEM_DIAGEXT = 0x2, /* access diag ext data field only */
817
struct bfi_sfp_req_s {
818
struct bfi_mhdr_s mh;
821
struct bfi_alen_s alen;
824
struct bfi_sfp_rsp_s {
825
struct bfi_mhdr_s mh;
832
* FLASH module specific
834
enum bfi_flash_h2i_msgs {
835
BFI_FLASH_H2I_QUERY_REQ = 1,
836
BFI_FLASH_H2I_ERASE_REQ = 2,
837
BFI_FLASH_H2I_WRITE_REQ = 3,
838
BFI_FLASH_H2I_READ_REQ = 4,
839
BFI_FLASH_H2I_BOOT_VER_REQ = 5,
842
enum bfi_flash_i2h_msgs {
843
BFI_FLASH_I2H_QUERY_RSP = BFA_I2HM(1),
844
BFI_FLASH_I2H_ERASE_RSP = BFA_I2HM(2),
845
BFI_FLASH_I2H_WRITE_RSP = BFA_I2HM(3),
846
BFI_FLASH_I2H_READ_RSP = BFA_I2HM(4),
847
BFI_FLASH_I2H_BOOT_VER_RSP = BFA_I2HM(5),
848
BFI_FLASH_I2H_EVENT = BFA_I2HM(127),
852
* Flash query request
854
struct bfi_flash_query_req_s {
855
struct bfi_mhdr_s mh; /* Common msg header */
856
struct bfi_alen_s alen;
860
* Flash erase request
862
struct bfi_flash_erase_req_s {
863
struct bfi_mhdr_s mh; /* Common msg header */
864
u32 type; /* partition type */
865
u8 instance; /* partition instance */
870
* Flash write request
872
struct bfi_flash_write_req_s {
873
struct bfi_mhdr_s mh; /* Common msg header */
874
struct bfi_alen_s alen;
875
u32 type; /* partition type */
876
u8 instance; /* partition instance */
886
struct bfi_flash_read_req_s {
887
struct bfi_mhdr_s mh; /* Common msg header */
888
u32 type; /* partition type */
889
u8 instance; /* partition instance */
893
struct bfi_alen_s alen;
897
* Flash query response
899
struct bfi_flash_query_rsp_s {
900
struct bfi_mhdr_s mh; /* Common msg header */
905
* Flash read response
907
struct bfi_flash_read_rsp_s {
908
struct bfi_mhdr_s mh; /* Common msg header */
909
u32 type; /* partition type */
910
u8 instance; /* partition instance */
917
* Flash write response
919
struct bfi_flash_write_rsp_s {
920
struct bfi_mhdr_s mh; /* Common msg header */
921
u32 type; /* partition type */
922
u8 instance; /* partition instance */
929
* Flash erase response
931
struct bfi_flash_erase_rsp_s {
932
struct bfi_mhdr_s mh; /* Common msg header */
933
u32 type; /* partition type */
934
u8 instance; /* partition instance */
940
* Flash event notification
942
struct bfi_flash_event_s {
943
struct bfi_mhdr_s mh; /* Common msg header */
949
*----------------------------------------------------------------------
951
*----------------------------------------------------------------------
954
BFI_DIAG_H2I_PORTBEACON = 1,
955
BFI_DIAG_H2I_LOOPBACK = 2,
956
BFI_DIAG_H2I_FWPING = 3,
957
BFI_DIAG_H2I_TEMPSENSOR = 4,
958
BFI_DIAG_H2I_LEDTEST = 5,
959
BFI_DIAG_H2I_QTEST = 6,
963
BFI_DIAG_I2H_PORTBEACON = BFA_I2HM(BFI_DIAG_H2I_PORTBEACON),
964
BFI_DIAG_I2H_LOOPBACK = BFA_I2HM(BFI_DIAG_H2I_LOOPBACK),
965
BFI_DIAG_I2H_FWPING = BFA_I2HM(BFI_DIAG_H2I_FWPING),
966
BFI_DIAG_I2H_TEMPSENSOR = BFA_I2HM(BFI_DIAG_H2I_TEMPSENSOR),
967
BFI_DIAG_I2H_LEDTEST = BFA_I2HM(BFI_DIAG_H2I_LEDTEST),
968
BFI_DIAG_I2H_QTEST = BFA_I2HM(BFI_DIAG_H2I_QTEST),
971
#define BFI_DIAG_MAX_SGES 2
972
#define BFI_DIAG_DMA_BUF_SZ (2 * 1024)
973
#define BFI_BOOT_MEMTEST_RES_ADDR 0x900
974
#define BFI_BOOT_MEMTEST_RES_SIG 0xA0A1A2A3
976
struct bfi_diag_lb_req_s {
977
struct bfi_mhdr_s mh;
980
u8 lb_mode; /*!< bfa_port_opmode_t */
981
u8 speed; /*!< bfa_port_speed_t */
985
struct bfi_diag_lb_rsp_s {
986
struct bfi_mhdr_s mh; /* 4 bytes */
987
struct bfa_diag_loopback_result_s res; /* 16 bytes */
990
struct bfi_diag_fwping_req_s {
991
struct bfi_mhdr_s mh; /* 4 bytes */
992
struct bfi_alen_s alen; /* 12 bytes */
993
u32 data; /* user input data pattern */
994
u32 count; /* user input dma count */
995
u8 qtag; /* track CPE vc */
999
struct bfi_diag_fwping_rsp_s {
1000
struct bfi_mhdr_s mh; /* 4 bytes */
1001
u32 data; /* user input data pattern */
1002
u8 qtag; /* track CPE vc */
1003
u8 dma_status; /* dma status */
1008
* Temperature Sensor
1010
struct bfi_diag_ts_req_s {
1011
struct bfi_mhdr_s mh; /* 4 bytes */
1012
u16 temp; /* 10-bit A/D value */
1013
u16 brd_temp; /* 9-bit board temp */
1015
u8 ts_junc; /* show junction tempsensor */
1016
u8 ts_brd; /* show board tempsensor */
1019
#define bfi_diag_ts_rsp_t struct bfi_diag_ts_req_s
1021
struct bfi_diag_ledtest_req_s {
1022
struct bfi_mhdr_s mh; /* 4 bytes */
1026
u8 led; /* bitmap of LEDs to be tested */
1027
u16 freq; /* no. of blinks every 10 secs */
1031
/* notify host led operation is done */
1032
struct bfi_diag_ledtest_rsp_s {
1033
struct bfi_mhdr_s mh; /* 4 bytes */
1036
struct bfi_diag_portbeacon_req_s {
1037
struct bfi_mhdr_s mh; /* 4 bytes */
1038
u32 period; /* beaconing period */
1039
u8 beacon; /* 1: beacon on */
1043
/* notify host the beacon is off */
1044
struct bfi_diag_portbeacon_rsp_s {
1045
struct bfi_mhdr_s mh; /* 4 bytes */
1048
struct bfi_diag_qtest_req_s {
1049
struct bfi_mhdr_s mh; /* 4 bytes */
1050
u32 data[BFI_LMSG_PL_WSZ]; /* fill up tcm prefetch area */
1052
#define bfi_diag_qtest_rsp_t struct bfi_diag_qtest_req_s
1055
* PHY module specific
1057
enum bfi_phy_h2i_msgs_e {
1058
BFI_PHY_H2I_QUERY_REQ = 1,
1059
BFI_PHY_H2I_STATS_REQ = 2,
1060
BFI_PHY_H2I_WRITE_REQ = 3,
1061
BFI_PHY_H2I_READ_REQ = 4,
1064
enum bfi_phy_i2h_msgs_e {
1065
BFI_PHY_I2H_QUERY_RSP = BFA_I2HM(1),
1066
BFI_PHY_I2H_STATS_RSP = BFA_I2HM(2),
1067
BFI_PHY_I2H_WRITE_RSP = BFA_I2HM(3),
1068
BFI_PHY_I2H_READ_RSP = BFA_I2HM(4),
1072
* External PHY query request
1074
struct bfi_phy_query_req_s {
1075
struct bfi_mhdr_s mh; /* Common msg header */
1078
struct bfi_alen_s alen;
1082
* External PHY stats request
1084
struct bfi_phy_stats_req_s {
1085
struct bfi_mhdr_s mh; /* Common msg header */
1088
struct bfi_alen_s alen;
1092
* External PHY write request
1094
struct bfi_phy_write_req_s {
1095
struct bfi_mhdr_s mh; /* Common msg header */
1101
struct bfi_alen_s alen;
1105
* External PHY read request
1107
struct bfi_phy_read_req_s {
1108
struct bfi_mhdr_s mh; /* Common msg header */
1113
struct bfi_alen_s alen;
1117
* External PHY query response
1119
struct bfi_phy_query_rsp_s {
1120
struct bfi_mhdr_s mh; /* Common msg header */
1125
* External PHY stats response
1127
struct bfi_phy_stats_rsp_s {
1128
struct bfi_mhdr_s mh; /* Common msg header */
1133
* External PHY read response
1135
struct bfi_phy_read_rsp_s {
1136
struct bfi_mhdr_s mh; /* Common msg header */
1142
* External PHY write response
1144
struct bfi_phy_write_rsp_s {
1145
struct bfi_mhdr_s mh; /* Common msg header */
1152
#endif /* __BFI_H__ */