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* Copyright (c) 2007, 2009, 2010 QLogic Corporation. All rights reserved.
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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/* grab register-defs auto-generated by HW */
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#include "qib_7220_regs.h"
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/* The number of eager receive TIDs for context zero. */
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#define IBA7220_KRCVEGRCNT 2048U
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#define IB_7220_LT_STATE_CFGRCVFCFG 0x09
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#define IB_7220_LT_STATE_CFGWAITRMT 0x0a
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#define IB_7220_LT_STATE_TXREVLANES 0x0d
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#define IB_7220_LT_STATE_CFGENH 0x10
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struct qib_chip_specific {
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u64 __iomem *cregbase;
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spinlock_t sdepb_lock; /* serdes EPB bus */
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spinlock_t rcvmod_lock; /* protect rcvctrl shadow changes */
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spinlock_t gpio_lock; /* RMW of shadows/regs for ExtCtrl and GPIO */
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u64 gpio_out; /* shadow of kr_gpio_out, for rmw ops */
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u64 gpio_mask; /* shadow the gpio mask register */
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u64 extctrl; /* shadow the gpio output enable, etc... */
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u32 serdes_first_init_done;
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u32 updthresh; /* current AvailUpdThld */
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u32 updthresh_dflt; /* default AvailUpdThld */
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u8 relock_timer_active;
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struct timer_list relock_timer;
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unsigned int relock_interval; /* in jiffies */
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struct qib_chippport_specific {
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struct qib_pportdata pportdata;
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wait_queue_head_t autoneg_wait;
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struct delayed_work autoneg_work;
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struct timer_list chase_timer;
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* these 5 fields are used to establish deltas for IB symbol
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* errors and linkrecovery errors. They can be reported on
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* some chips during link negotiation prior to INIT, and with
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* DDR when faking DDR negotiations with non-IBTA switches.
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* The chip counters are adjusted at driver unload if there is
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u64 ibcctrl; /* kr_ibcctrl shadow */
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u64 ibcddrctrl; /* kr_ibcddrctrl shadow */
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* This header file provides the declarations and common definitions
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* for (mostly) manipulation of the SerDes blocks within the IBA7220.
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* the functions declared should only be called from within other
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* 7220-related files such as qib_iba7220.c or qib_sd7220.c.
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int qib_sd7220_presets(struct qib_devdata *dd);
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int qib_sd7220_init(struct qib_devdata *dd);
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void qib_sd7220_clr_ibpar(struct qib_devdata *);
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* Below used for sdnum parameter, selecting one of the two sections
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* used for PCIe, or the single SerDes used for IB, which is the
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* only one currently used
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#define IB_7220_SERDES 2
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static inline u32 qib_read_kreg32(const struct qib_devdata *dd,
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if (!dd->kregbase || !(dd->flags & QIB_PRESENT))
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return readl((u32 __iomem *)&dd->kregbase[regno]);
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static inline u64 qib_read_kreg64(const struct qib_devdata *dd,
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if (!dd->kregbase || !(dd->flags & QIB_PRESENT))
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return readq(&dd->kregbase[regno]);
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static inline void qib_write_kreg(const struct qib_devdata *dd,
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const u16 regno, u64 value)
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writeq(value, &dd->kregbase[regno]);
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void set_7220_relock_poll(struct qib_devdata *, int);
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void shutdown_7220_relock_poll(struct qib_devdata *);
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void toggle_7220_rclkrls(struct qib_devdata *);
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#endif /* _QIB_7220_H */