2
* abyss.c: Network driver for the Madge Smart 16/4 PCI Mk2 token ring card.
4
* Written 1999-2000 by Adam Fritzler
6
* This software may be used and distributed according to the terms
7
* of the GNU General Public License, incorporated herein by reference.
9
* This driver module supports the following cards:
10
* - Madge Smart 16/4 PCI Mk2
15
* Modification History:
16
* 30-Dec-99 AF Split off from the tms380tr driver.
17
* 22-Jan-00 AF Updated to use indirect read/writes
18
* 23-Nov-00 JG New PCI API, cleanups
22
* 1. See if we can use MMIO instead of inb/outb/inw/outw
23
* 2. Add support for Mk1 (has AT24 attached to the PCI
28
#include <linux/module.h>
29
#include <linux/kernel.h>
30
#include <linux/errno.h>
31
#include <linux/pci.h>
32
#include <linux/init.h>
33
#include <linux/netdevice.h>
34
#include <linux/trdevice.h>
36
#include <asm/system.h>
41
#include "abyss.h" /* Madge-specific constants */
43
static char version[] __devinitdata =
44
"abyss.c: v1.02 23/11/2000 by Adam Fritzler\n";
46
#define ABYSS_IO_EXTENT 64
48
static DEFINE_PCI_DEVICE_TABLE(abyss_pci_tbl) = {
49
{ PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_MK2,
50
PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_TOKEN_RING << 8, 0x00ffffff, },
51
{ } /* Terminating entry */
53
MODULE_DEVICE_TABLE(pci, abyss_pci_tbl);
55
MODULE_LICENSE("GPL");
57
static int abyss_open(struct net_device *dev);
58
static int abyss_close(struct net_device *dev);
59
static void abyss_enable(struct net_device *dev);
60
static int abyss_chipset_init(struct net_device *dev);
61
static void abyss_read_eeprom(struct net_device *dev);
62
static unsigned short abyss_setnselout_pins(struct net_device *dev);
64
static void at24_writedatabyte(unsigned long regaddr, unsigned char byte);
65
static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr);
66
static int at24_sendcmd(unsigned long regaddr, unsigned char cmd);
67
static unsigned char at24_readdatabit(unsigned long regaddr);
68
static unsigned char at24_readdatabyte(unsigned long regaddr);
69
static int at24_waitforack(unsigned long regaddr);
70
static int at24_waitfornack(unsigned long regaddr);
71
static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data);
72
static void at24_start(unsigned long regaddr);
73
static unsigned char at24_readb(unsigned long regaddr, unsigned char addr);
75
static unsigned short abyss_sifreadb(struct net_device *dev, unsigned short reg)
77
return inb(dev->base_addr + reg);
80
static unsigned short abyss_sifreadw(struct net_device *dev, unsigned short reg)
82
return inw(dev->base_addr + reg);
85
static void abyss_sifwriteb(struct net_device *dev, unsigned short val, unsigned short reg)
87
outb(val, dev->base_addr + reg);
90
static void abyss_sifwritew(struct net_device *dev, unsigned short val, unsigned short reg)
92
outw(val, dev->base_addr + reg);
95
static struct net_device_ops abyss_netdev_ops;
97
static int __devinit abyss_attach(struct pci_dev *pdev, const struct pci_device_id *ent)
99
static int versionprinted;
100
struct net_device *dev;
101
struct net_local *tp;
102
int ret, pci_irq_line;
103
unsigned long pci_ioaddr;
105
if (versionprinted++ == 0)
106
printk("%s", version);
108
if (pci_enable_device(pdev))
111
/* Remove I/O space marker in bit 0. */
112
pci_irq_line = pdev->irq;
113
pci_ioaddr = pci_resource_start (pdev, 0);
115
/* At this point we have found a valid card. */
117
dev = alloc_trdev(sizeof(struct net_local));
121
if (!request_region(pci_ioaddr, ABYSS_IO_EXTENT, dev->name)) {
126
ret = request_irq(pdev->irq, tms380tr_interrupt, IRQF_SHARED,
131
dev->base_addr = pci_ioaddr;
132
dev->irq = pci_irq_line;
134
printk("%s: Madge Smart 16/4 PCI Mk2 (Abyss)\n", dev->name);
135
printk("%s: IO: %#4lx IRQ: %d\n",
136
dev->name, pci_ioaddr, dev->irq);
138
* The TMS SIF registers lay 0x10 above the card base address.
140
dev->base_addr += 0x10;
142
ret = tmsdev_init(dev, &pdev->dev);
144
printk("%s: unable to get memory for dev->priv.\n",
149
abyss_read_eeprom(dev);
151
printk("%s: Ring Station Address: %pM\n", dev->name, dev->dev_addr);
153
tp = netdev_priv(dev);
154
tp->setnselout = abyss_setnselout_pins;
155
tp->sifreadb = abyss_sifreadb;
156
tp->sifreadw = abyss_sifreadw;
157
tp->sifwriteb = abyss_sifwriteb;
158
tp->sifwritew = abyss_sifwritew;
160
memcpy(tp->ProductID, "Madge PCI 16/4 Mk2", PROD_ID_SIZE + 1);
162
dev->netdev_ops = &abyss_netdev_ops;
164
pci_set_drvdata(pdev, dev);
165
SET_NETDEV_DEV(dev, &pdev->dev);
167
ret = register_netdev(dev);
173
pci_set_drvdata(pdev, NULL);
176
free_irq(pdev->irq, dev);
178
release_region(pci_ioaddr, ABYSS_IO_EXTENT);
184
static unsigned short abyss_setnselout_pins(struct net_device *dev)
186
unsigned short val = 0;
187
struct net_local *tp = netdev_priv(dev);
189
if(tp->DataRate == SPEED_4)
190
val |= 0x01; /* Set 4Mbps */
192
val |= 0x00; /* Set 16Mbps */
198
* The following Madge boards should use this code:
199
* - Smart 16/4 PCI Mk2 (Abyss)
200
* - Smart 16/4 PCI Mk1 (PCI T)
201
* - Smart 16/4 Client Plus PnP (Big Apple)
202
* - Smart 16/4 Cardbus Mk2
204
* These access an Atmel AT24 SEEPROM using their glue chip registers.
207
static void at24_writedatabyte(unsigned long regaddr, unsigned char byte)
211
for (i = 0; i < 8; i++) {
212
at24_setlines(regaddr, 0, (byte >> (7-i))&0x01);
213
at24_setlines(regaddr, 1, (byte >> (7-i))&0x01);
214
at24_setlines(regaddr, 0, (byte >> (7-i))&0x01);
218
static int at24_sendfullcmd(unsigned long regaddr, unsigned char cmd, unsigned char addr)
220
if (at24_sendcmd(regaddr, cmd)) {
221
at24_writedatabyte(regaddr, addr);
222
return at24_waitforack(regaddr);
227
static int at24_sendcmd(unsigned long regaddr, unsigned char cmd)
231
for (i = 0; i < 10; i++) {
233
at24_writedatabyte(regaddr, cmd);
234
if (at24_waitforack(regaddr))
240
static unsigned char at24_readdatabit(unsigned long regaddr)
244
at24_setlines(regaddr, 0, 1);
245
at24_setlines(regaddr, 1, 1);
246
val = (inb(regaddr) & AT24_DATA)?1:0;
247
at24_setlines(regaddr, 1, 1);
248
at24_setlines(regaddr, 0, 1);
252
static unsigned char at24_readdatabyte(unsigned long regaddr)
254
unsigned char data = 0;
257
for (i = 0; i < 8; i++) {
259
data |= at24_readdatabit(regaddr);
265
static int at24_waitforack(unsigned long regaddr)
269
for (i = 0; i < 10; i++) {
270
if ((at24_readdatabit(regaddr) & 0x01) == 0x00)
276
static int at24_waitfornack(unsigned long regaddr)
279
for (i = 0; i < 10; i++) {
280
if ((at24_readdatabit(regaddr) & 0x01) == 0x01)
286
static void at24_setlines(unsigned long regaddr, unsigned char clock, unsigned char data)
288
unsigned char val = AT24_ENABLE;
295
tms380tr_wait(20); /* Very necessary. */
298
static void at24_start(unsigned long regaddr)
300
at24_setlines(regaddr, 0, 1);
301
at24_setlines(regaddr, 1, 1);
302
at24_setlines(regaddr, 1, 0);
303
at24_setlines(regaddr, 0, 1);
306
static unsigned char at24_readb(unsigned long regaddr, unsigned char addr)
308
unsigned char data = 0xff;
310
if (at24_sendfullcmd(regaddr, AT24_WRITE, addr)) {
311
if (at24_sendcmd(regaddr, AT24_READ)) {
312
data = at24_readdatabyte(regaddr);
313
if (!at24_waitfornack(regaddr))
322
* Enable basic functions of the Madge chipset needed
323
* for initialization.
325
static void abyss_enable(struct net_device *dev)
327
unsigned char reset_reg;
328
unsigned long ioaddr;
330
ioaddr = dev->base_addr;
331
reset_reg = inb(ioaddr + PCIBM2_RESET_REG);
332
reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
333
outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
338
* Enable the functions of the Madge chipset needed for
339
* full working order.
341
static int abyss_chipset_init(struct net_device *dev)
343
unsigned char reset_reg;
344
unsigned long ioaddr;
346
ioaddr = dev->base_addr;
348
reset_reg = inb(ioaddr + PCIBM2_RESET_REG);
350
reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
351
outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
353
reset_reg &= ~(PCIBM2_RESET_REG_CHIP_NRES |
354
PCIBM2_RESET_REG_FIFO_NRES |
355
PCIBM2_RESET_REG_SIF_NRES);
356
outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
360
reset_reg |= PCIBM2_RESET_REG_CHIP_NRES;
361
outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
363
reset_reg |= PCIBM2_RESET_REG_SIF_NRES;
364
outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
366
reset_reg |= PCIBM2_RESET_REG_FIFO_NRES;
367
outb(reset_reg, ioaddr + PCIBM2_RESET_REG);
369
outb(PCIBM2_INT_CONTROL_REG_SINTEN |
370
PCIBM2_INT_CONTROL_REG_PCI_ERR_ENABLE,
371
ioaddr + PCIBM2_INT_CONTROL_REG);
373
outb(30, ioaddr + PCIBM2_FIFO_THRESHOLD);
378
static inline void abyss_chipset_close(struct net_device *dev)
380
unsigned long ioaddr;
382
ioaddr = dev->base_addr;
383
outb(0, ioaddr + PCIBM2_RESET_REG);
387
* Read configuration data from the AT24 SEEPROM on Madge cards.
390
static void abyss_read_eeprom(struct net_device *dev)
392
struct net_local *tp;
393
unsigned long ioaddr;
397
tp = netdev_priv(dev);
398
ioaddr = dev->base_addr;
400
/* Must enable glue chip first */
403
val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
404
PCIBM2_SEEPROM_RING_SPEED);
405
tp->DataRate = val?SPEED_4:SPEED_16; /* set open speed */
406
printk("%s: SEEPROM: ring speed: %dMb/sec\n", dev->name, tp->DataRate);
408
val = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
409
PCIBM2_SEEPROM_RAM_SIZE) * 128;
410
printk("%s: SEEPROM: adapter RAM: %dkb\n", dev->name, val);
413
for (i = 0; i < 6; i++)
414
dev->dev_addr[i] = at24_readb(ioaddr + PCIBM2_SEEPROM_REG,
415
PCIBM2_SEEPROM_BIA+i);
418
static int abyss_open(struct net_device *dev)
420
abyss_chipset_init(dev);
425
static int abyss_close(struct net_device *dev)
428
abyss_chipset_close(dev);
432
static void __devexit abyss_detach (struct pci_dev *pdev)
434
struct net_device *dev = pci_get_drvdata(pdev);
437
unregister_netdev(dev);
438
release_region(dev->base_addr-0x10, ABYSS_IO_EXTENT);
439
free_irq(dev->irq, dev);
442
pci_set_drvdata(pdev, NULL);
445
static struct pci_driver abyss_driver = {
447
.id_table = abyss_pci_tbl,
448
.probe = abyss_attach,
449
.remove = __devexit_p(abyss_detach),
452
static int __init abyss_init (void)
454
abyss_netdev_ops = tms380tr_netdev_ops;
456
abyss_netdev_ops.ndo_open = abyss_open;
457
abyss_netdev_ops.ndo_stop = abyss_close;
459
return pci_register_driver(&abyss_driver);
462
static void __exit abyss_rmmod (void)
464
pci_unregister_driver (&abyss_driver);
467
module_init(abyss_init);
468
module_exit(abyss_rmmod);