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* P1020 RDB Core1 Device Tree Source in CAMP mode.
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* In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
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* can be shared, all the other devices must be assigned to one core only.
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* This dts allows core1 to have l2, eth0, crypto.
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* Please note to add "-b 1" for core1's dts compiling.
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* Copyright 2011 Freescale Semiconductor Inc.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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/include/ "p1020si.dtsi"
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model = "fsl,P1020RDB";
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compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";
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device_type = "memory";
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memory-controller@2000 {
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serial0: serial@4500 {
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gpio: gpio-controller@f000 {
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enet0: ethernet@b0000 {
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fixed-link = <1 1 1000 0 0>;
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phy-connection-type = "rgmii-id";
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enet1: ethernet@b1000 {
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enet2: ethernet@b2000 {
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protected-sources = <
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16 /* ecm, mem, L2, pci0, pci1 */
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43 42 59 /* i2c, serial0, spi */
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47 63 62 /* gpio, tdm */
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20 21 22 23 /* dma */
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35 36 40 /* enet1-queue-group0 */
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51 52 67 /* enet1-queue-group1 */
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31 32 33 /* enet2-queue-group0 */
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25 26 27 /* enet2-queue-group1 */
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28 72 58 /* usb, sdhci, crypto */
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0xb0 0xb1 0xb2 /* message */
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0xe0 0xe1 0xe2 /* msi */
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0xe6 0xe7 /* sdhci, crypto , pci */
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global-utilities@e0000 { //global utilities block
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pci0: pcie@ffe09000 {
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pci1: pcie@ffe0a000 {