2
* Driver for OMAP-UART controller.
3
* Based on drivers/serial/8250.c
5
* Copyright (C) 2010 Texas Instruments.
8
* Govindraj R <govindraj.raja@ti.com>
9
* Thara Gopinath <thara@ti.com>
11
* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* Note: This driver is made separate from 8250 driver as we cannot
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* over load 8250 driver with omap platform specific configuration for
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* features like DMA, it makes easier to implement features like DMA and
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* hardware flow control and software flow control configuration with
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* this driver as required for the omap-platform.
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#if defined(CONFIG_SERIAL_OMAP_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/console.h>
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#include <linux/serial_reg.h>
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#include <linux/delay.h>
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#include <linux/slab.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <linux/serial_core.h>
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#include <linux/irq.h>
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#include <plat/dmtimer.h>
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#include <plat/omap-serial.h>
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static struct uart_omap_port *ui[OMAP_MAX_HSUART_PORTS];
47
/* Forward declaration of functions */
48
static void uart_tx_dma_callback(int lch, u16 ch_status, void *data);
49
static void serial_omap_rx_timeout(unsigned long uart_no);
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static int serial_omap_start_rxdma(struct uart_omap_port *up);
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static inline unsigned int serial_in(struct uart_omap_port *up, int offset)
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offset <<= up->port.regshift;
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return readw(up->port.membase + offset);
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static inline void serial_out(struct uart_omap_port *up, int offset, int value)
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offset <<= up->port.regshift;
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writew(value, up->port.membase + offset);
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static inline void serial_omap_clear_fifos(struct uart_omap_port *up)
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serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
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serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
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UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
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serial_out(up, UART_FCR, 0);
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* serial_omap_get_divisor - calculate divisor value
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* @port: uart port info
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* @baud: baudrate for which divisor needs to be calculated.
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* We have written our own function to get the divisor so as to support
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* 13x mode. 3Mbps Baudrate as an different divisor.
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* Reference OMAP TRM Chapter 17:
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* Table 17-1. UART Mode Baud Rates, Divisor Values, and Error Rates
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* referring to oversampling - divisor value
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* baudrate 460,800 to 3,686,400 all have divisor 13
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* except 3,000,000 which has divisor value 16
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serial_omap_get_divisor(struct uart_port *port, unsigned int baud)
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if (baud > OMAP_MODE13X_SPEED && baud != 3000000)
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return port->uartclk/(baud * divisor);
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static void serial_omap_stop_rxdma(struct uart_omap_port *up)
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if (up->uart_dma.rx_dma_used) {
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del_timer(&up->uart_dma.rx_timer);
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omap_stop_dma(up->uart_dma.rx_dma_channel);
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omap_free_dma(up->uart_dma.rx_dma_channel);
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up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
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up->uart_dma.rx_dma_used = false;
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static void serial_omap_enable_ms(struct uart_port *port)
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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dev_dbg(up->port.dev, "serial_omap_enable_ms+%d\n", up->pdev->id);
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up->ier |= UART_IER_MSI;
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serial_out(up, UART_IER, up->ier);
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static void serial_omap_stop_tx(struct uart_port *port)
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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up->uart_dma.tx_dma_channel != OMAP_UART_DMA_CH_FREE) {
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* Check if dma is still active. If yes do nothing,
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* return. Else stop dma
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if (omap_get_dma_active_status(up->uart_dma.tx_dma_channel))
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omap_stop_dma(up->uart_dma.tx_dma_channel);
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omap_free_dma(up->uart_dma.tx_dma_channel);
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up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
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if (up->ier & UART_IER_THRI) {
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up->ier &= ~UART_IER_THRI;
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serial_out(up, UART_IER, up->ier);
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static void serial_omap_stop_rx(struct uart_port *port)
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struct uart_omap_port *up = (struct uart_omap_port *)port;
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serial_omap_stop_rxdma(up);
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up->ier &= ~UART_IER_RLSI;
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up->port.read_status_mask &= ~UART_LSR_DR;
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serial_out(up, UART_IER, up->ier);
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static inline void receive_chars(struct uart_omap_port *up, int *status)
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struct tty_struct *tty = up->port.state->port.tty;
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unsigned char ch, lsr = *status;
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if (likely(lsr & UART_LSR_DR))
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ch = serial_in(up, UART_RX);
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up->port.icount.rx++;
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if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
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* For statistics only
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if (lsr & UART_LSR_BI) {
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lsr &= ~(UART_LSR_FE | UART_LSR_PE);
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up->port.icount.brk++;
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* We do the SysRQ and SAK checking
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* here because otherwise the break
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* may get masked by ignore_status_mask
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* or read_status_mask.
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if (uart_handle_break(&up->port))
179
} else if (lsr & UART_LSR_PE) {
180
up->port.icount.parity++;
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} else if (lsr & UART_LSR_FE) {
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up->port.icount.frame++;
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if (lsr & UART_LSR_OE)
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up->port.icount.overrun++;
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* Mask off conditions which should be ignored.
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lsr &= up->port.read_status_mask;
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#ifdef CONFIG_SERIAL_OMAP_CONSOLE
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if (up->port.line == up->port.cons->index) {
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/* Recover the break flag from console xmit */
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lsr |= up->lsr_break_flag;
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if (lsr & UART_LSR_BI)
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else if (lsr & UART_LSR_PE)
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else if (lsr & UART_LSR_FE)
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if (uart_handle_sysrq_char(&up->port, ch))
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uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
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lsr = serial_in(up, UART_LSR);
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} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
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spin_unlock(&up->port.lock);
214
tty_flip_buffer_push(tty);
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spin_lock(&up->port.lock);
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static void transmit_chars(struct uart_omap_port *up)
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struct circ_buf *xmit = &up->port.state->xmit;
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if (up->port.x_char) {
224
serial_out(up, UART_TX, up->port.x_char);
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up->port.icount.tx++;
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if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
230
serial_omap_stop_tx(&up->port);
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count = up->port.fifosize / 4;
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serial_out(up, UART_TX, xmit->buf[xmit->tail]);
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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up->port.icount.tx++;
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if (uart_circ_empty(xmit))
240
} while (--count > 0);
242
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
243
uart_write_wakeup(&up->port);
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if (uart_circ_empty(xmit))
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serial_omap_stop_tx(&up->port);
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static inline void serial_omap_enable_ier_thri(struct uart_omap_port *up)
251
if (!(up->ier & UART_IER_THRI)) {
252
up->ier |= UART_IER_THRI;
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serial_out(up, UART_IER, up->ier);
257
static void serial_omap_start_tx(struct uart_port *port)
259
struct uart_omap_port *up = (struct uart_omap_port *)port;
260
struct circ_buf *xmit;
265
serial_omap_enable_ier_thri(up);
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if (up->uart_dma.tx_dma_used)
272
xmit = &up->port.state->xmit;
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if (up->uart_dma.tx_dma_channel == OMAP_UART_DMA_CH_FREE) {
275
ret = omap_request_dma(up->uart_dma.uart_dma_tx,
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(void *)uart_tx_dma_callback, up,
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&(up->uart_dma.tx_dma_channel));
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serial_omap_enable_ier_thri(up);
285
spin_lock(&(up->uart_dma.tx_lock));
286
up->uart_dma.tx_dma_used = true;
287
spin_unlock(&(up->uart_dma.tx_lock));
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start = up->uart_dma.tx_buf_dma_phys +
290
(xmit->tail & (UART_XMIT_SIZE - 1));
292
up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
294
* It is a circular buffer. See if the buffer has wounded back.
295
* If yes it will have to be transferred in two separate dma
298
if (start + up->uart_dma.tx_buf_size >=
299
up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
300
up->uart_dma.tx_buf_size =
301
(up->uart_dma.tx_buf_dma_phys +
302
UART_XMIT_SIZE) - start;
304
omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
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OMAP_DMA_AMODE_CONSTANT,
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up->uart_dma.uart_base, 0, 0);
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omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
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OMAP_DMA_AMODE_POST_INC, start, 0, 0);
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omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
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OMAP_DMA_DATA_TYPE_S8,
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up->uart_dma.tx_buf_size, 1,
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OMAP_DMA_SYNC_ELEMENT,
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up->uart_dma.uart_dma_tx, 0);
314
/* FIXME: Cache maintenance needed here? */
315
omap_start_dma(up->uart_dma.tx_dma_channel);
318
static unsigned int check_modem_status(struct uart_omap_port *up)
322
status = serial_in(up, UART_MSR);
323
status |= up->msr_saved_flags;
324
up->msr_saved_flags = 0;
325
if ((status & UART_MSR_ANY_DELTA) == 0)
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if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
329
up->port.state != NULL) {
330
if (status & UART_MSR_TERI)
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up->port.icount.rng++;
332
if (status & UART_MSR_DDSR)
333
up->port.icount.dsr++;
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if (status & UART_MSR_DDCD)
335
uart_handle_dcd_change
336
(&up->port, status & UART_MSR_DCD);
337
if (status & UART_MSR_DCTS)
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uart_handle_cts_change
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(&up->port, status & UART_MSR_CTS);
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wake_up_interruptible(&up->port.state->port.delta_msr_wait);
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* serial_omap_irq() - This handles the interrupt from one port
348
* @irq: uart port irq number
349
* @dev_id: uart port info
351
static inline irqreturn_t serial_omap_irq(int irq, void *dev_id)
353
struct uart_omap_port *up = dev_id;
354
unsigned int iir, lsr;
357
iir = serial_in(up, UART_IIR);
358
if (iir & UART_IIR_NO_INT)
361
spin_lock_irqsave(&up->port.lock, flags);
362
lsr = serial_in(up, UART_LSR);
363
if (iir & UART_IIR_RLSI) {
365
if (lsr & UART_LSR_DR)
366
receive_chars(up, &lsr);
368
up->ier &= ~(UART_IER_RDI | UART_IER_RLSI);
369
serial_out(up, UART_IER, up->ier);
370
if ((serial_omap_start_rxdma(up) != 0) &&
372
receive_chars(up, &lsr);
376
check_modem_status(up);
377
if ((lsr & UART_LSR_THRE) && (iir & UART_IIR_THRI))
380
spin_unlock_irqrestore(&up->port.lock, flags);
381
up->port_activity = jiffies;
385
static unsigned int serial_omap_tx_empty(struct uart_port *port)
387
struct uart_omap_port *up = (struct uart_omap_port *)port;
388
unsigned long flags = 0;
389
unsigned int ret = 0;
391
dev_dbg(up->port.dev, "serial_omap_tx_empty+%d\n", up->pdev->id);
392
spin_lock_irqsave(&up->port.lock, flags);
393
ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
394
spin_unlock_irqrestore(&up->port.lock, flags);
399
static unsigned int serial_omap_get_mctrl(struct uart_port *port)
401
struct uart_omap_port *up = (struct uart_omap_port *)port;
402
unsigned char status;
403
unsigned int ret = 0;
405
status = check_modem_status(up);
406
dev_dbg(up->port.dev, "serial_omap_get_mctrl+%d\n", up->pdev->id);
408
if (status & UART_MSR_DCD)
410
if (status & UART_MSR_RI)
412
if (status & UART_MSR_DSR)
414
if (status & UART_MSR_CTS)
419
static void serial_omap_set_mctrl(struct uart_port *port, unsigned int mctrl)
421
struct uart_omap_port *up = (struct uart_omap_port *)port;
422
unsigned char mcr = 0;
424
dev_dbg(up->port.dev, "serial_omap_set_mctrl+%d\n", up->pdev->id);
425
if (mctrl & TIOCM_RTS)
427
if (mctrl & TIOCM_DTR)
429
if (mctrl & TIOCM_OUT1)
430
mcr |= UART_MCR_OUT1;
431
if (mctrl & TIOCM_OUT2)
432
mcr |= UART_MCR_OUT2;
433
if (mctrl & TIOCM_LOOP)
434
mcr |= UART_MCR_LOOP;
437
serial_out(up, UART_MCR, mcr);
440
static void serial_omap_break_ctl(struct uart_port *port, int break_state)
442
struct uart_omap_port *up = (struct uart_omap_port *)port;
443
unsigned long flags = 0;
445
dev_dbg(up->port.dev, "serial_omap_break_ctl+%d\n", up->pdev->id);
446
spin_lock_irqsave(&up->port.lock, flags);
447
if (break_state == -1)
448
up->lcr |= UART_LCR_SBC;
450
up->lcr &= ~UART_LCR_SBC;
451
serial_out(up, UART_LCR, up->lcr);
452
spin_unlock_irqrestore(&up->port.lock, flags);
455
static int serial_omap_startup(struct uart_port *port)
457
struct uart_omap_port *up = (struct uart_omap_port *)port;
458
unsigned long flags = 0;
464
retval = request_irq(up->port.irq, serial_omap_irq, up->port.irqflags,
469
dev_dbg(up->port.dev, "serial_omap_startup+%d\n", up->pdev->id);
472
* Clear the FIFO buffers and disable them.
473
* (they will be reenabled in set_termios())
475
serial_omap_clear_fifos(up);
476
/* For Hardware flow control */
477
serial_out(up, UART_MCR, UART_MCR_RTS);
480
* Clear the interrupt registers.
482
(void) serial_in(up, UART_LSR);
483
if (serial_in(up, UART_LSR) & UART_LSR_DR)
484
(void) serial_in(up, UART_RX);
485
(void) serial_in(up, UART_IIR);
486
(void) serial_in(up, UART_MSR);
489
* Now, initialize the UART
491
serial_out(up, UART_LCR, UART_LCR_WLEN8);
492
spin_lock_irqsave(&up->port.lock, flags);
494
* Most PC uarts need OUT2 raised to enable interrupts.
496
up->port.mctrl |= TIOCM_OUT2;
497
serial_omap_set_mctrl(&up->port, up->port.mctrl);
498
spin_unlock_irqrestore(&up->port.lock, flags);
500
up->msr_saved_flags = 0;
502
free_page((unsigned long)up->port.state->xmit.buf);
503
up->port.state->xmit.buf = dma_alloc_coherent(NULL,
505
(dma_addr_t *)&(up->uart_dma.tx_buf_dma_phys),
507
init_timer(&(up->uart_dma.rx_timer));
508
up->uart_dma.rx_timer.function = serial_omap_rx_timeout;
509
up->uart_dma.rx_timer.data = up->pdev->id;
510
/* Currently the buffer size is 4KB. Can increase it */
511
up->uart_dma.rx_buf = dma_alloc_coherent(NULL,
512
up->uart_dma.rx_buf_size,
513
(dma_addr_t *)&(up->uart_dma.rx_buf_dma_phys), 0);
516
* Finally, enable interrupts. Note: Modem status interrupts
517
* are set via set_termios(), which will be occurring imminently
518
* anyway, so we don't enable them here.
520
up->ier = UART_IER_RLSI | UART_IER_RDI;
521
serial_out(up, UART_IER, up->ier);
523
/* Enable module level wake up */
524
serial_out(up, UART_OMAP_WER, OMAP_UART_WER_MOD_WKUP);
526
up->port_activity = jiffies;
530
static void serial_omap_shutdown(struct uart_port *port)
532
struct uart_omap_port *up = (struct uart_omap_port *)port;
533
unsigned long flags = 0;
535
dev_dbg(up->port.dev, "serial_omap_shutdown+%d\n", up->pdev->id);
537
* Disable interrupts from this port
540
serial_out(up, UART_IER, 0);
542
spin_lock_irqsave(&up->port.lock, flags);
543
up->port.mctrl &= ~TIOCM_OUT2;
544
serial_omap_set_mctrl(&up->port, up->port.mctrl);
545
spin_unlock_irqrestore(&up->port.lock, flags);
548
* Disable break condition and FIFOs
550
serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
551
serial_omap_clear_fifos(up);
554
* Read data port to reset things, and then free the irq
556
if (serial_in(up, UART_LSR) & UART_LSR_DR)
557
(void) serial_in(up, UART_RX);
559
dma_free_coherent(up->port.dev,
560
UART_XMIT_SIZE, up->port.state->xmit.buf,
561
up->uart_dma.tx_buf_dma_phys);
562
up->port.state->xmit.buf = NULL;
563
serial_omap_stop_rx(port);
564
dma_free_coherent(up->port.dev,
565
up->uart_dma.rx_buf_size, up->uart_dma.rx_buf,
566
up->uart_dma.rx_buf_dma_phys);
567
up->uart_dma.rx_buf = NULL;
569
free_irq(up->port.irq, up);
573
serial_omap_configure_xonxoff
574
(struct uart_omap_port *up, struct ktermios *termios)
576
unsigned char efr = 0;
578
up->lcr = serial_in(up, UART_LCR);
579
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
580
up->efr = serial_in(up, UART_EFR);
581
serial_out(up, UART_EFR, up->efr & ~UART_EFR_ECB);
583
serial_out(up, UART_XON1, termios->c_cc[VSTART]);
584
serial_out(up, UART_XOFF1, termios->c_cc[VSTOP]);
586
/* clear SW control mode bits */
588
efr &= OMAP_UART_SW_CLR;
592
* Enable XON/XOFF flow control on output.
593
* Transmit XON1, XOFF1
595
if (termios->c_iflag & IXON)
596
efr |= OMAP_UART_SW_TX;
600
* Enable XON/XOFF flow control on input.
601
* Receiver compares XON1, XOFF1.
603
if (termios->c_iflag & IXOFF)
604
efr |= OMAP_UART_SW_RX;
606
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
607
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
609
up->mcr = serial_in(up, UART_MCR);
613
* Enable any character to restart output.
614
* Operation resumes after receiving any
615
* character after recognition of the XOFF character
617
if (termios->c_iflag & IXANY)
618
up->mcr |= UART_MCR_XONANY;
620
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
621
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
622
serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
623
/* Enable special char function UARTi.EFR_REG[5] and
624
* load the new software flow control mode IXON or IXOFF
625
* and restore the UARTi.EFR_REG[4] ENHANCED_EN value.
627
serial_out(up, UART_EFR, efr | UART_EFR_SCD);
628
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
630
serial_out(up, UART_MCR, up->mcr & ~UART_MCR_TCRTLR);
631
serial_out(up, UART_LCR, up->lcr);
635
serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
636
struct ktermios *old)
638
struct uart_omap_port *up = (struct uart_omap_port *)port;
639
unsigned char cval = 0;
640
unsigned char efr = 0;
641
unsigned long flags = 0;
642
unsigned int baud, quot;
644
switch (termios->c_cflag & CSIZE) {
646
cval = UART_LCR_WLEN5;
649
cval = UART_LCR_WLEN6;
652
cval = UART_LCR_WLEN7;
656
cval = UART_LCR_WLEN8;
660
if (termios->c_cflag & CSTOPB)
661
cval |= UART_LCR_STOP;
662
if (termios->c_cflag & PARENB)
663
cval |= UART_LCR_PARITY;
664
if (!(termios->c_cflag & PARODD))
665
cval |= UART_LCR_EPAR;
668
* Ask the core to calculate the divisor for us.
671
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
672
quot = serial_omap_get_divisor(port, baud);
674
up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
675
UART_FCR_ENABLE_FIFO;
677
up->fcr |= UART_FCR_DMA_SELECT;
680
* Ok, we're now changing the port state. Do it with
681
* interrupts disabled.
683
spin_lock_irqsave(&up->port.lock, flags);
686
* Update the per-port timeout.
688
uart_update_timeout(port, termios->c_cflag, baud);
690
up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
691
if (termios->c_iflag & INPCK)
692
up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
693
if (termios->c_iflag & (BRKINT | PARMRK))
694
up->port.read_status_mask |= UART_LSR_BI;
697
* Characters to ignore
699
up->port.ignore_status_mask = 0;
700
if (termios->c_iflag & IGNPAR)
701
up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
702
if (termios->c_iflag & IGNBRK) {
703
up->port.ignore_status_mask |= UART_LSR_BI;
705
* If we're ignoring parity and break indicators,
706
* ignore overruns too (for real raw support).
708
if (termios->c_iflag & IGNPAR)
709
up->port.ignore_status_mask |= UART_LSR_OE;
713
* ignore all characters if CREAD is not set
715
if ((termios->c_cflag & CREAD) == 0)
716
up->port.ignore_status_mask |= UART_LSR_DR;
719
* Modem status interrupts
721
up->ier &= ~UART_IER_MSI;
722
if (UART_ENABLE_MS(&up->port, termios->c_cflag))
723
up->ier |= UART_IER_MSI;
724
serial_out(up, UART_IER, up->ier);
725
serial_out(up, UART_LCR, cval); /* reset DLAB */
727
/* FIFOs and DMA Settings */
729
/* FCR can be changed only when the
730
* baud clock is not running
731
* DLL_REG and DLH_REG set to 0.
733
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
734
serial_out(up, UART_DLL, 0);
735
serial_out(up, UART_DLM, 0);
736
serial_out(up, UART_LCR, 0);
738
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
740
up->efr = serial_in(up, UART_EFR);
741
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
743
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
744
up->mcr = serial_in(up, UART_MCR);
745
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
746
/* FIFO ENABLE, DMA MODE */
747
serial_out(up, UART_FCR, up->fcr);
748
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
751
serial_out(up, UART_TI752_TLR, 0);
752
serial_out(up, UART_OMAP_SCR,
753
(UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8));
756
serial_out(up, UART_EFR, up->efr);
757
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
758
serial_out(up, UART_MCR, up->mcr);
760
/* Protocol, Baud Rate, and Interrupt Settings */
762
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_DISABLE);
763
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
765
up->efr = serial_in(up, UART_EFR);
766
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
768
serial_out(up, UART_LCR, 0);
769
serial_out(up, UART_IER, 0);
770
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
772
serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
773
serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
775
serial_out(up, UART_LCR, 0);
776
serial_out(up, UART_IER, up->ier);
777
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
779
serial_out(up, UART_EFR, up->efr);
780
serial_out(up, UART_LCR, cval);
782
if (baud > 230400 && baud != 3000000)
783
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_13X_MODE);
785
serial_out(up, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
787
/* Hardware Flow Control Configuration */
789
if (termios->c_cflag & CRTSCTS) {
790
efr |= (UART_EFR_CTS | UART_EFR_RTS);
791
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
793
up->mcr = serial_in(up, UART_MCR);
794
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
796
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
797
up->efr = serial_in(up, UART_EFR);
798
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
800
serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
801
serial_out(up, UART_EFR, efr); /* Enable AUTORTS and AUTOCTS */
802
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
803
serial_out(up, UART_MCR, up->mcr | UART_MCR_RTS);
804
serial_out(up, UART_LCR, cval);
807
serial_omap_set_mctrl(&up->port, up->port.mctrl);
808
/* Software Flow Control Configuration */
809
serial_omap_configure_xonxoff(up, termios);
811
spin_unlock_irqrestore(&up->port.lock, flags);
812
dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
816
serial_omap_pm(struct uart_port *port, unsigned int state,
817
unsigned int oldstate)
819
struct uart_omap_port *up = (struct uart_omap_port *)port;
822
dev_dbg(up->port.dev, "serial_omap_pm+%d\n", up->pdev->id);
823
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
824
efr = serial_in(up, UART_EFR);
825
serial_out(up, UART_EFR, efr | UART_EFR_ECB);
826
serial_out(up, UART_LCR, 0);
828
serial_out(up, UART_IER, (state != 0) ? UART_IERX_SLEEP : 0);
829
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
830
serial_out(up, UART_EFR, efr);
831
serial_out(up, UART_LCR, 0);
834
static void serial_omap_release_port(struct uart_port *port)
836
dev_dbg(port->dev, "serial_omap_release_port+\n");
839
static int serial_omap_request_port(struct uart_port *port)
841
dev_dbg(port->dev, "serial_omap_request_port+\n");
845
static void serial_omap_config_port(struct uart_port *port, int flags)
847
struct uart_omap_port *up = (struct uart_omap_port *)port;
849
dev_dbg(up->port.dev, "serial_omap_config_port+%d\n",
851
up->port.type = PORT_OMAP;
855
serial_omap_verify_port(struct uart_port *port, struct serial_struct *ser)
857
/* we don't want the core code to modify any port params */
858
dev_dbg(port->dev, "serial_omap_verify_port+\n");
863
serial_omap_type(struct uart_port *port)
865
struct uart_omap_port *up = (struct uart_omap_port *)port;
867
dev_dbg(up->port.dev, "serial_omap_type+%d\n", up->pdev->id);
871
#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
873
static inline void wait_for_xmitr(struct uart_omap_port *up)
875
unsigned int status, tmout = 10000;
877
/* Wait up to 10ms for the character(s) to be sent. */
879
status = serial_in(up, UART_LSR);
881
if (status & UART_LSR_BI)
882
up->lsr_break_flag = UART_LSR_BI;
887
} while ((status & BOTH_EMPTY) != BOTH_EMPTY);
889
/* Wait up to 1s for flow control if necessary */
890
if (up->port.flags & UPF_CONS_FLOW) {
892
for (tmout = 1000000; tmout; tmout--) {
893
unsigned int msr = serial_in(up, UART_MSR);
895
up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
896
if (msr & UART_MSR_CTS)
904
#ifdef CONFIG_CONSOLE_POLL
906
static void serial_omap_poll_put_char(struct uart_port *port, unsigned char ch)
908
struct uart_omap_port *up = (struct uart_omap_port *)port;
910
serial_out(up, UART_TX, ch);
913
static int serial_omap_poll_get_char(struct uart_port *port)
915
struct uart_omap_port *up = (struct uart_omap_port *)port;
916
unsigned int status = serial_in(up, UART_LSR);
918
if (!(status & UART_LSR_DR))
921
return serial_in(up, UART_RX);
924
#endif /* CONFIG_CONSOLE_POLL */
926
#ifdef CONFIG_SERIAL_OMAP_CONSOLE
928
static struct uart_omap_port *serial_omap_console_ports[4];
930
static struct uart_driver serial_omap_reg;
932
static void serial_omap_console_putchar(struct uart_port *port, int ch)
934
struct uart_omap_port *up = (struct uart_omap_port *)port;
937
serial_out(up, UART_TX, ch);
941
serial_omap_console_write(struct console *co, const char *s,
944
struct uart_omap_port *up = serial_omap_console_ports[co->index];
949
local_irq_save(flags);
952
else if (oops_in_progress)
953
locked = spin_trylock(&up->port.lock);
955
spin_lock(&up->port.lock);
958
* First save the IER then disable the interrupts
960
ier = serial_in(up, UART_IER);
961
serial_out(up, UART_IER, 0);
963
uart_console_write(&up->port, s, count, serial_omap_console_putchar);
966
* Finally, wait for transmitter to become empty
967
* and restore the IER
970
serial_out(up, UART_IER, ier);
972
* The receive handling will happen properly because the
973
* receive ready bit will still be set; it is not cleared
974
* on read. However, modem control will not, we must
975
* call it if we have saved something in the saved flags
976
* while processing with interrupts off.
978
if (up->msr_saved_flags)
979
check_modem_status(up);
982
spin_unlock(&up->port.lock);
983
local_irq_restore(flags);
987
serial_omap_console_setup(struct console *co, char *options)
989
struct uart_omap_port *up;
995
if (serial_omap_console_ports[co->index] == NULL)
997
up = serial_omap_console_ports[co->index];
1000
uart_parse_options(options, &baud, &parity, &bits, &flow);
1002
return uart_set_options(&up->port, co, baud, parity, bits, flow);
1005
static struct console serial_omap_console = {
1006
.name = OMAP_SERIAL_NAME,
1007
.write = serial_omap_console_write,
1008
.device = uart_console_device,
1009
.setup = serial_omap_console_setup,
1010
.flags = CON_PRINTBUFFER,
1012
.data = &serial_omap_reg,
1015
static void serial_omap_add_console_port(struct uart_omap_port *up)
1017
serial_omap_console_ports[up->pdev->id] = up;
1020
#define OMAP_CONSOLE (&serial_omap_console)
1024
#define OMAP_CONSOLE NULL
1026
static inline void serial_omap_add_console_port(struct uart_omap_port *up)
1031
static struct uart_ops serial_omap_pops = {
1032
.tx_empty = serial_omap_tx_empty,
1033
.set_mctrl = serial_omap_set_mctrl,
1034
.get_mctrl = serial_omap_get_mctrl,
1035
.stop_tx = serial_omap_stop_tx,
1036
.start_tx = serial_omap_start_tx,
1037
.stop_rx = serial_omap_stop_rx,
1038
.enable_ms = serial_omap_enable_ms,
1039
.break_ctl = serial_omap_break_ctl,
1040
.startup = serial_omap_startup,
1041
.shutdown = serial_omap_shutdown,
1042
.set_termios = serial_omap_set_termios,
1043
.pm = serial_omap_pm,
1044
.type = serial_omap_type,
1045
.release_port = serial_omap_release_port,
1046
.request_port = serial_omap_request_port,
1047
.config_port = serial_omap_config_port,
1048
.verify_port = serial_omap_verify_port,
1049
#ifdef CONFIG_CONSOLE_POLL
1050
.poll_put_char = serial_omap_poll_put_char,
1051
.poll_get_char = serial_omap_poll_get_char,
1055
static struct uart_driver serial_omap_reg = {
1056
.owner = THIS_MODULE,
1057
.driver_name = "OMAP-SERIAL",
1058
.dev_name = OMAP_SERIAL_NAME,
1059
.nr = OMAP_MAX_HSUART_PORTS,
1060
.cons = OMAP_CONSOLE,
1064
serial_omap_suspend(struct platform_device *pdev, pm_message_t state)
1066
struct uart_omap_port *up = platform_get_drvdata(pdev);
1069
uart_suspend_port(&serial_omap_reg, &up->port);
1073
static int serial_omap_resume(struct platform_device *dev)
1075
struct uart_omap_port *up = platform_get_drvdata(dev);
1078
uart_resume_port(&serial_omap_reg, &up->port);
1082
static void serial_omap_rx_timeout(unsigned long uart_no)
1084
struct uart_omap_port *up = ui[uart_no];
1085
unsigned int curr_dma_pos, curr_transmitted_size;
1088
curr_dma_pos = omap_get_dma_dst_pos(up->uart_dma.rx_dma_channel);
1089
if ((curr_dma_pos == up->uart_dma.prev_rx_dma_pos) ||
1090
(curr_dma_pos == 0)) {
1091
if (jiffies_to_msecs(jiffies - up->port_activity) <
1093
mod_timer(&up->uart_dma.rx_timer, jiffies +
1094
usecs_to_jiffies(up->uart_dma.rx_timeout));
1096
serial_omap_stop_rxdma(up);
1097
up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1098
serial_out(up, UART_IER, up->ier);
1103
curr_transmitted_size = curr_dma_pos -
1104
up->uart_dma.prev_rx_dma_pos;
1105
up->port.icount.rx += curr_transmitted_size;
1106
tty_insert_flip_string(up->port.state->port.tty,
1107
up->uart_dma.rx_buf +
1108
(up->uart_dma.prev_rx_dma_pos -
1109
up->uart_dma.rx_buf_dma_phys),
1110
curr_transmitted_size);
1111
tty_flip_buffer_push(up->port.state->port.tty);
1112
up->uart_dma.prev_rx_dma_pos = curr_dma_pos;
1113
if (up->uart_dma.rx_buf_size +
1114
up->uart_dma.rx_buf_dma_phys == curr_dma_pos) {
1115
ret = serial_omap_start_rxdma(up);
1117
serial_omap_stop_rxdma(up);
1118
up->ier |= (UART_IER_RDI | UART_IER_RLSI);
1119
serial_out(up, UART_IER, up->ier);
1122
mod_timer(&up->uart_dma.rx_timer, jiffies +
1123
usecs_to_jiffies(up->uart_dma.rx_timeout));
1125
up->port_activity = jiffies;
1128
static void uart_rx_dma_callback(int lch, u16 ch_status, void *data)
1133
static int serial_omap_start_rxdma(struct uart_omap_port *up)
1137
if (up->uart_dma.rx_dma_channel == -1) {
1138
ret = omap_request_dma(up->uart_dma.uart_dma_rx,
1140
(void *)uart_rx_dma_callback, up,
1141
&(up->uart_dma.rx_dma_channel));
1145
omap_set_dma_src_params(up->uart_dma.rx_dma_channel, 0,
1146
OMAP_DMA_AMODE_CONSTANT,
1147
up->uart_dma.uart_base, 0, 0);
1148
omap_set_dma_dest_params(up->uart_dma.rx_dma_channel, 0,
1149
OMAP_DMA_AMODE_POST_INC,
1150
up->uart_dma.rx_buf_dma_phys, 0, 0);
1151
omap_set_dma_transfer_params(up->uart_dma.rx_dma_channel,
1152
OMAP_DMA_DATA_TYPE_S8,
1153
up->uart_dma.rx_buf_size, 1,
1154
OMAP_DMA_SYNC_ELEMENT,
1155
up->uart_dma.uart_dma_rx, 0);
1157
up->uart_dma.prev_rx_dma_pos = up->uart_dma.rx_buf_dma_phys;
1158
/* FIXME: Cache maintenance needed here? */
1159
omap_start_dma(up->uart_dma.rx_dma_channel);
1160
mod_timer(&up->uart_dma.rx_timer, jiffies +
1161
usecs_to_jiffies(up->uart_dma.rx_timeout));
1162
up->uart_dma.rx_dma_used = true;
1166
static void serial_omap_continue_tx(struct uart_omap_port *up)
1168
struct circ_buf *xmit = &up->port.state->xmit;
1169
unsigned int start = up->uart_dma.tx_buf_dma_phys
1170
+ (xmit->tail & (UART_XMIT_SIZE - 1));
1172
if (uart_circ_empty(xmit))
1175
up->uart_dma.tx_buf_size = uart_circ_chars_pending(xmit);
1177
* It is a circular buffer. See if the buffer has wounded back.
1178
* If yes it will have to be transferred in two separate dma
1181
if (start + up->uart_dma.tx_buf_size >=
1182
up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE)
1183
up->uart_dma.tx_buf_size =
1184
(up->uart_dma.tx_buf_dma_phys + UART_XMIT_SIZE) - start;
1185
omap_set_dma_dest_params(up->uart_dma.tx_dma_channel, 0,
1186
OMAP_DMA_AMODE_CONSTANT,
1187
up->uart_dma.uart_base, 0, 0);
1188
omap_set_dma_src_params(up->uart_dma.tx_dma_channel, 0,
1189
OMAP_DMA_AMODE_POST_INC, start, 0, 0);
1190
omap_set_dma_transfer_params(up->uart_dma.tx_dma_channel,
1191
OMAP_DMA_DATA_TYPE_S8,
1192
up->uart_dma.tx_buf_size, 1,
1193
OMAP_DMA_SYNC_ELEMENT,
1194
up->uart_dma.uart_dma_tx, 0);
1195
/* FIXME: Cache maintenance needed here? */
1196
omap_start_dma(up->uart_dma.tx_dma_channel);
1199
static void uart_tx_dma_callback(int lch, u16 ch_status, void *data)
1201
struct uart_omap_port *up = (struct uart_omap_port *)data;
1202
struct circ_buf *xmit = &up->port.state->xmit;
1204
xmit->tail = (xmit->tail + up->uart_dma.tx_buf_size) & \
1205
(UART_XMIT_SIZE - 1);
1206
up->port.icount.tx += up->uart_dma.tx_buf_size;
1208
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1209
uart_write_wakeup(&up->port);
1211
if (uart_circ_empty(xmit)) {
1212
spin_lock(&(up->uart_dma.tx_lock));
1213
serial_omap_stop_tx(&up->port);
1214
up->uart_dma.tx_dma_used = false;
1215
spin_unlock(&(up->uart_dma.tx_lock));
1217
omap_stop_dma(up->uart_dma.tx_dma_channel);
1218
serial_omap_continue_tx(up);
1220
up->port_activity = jiffies;
1224
static int serial_omap_probe(struct platform_device *pdev)
1226
struct uart_omap_port *up;
1227
struct resource *mem, *irq, *dma_tx, *dma_rx;
1228
struct omap_uart_port_info *omap_up_info = pdev->dev.platform_data;
1231
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1233
dev_err(&pdev->dev, "no mem resource?\n");
1237
irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1239
dev_err(&pdev->dev, "no irq resource?\n");
1243
if (!request_mem_region(mem->start, resource_size(mem),
1244
pdev->dev.driver->name)) {
1245
dev_err(&pdev->dev, "memory region already claimed\n");
1249
dma_rx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx");
1255
dma_tx = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx");
1261
up = kzalloc(sizeof(*up), GFP_KERNEL);
1264
goto do_release_region;
1266
sprintf(up->name, "OMAP UART%d", pdev->id);
1268
up->port.dev = &pdev->dev;
1269
up->port.type = PORT_OMAP;
1270
up->port.iotype = UPIO_MEM;
1271
up->port.irq = irq->start;
1273
up->port.regshift = 2;
1274
up->port.fifosize = 64;
1275
up->port.ops = &serial_omap_pops;
1276
up->port.line = pdev->id;
1278
up->port.membase = omap_up_info->membase;
1279
up->port.mapbase = omap_up_info->mapbase;
1280
up->port.flags = omap_up_info->flags;
1281
up->port.irqflags = omap_up_info->irqflags;
1282
up->port.uartclk = omap_up_info->uartclk;
1283
up->uart_dma.uart_base = mem->start;
1285
if (omap_up_info->dma_enabled) {
1286
up->uart_dma.uart_dma_tx = dma_tx->start;
1287
up->uart_dma.uart_dma_rx = dma_rx->start;
1289
up->uart_dma.rx_buf_size = 4096;
1290
up->uart_dma.rx_timeout = 2;
1291
spin_lock_init(&(up->uart_dma.tx_lock));
1292
spin_lock_init(&(up->uart_dma.rx_lock));
1293
up->uart_dma.tx_dma_channel = OMAP_UART_DMA_CH_FREE;
1294
up->uart_dma.rx_dma_channel = OMAP_UART_DMA_CH_FREE;
1298
serial_omap_add_console_port(up);
1300
ret = uart_add_one_port(&serial_omap_reg, &up->port);
1302
goto do_release_region;
1304
platform_set_drvdata(pdev, up);
1307
dev_err(&pdev->dev, "[UART%d]: failure [%s]: %d\n",
1308
pdev->id, __func__, ret);
1310
release_mem_region(mem->start, resource_size(mem));
1314
static int serial_omap_remove(struct platform_device *dev)
1316
struct uart_omap_port *up = platform_get_drvdata(dev);
1318
platform_set_drvdata(dev, NULL);
1320
uart_remove_one_port(&serial_omap_reg, &up->port);
1326
static struct platform_driver serial_omap_driver = {
1327
.probe = serial_omap_probe,
1328
.remove = serial_omap_remove,
1330
.suspend = serial_omap_suspend,
1331
.resume = serial_omap_resume,
1333
.name = DRIVER_NAME,
1337
static int __init serial_omap_init(void)
1341
ret = uart_register_driver(&serial_omap_reg);
1344
ret = platform_driver_register(&serial_omap_driver);
1346
uart_unregister_driver(&serial_omap_reg);
1350
static void __exit serial_omap_exit(void)
1352
platform_driver_unregister(&serial_omap_driver);
1353
uart_unregister_driver(&serial_omap_reg);
1356
module_init(serial_omap_init);
1357
module_exit(serial_omap_exit);
1359
MODULE_DESCRIPTION("OMAP High Speed UART driver");
1360
MODULE_LICENSE("GPL");
1361
MODULE_AUTHOR("Texas Instruments Inc");