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Viewing changes to include/linux/mfd/wm8350/core.h

  • Committer: Package Import Robot
  • Author(s): Alessio Igor Bogani
  • Date: 2011-10-26 11:13:05 UTC
  • Revision ID: package-import@ubuntu.com-20111026111305-tz023xykf0i6eosh
Tags: upstream-3.2.0
Import upstream version 3.2.0

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include/linux/mfd/wm8350/core.h
 
1
/*
 
2
 * core.h  --  Core Driver for Wolfson WM8350 PMIC
 
3
 *
 
4
 * Copyright 2007 Wolfson Microelectronics PLC
 
5
 *
 
6
 *  This program is free software; you can redistribute  it and/or modify it
 
7
 *  under  the terms of  the GNU General  Public License as published by the
 
8
 *  Free Software Foundation;  either version 2 of the  License, or (at your
 
9
 *  option) any later version.
 
10
 *
 
11
 */
 
12
 
 
13
#ifndef __LINUX_MFD_WM8350_CORE_H_
 
14
#define __LINUX_MFD_WM8350_CORE_H_
 
15
 
 
16
#include <linux/kernel.h>
 
17
#include <linux/mutex.h>
 
18
#include <linux/interrupt.h>
 
19
#include <linux/completion.h>
 
20
 
 
21
#include <linux/mfd/wm8350/audio.h>
 
22
#include <linux/mfd/wm8350/gpio.h>
 
23
#include <linux/mfd/wm8350/pmic.h>
 
24
#include <linux/mfd/wm8350/rtc.h>
 
25
#include <linux/mfd/wm8350/supply.h>
 
26
#include <linux/mfd/wm8350/wdt.h>
 
27
 
 
28
/*
 
29
 * Register values.
 
30
 */
 
31
#define WM8350_RESET_ID                         0x00
 
32
#define WM8350_ID                               0x01
 
33
#define WM8350_REVISION                         0x02
 
34
#define WM8350_SYSTEM_CONTROL_1                 0x03
 
35
#define WM8350_SYSTEM_CONTROL_2                 0x04
 
36
#define WM8350_SYSTEM_HIBERNATE                 0x05
 
37
#define WM8350_INTERFACE_CONTROL                0x06
 
38
#define WM8350_POWER_MGMT_1                     0x08
 
39
#define WM8350_POWER_MGMT_2                     0x09
 
40
#define WM8350_POWER_MGMT_3                     0x0A
 
41
#define WM8350_POWER_MGMT_4                     0x0B
 
42
#define WM8350_POWER_MGMT_5                     0x0C
 
43
#define WM8350_POWER_MGMT_6                     0x0D
 
44
#define WM8350_POWER_MGMT_7                     0x0E
 
45
 
 
46
#define WM8350_SYSTEM_INTERRUPTS                0x18
 
47
#define WM8350_INT_STATUS_1                     0x19
 
48
#define WM8350_INT_STATUS_2                     0x1A
 
49
#define WM8350_POWER_UP_INT_STATUS              0x1B
 
50
#define WM8350_UNDER_VOLTAGE_INT_STATUS         0x1C
 
51
#define WM8350_OVER_CURRENT_INT_STATUS          0x1D
 
52
#define WM8350_GPIO_INT_STATUS                  0x1E
 
53
#define WM8350_COMPARATOR_INT_STATUS            0x1F
 
54
#define WM8350_SYSTEM_INTERRUPTS_MASK           0x20
 
55
#define WM8350_INT_STATUS_1_MASK                0x21
 
56
#define WM8350_INT_STATUS_2_MASK                0x22
 
57
#define WM8350_POWER_UP_INT_STATUS_MASK         0x23
 
58
#define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK    0x24
 
59
#define WM8350_OVER_CURRENT_INT_STATUS_MASK     0x25
 
60
#define WM8350_GPIO_INT_STATUS_MASK             0x26
 
61
#define WM8350_COMPARATOR_INT_STATUS_MASK       0x27
 
62
#define WM8350_CHARGER_OVERRIDES                0xE2
 
63
#define WM8350_MISC_OVERRIDES                   0xE3
 
64
#define WM8350_COMPARATOR_OVERRIDES             0xE7
 
65
#define WM8350_STATE_MACHINE_STATUS             0xE9
 
66
 
 
67
#define WM8350_MAX_REGISTER                     0xFF
 
68
 
 
69
/*
 
70
 * Field Definitions.
 
71
 */
 
72
 
 
73
/*
 
74
 * R0 (0x00) - Reset/ID
 
75
 */
 
76
#define WM8350_SW_RESET_CHIP_ID_MASK            0xFFFF
 
77
 
 
78
/*
 
79
 * R1 (0x01) - ID
 
80
 */
 
81
#define WM8350_CHIP_REV_MASK                    0x7000
 
82
#define WM8350_CONF_STS_MASK                    0x0C00
 
83
#define WM8350_CUST_ID_MASK                     0x00FF
 
84
 
 
85
/*
 
86
 * R2 (0x02) - Revision
 
87
 */
 
88
#define WM8350_MASK_REV_MASK                    0x00FF
 
89
 
 
90
/*
 
91
 * R3 (0x03) - System Control 1
 
92
 */
 
93
#define WM8350_CHIP_ON                          0x8000
 
94
#define WM8350_POWERCYCLE                       0x2000
 
95
#define WM8350_VCC_FAULT_OV                     0x1000
 
96
#define WM8350_REG_RSTB_TIME_MASK               0x0C00
 
97
#define WM8350_BG_SLEEP                         0x0200
 
98
#define WM8350_MEM_VALID                        0x0020
 
99
#define WM8350_CHIP_SET_UP                      0x0010
 
100
#define WM8350_ON_DEB_T                         0x0008
 
101
#define WM8350_ON_POL                           0x0002
 
102
#define WM8350_IRQ_POL                          0x0001
 
103
 
 
104
/*
 
105
 * R4 (0x04) - System Control 2
 
106
 */
 
107
#define WM8350_USB_SUSPEND_8MA                  0x8000
 
108
#define WM8350_USB_SUSPEND                      0x4000
 
109
#define WM8350_USB_MSTR                         0x2000
 
110
#define WM8350_USB_MSTR_SRC                     0x1000
 
111
#define WM8350_USB_500MA                        0x0800
 
112
#define WM8350_USB_NOLIM                        0x0400
 
113
 
 
114
/*
 
115
 * R5 (0x05) - System Hibernate
 
116
 */
 
117
#define WM8350_HIBERNATE                        0x8000
 
118
#define WM8350_WDOG_HIB_MODE                    0x0080
 
119
#define WM8350_REG_HIB_STARTUP_SEQ              0x0040
 
120
#define WM8350_REG_RESET_HIB_MODE               0x0020
 
121
#define WM8350_RST_HIB_MODE                     0x0010
 
122
#define WM8350_IRQ_HIB_MODE                     0x0008
 
123
#define WM8350_MEMRST_HIB_MODE                  0x0004
 
124
#define WM8350_PCCOMP_HIB_MODE                  0x0002
 
125
#define WM8350_TEMPMON_HIB_MODE                 0x0001
 
126
 
 
127
/*
 
128
 * R6 (0x06) - Interface Control
 
129
 */
 
130
#define WM8350_USE_DEV_PINS                     0x8000
 
131
#define WM8350_USE_DEV_PINS_MASK                0x8000
 
132
#define WM8350_USE_DEV_PINS_SHIFT                   15
 
133
#define WM8350_DEV_ADDR_MASK                    0x6000
 
134
#define WM8350_DEV_ADDR_SHIFT                       13
 
135
#define WM8350_CONFIG_DONE                      0x1000
 
136
#define WM8350_CONFIG_DONE_MASK                 0x1000
 
137
#define WM8350_CONFIG_DONE_SHIFT                    12
 
138
#define WM8350_RECONFIG_AT_ON                   0x0800
 
139
#define WM8350_RECONFIG_AT_ON_MASK              0x0800
 
140
#define WM8350_RECONFIG_AT_ON_SHIFT                 11
 
141
#define WM8350_AUTOINC                          0x0200
 
142
#define WM8350_AUTOINC_MASK                     0x0200
 
143
#define WM8350_AUTOINC_SHIFT                         9
 
144
#define WM8350_ARA                              0x0100
 
145
#define WM8350_ARA_MASK                         0x0100
 
146
#define WM8350_ARA_SHIFT                             8
 
147
#define WM8350_SPI_CFG                          0x0008
 
148
#define WM8350_SPI_CFG_MASK                     0x0008
 
149
#define WM8350_SPI_CFG_SHIFT                         3
 
150
#define WM8350_SPI_4WIRE                        0x0004
 
151
#define WM8350_SPI_4WIRE_MASK                   0x0004
 
152
#define WM8350_SPI_4WIRE_SHIFT                       2
 
153
#define WM8350_SPI_3WIRE                        0x0002
 
154
#define WM8350_SPI_3WIRE_MASK                   0x0002
 
155
#define WM8350_SPI_3WIRE_SHIFT                       1
 
156
 
 
157
/* Bit values for R06 (0x06) */
 
158
#define WM8350_USE_DEV_PINS_PRIMARY                  0
 
159
#define WM8350_USE_DEV_PINS_DEV                      1
 
160
 
 
161
#define WM8350_DEV_ADDR_34                           0
 
162
#define WM8350_DEV_ADDR_36                           1
 
163
#define WM8350_DEV_ADDR_3C                           2
 
164
#define WM8350_DEV_ADDR_3E                           3
 
165
 
 
166
#define WM8350_CONFIG_DONE_OFF                       0
 
167
#define WM8350_CONFIG_DONE_DONE                      1
 
168
 
 
169
#define WM8350_RECONFIG_AT_ON_OFF                    0
 
170
#define WM8350_RECONFIG_AT_ON_ON                     1
 
171
 
 
172
#define WM8350_AUTOINC_OFF                           0
 
173
#define WM8350_AUTOINC_ON                            1
 
174
 
 
175
#define WM8350_ARA_OFF                               0
 
176
#define WM8350_ARA_ON                                1
 
177
 
 
178
#define WM8350_SPI_CFG_CMOS                          0
 
179
#define WM8350_SPI_CFG_OD                            1
 
180
 
 
181
#define WM8350_SPI_4WIRE_3WIRE                       0
 
182
#define WM8350_SPI_4WIRE_4WIRE                       1
 
183
 
 
184
#define WM8350_SPI_3WIRE_I2C                         0
 
185
#define WM8350_SPI_3WIRE_SPI                         1
 
186
 
 
187
/*
 
188
 * R8 (0x08) - Power mgmt (1)
 
189
 */
 
190
#define WM8350_CODEC_ISEL_MASK                  0xC000
 
191
#define WM8350_VBUFEN                           0x2000
 
192
#define WM8350_OUTPUT_DRAIN_EN                  0x0400
 
193
#define WM8350_MIC_DET_ENA                      0x0100
 
194
#define WM8350_BIASEN                           0x0020
 
195
#define WM8350_MICBEN                           0x0010
 
196
#define WM8350_VMIDEN                           0x0004
 
197
#define WM8350_VMID_MASK                        0x0003
 
198
#define WM8350_VMID_SHIFT                            0
 
199
 
 
200
/*
 
201
 * R9 (0x09) - Power mgmt (2)
 
202
 */
 
203
#define WM8350_IN3R_ENA                         0x0800
 
204
#define WM8350_IN3L_ENA                         0x0400
 
205
#define WM8350_INR_ENA                          0x0200
 
206
#define WM8350_INL_ENA                          0x0100
 
207
#define WM8350_MIXINR_ENA                       0x0080
 
208
#define WM8350_MIXINL_ENA                       0x0040
 
209
#define WM8350_OUT4_ENA                         0x0020
 
210
#define WM8350_OUT3_ENA                         0x0010
 
211
#define WM8350_MIXOUTR_ENA                      0x0002
 
212
#define WM8350_MIXOUTL_ENA                      0x0001
 
213
 
 
214
/*
 
215
 * R10 (0x0A) - Power mgmt (3)
 
216
 */
 
217
#define WM8350_IN3R_TO_OUT2R                    0x0080
 
218
#define WM8350_OUT2R_ENA                        0x0008
 
219
#define WM8350_OUT2L_ENA                        0x0004
 
220
#define WM8350_OUT1R_ENA                        0x0002
 
221
#define WM8350_OUT1L_ENA                        0x0001
 
222
 
 
223
/*
 
224
 * R11 (0x0B) - Power mgmt (4)
 
225
 */
 
226
#define WM8350_SYSCLK_ENA                       0x4000
 
227
#define WM8350_ADC_HPF_ENA                      0x2000
 
228
#define WM8350_FLL_ENA                          0x0800
 
229
#define WM8350_FLL_OSC_ENA                      0x0400
 
230
#define WM8350_TOCLK_ENA                        0x0100
 
231
#define WM8350_DACR_ENA                         0x0020
 
232
#define WM8350_DACL_ENA                         0x0010
 
233
#define WM8350_ADCR_ENA                         0x0008
 
234
#define WM8350_ADCL_ENA                         0x0004
 
235
 
 
236
/*
 
237
 * R12 (0x0C) - Power mgmt (5)
 
238
 */
 
239
#define WM8350_CODEC_ENA                        0x1000
 
240
#define WM8350_RTC_TICK_ENA                     0x0800
 
241
#define WM8350_OSC32K_ENA                       0x0400
 
242
#define WM8350_CHG_ENA                          0x0200
 
243
#define WM8350_ACC_DET_ENA                      0x0100
 
244
#define WM8350_AUXADC_ENA                       0x0080
 
245
#define WM8350_DCMP4_ENA                        0x0008
 
246
#define WM8350_DCMP3_ENA                        0x0004
 
247
#define WM8350_DCMP2_ENA                        0x0002
 
248
#define WM8350_DCMP1_ENA                        0x0001
 
249
 
 
250
/*
 
251
 * R13 (0x0D) - Power mgmt (6)
 
252
 */
 
253
#define WM8350_LS_ENA                           0x8000
 
254
#define WM8350_LDO4_ENA                         0x0800
 
255
#define WM8350_LDO3_ENA                         0x0400
 
256
#define WM8350_LDO2_ENA                         0x0200
 
257
#define WM8350_LDO1_ENA                         0x0100
 
258
#define WM8350_DC6_ENA                          0x0020
 
259
#define WM8350_DC5_ENA                          0x0010
 
260
#define WM8350_DC4_ENA                          0x0008
 
261
#define WM8350_DC3_ENA                          0x0004
 
262
#define WM8350_DC2_ENA                          0x0002
 
263
#define WM8350_DC1_ENA                          0x0001
 
264
 
 
265
/*
 
266
 * R14 (0x0E) - Power mgmt (7)
 
267
 */
 
268
#define WM8350_CS2_ENA                          0x0002
 
269
#define WM8350_CS1_ENA                          0x0001
 
270
 
 
271
/*
 
272
 * R24 (0x18) - System Interrupts
 
273
 */
 
274
#define WM8350_OC_INT                           0x2000
 
275
#define WM8350_UV_INT                           0x1000
 
276
#define WM8350_PUTO_INT                         0x0800
 
277
#define WM8350_CS_INT                           0x0200
 
278
#define WM8350_EXT_INT                          0x0100
 
279
#define WM8350_CODEC_INT                        0x0080
 
280
#define WM8350_GP_INT                           0x0040
 
281
#define WM8350_AUXADC_INT                       0x0020
 
282
#define WM8350_RTC_INT                          0x0010
 
283
#define WM8350_SYS_INT                          0x0008
 
284
#define WM8350_CHG_INT                          0x0004
 
285
#define WM8350_USB_INT                          0x0002
 
286
#define WM8350_WKUP_INT                         0x0001
 
287
 
 
288
/*
 
289
 * R25 (0x19) - Interrupt Status 1
 
290
 */
 
291
#define WM8350_CHG_BAT_HOT_EINT                 0x8000
 
292
#define WM8350_CHG_BAT_COLD_EINT                0x4000
 
293
#define WM8350_CHG_BAT_FAIL_EINT                0x2000
 
294
#define WM8350_CHG_TO_EINT                      0x1000
 
295
#define WM8350_CHG_END_EINT                     0x0800
 
296
#define WM8350_CHG_START_EINT                   0x0400
 
297
#define WM8350_CHG_FAST_RDY_EINT                0x0200
 
298
#define WM8350_RTC_PER_EINT                     0x0080
 
299
#define WM8350_RTC_SEC_EINT                     0x0040
 
300
#define WM8350_RTC_ALM_EINT                     0x0020
 
301
#define WM8350_CHG_VBATT_LT_3P9_EINT            0x0004
 
302
#define WM8350_CHG_VBATT_LT_3P1_EINT            0x0002
 
303
#define WM8350_CHG_VBATT_LT_2P85_EINT           0x0001
 
304
 
 
305
/*
 
306
 * R26 (0x1A) - Interrupt Status 2
 
307
 */
 
308
#define WM8350_CS1_EINT                         0x2000
 
309
#define WM8350_CS2_EINT                         0x1000
 
310
#define WM8350_USB_LIMIT_EINT                   0x0400
 
311
#define WM8350_AUXADC_DATARDY_EINT              0x0100
 
312
#define WM8350_AUXADC_DCOMP4_EINT               0x0080
 
313
#define WM8350_AUXADC_DCOMP3_EINT               0x0040
 
314
#define WM8350_AUXADC_DCOMP2_EINT               0x0020
 
315
#define WM8350_AUXADC_DCOMP1_EINT               0x0010
 
316
#define WM8350_SYS_HYST_COMP_FAIL_EINT          0x0008
 
317
#define WM8350_SYS_CHIP_GT115_EINT              0x0004
 
318
#define WM8350_SYS_CHIP_GT140_EINT              0x0002
 
319
#define WM8350_SYS_WDOG_TO_EINT                 0x0001
 
320
 
 
321
/*
 
322
 * R27 (0x1B) - Power Up Interrupt Status
 
323
 */
 
324
#define WM8350_PUTO_LDO4_EINT                   0x0800
 
325
#define WM8350_PUTO_LDO3_EINT                   0x0400
 
326
#define WM8350_PUTO_LDO2_EINT                   0x0200
 
327
#define WM8350_PUTO_LDO1_EINT                   0x0100
 
328
#define WM8350_PUTO_DC6_EINT                    0x0020
 
329
#define WM8350_PUTO_DC5_EINT                    0x0010
 
330
#define WM8350_PUTO_DC4_EINT                    0x0008
 
331
#define WM8350_PUTO_DC3_EINT                    0x0004
 
332
#define WM8350_PUTO_DC2_EINT                    0x0002
 
333
#define WM8350_PUTO_DC1_EINT                    0x0001
 
334
 
 
335
/*
 
336
 * R28 (0x1C) - Under Voltage Interrupt status
 
337
 */
 
338
#define WM8350_UV_LDO4_EINT                     0x0800
 
339
#define WM8350_UV_LDO3_EINT                     0x0400
 
340
#define WM8350_UV_LDO2_EINT                     0x0200
 
341
#define WM8350_UV_LDO1_EINT                     0x0100
 
342
#define WM8350_UV_DC6_EINT                      0x0020
 
343
#define WM8350_UV_DC5_EINT                      0x0010
 
344
#define WM8350_UV_DC4_EINT                      0x0008
 
345
#define WM8350_UV_DC3_EINT                      0x0004
 
346
#define WM8350_UV_DC2_EINT                      0x0002
 
347
#define WM8350_UV_DC1_EINT                      0x0001
 
348
 
 
349
/*
 
350
 * R29 (0x1D) - Over Current Interrupt status
 
351
 */
 
352
#define WM8350_OC_LS_EINT                       0x8000
 
353
 
 
354
/*
 
355
 * R30 (0x1E) - GPIO Interrupt Status
 
356
 */
 
357
#define WM8350_GP12_EINT                        0x1000
 
358
#define WM8350_GP11_EINT                        0x0800
 
359
#define WM8350_GP10_EINT                        0x0400
 
360
#define WM8350_GP9_EINT                         0x0200
 
361
#define WM8350_GP8_EINT                         0x0100
 
362
#define WM8350_GP7_EINT                         0x0080
 
363
#define WM8350_GP6_EINT                         0x0040
 
364
#define WM8350_GP5_EINT                         0x0020
 
365
#define WM8350_GP4_EINT                         0x0010
 
366
#define WM8350_GP3_EINT                         0x0008
 
367
#define WM8350_GP2_EINT                         0x0004
 
368
#define WM8350_GP1_EINT                         0x0002
 
369
#define WM8350_GP0_EINT                         0x0001
 
370
 
 
371
/*
 
372
 * R31 (0x1F) - Comparator Interrupt Status
 
373
 */
 
374
#define WM8350_EXT_USB_FB_EINT                  0x8000
 
375
#define WM8350_EXT_WALL_FB_EINT                 0x4000
 
376
#define WM8350_EXT_BAT_FB_EINT                  0x2000
 
377
#define WM8350_CODEC_JCK_DET_L_EINT             0x0800
 
378
#define WM8350_CODEC_JCK_DET_R_EINT             0x0400
 
379
#define WM8350_CODEC_MICSCD_EINT                0x0200
 
380
#define WM8350_CODEC_MICD_EINT                  0x0100
 
381
#define WM8350_WKUP_OFF_STATE_EINT              0x0040
 
382
#define WM8350_WKUP_HIB_STATE_EINT              0x0020
 
383
#define WM8350_WKUP_CONV_FAULT_EINT             0x0010
 
384
#define WM8350_WKUP_WDOG_RST_EINT               0x0008
 
385
#define WM8350_WKUP_GP_PWR_ON_EINT              0x0004
 
386
#define WM8350_WKUP_ONKEY_EINT                  0x0002
 
387
#define WM8350_WKUP_GP_WAKEUP_EINT              0x0001
 
388
 
 
389
/*
 
390
 * R32 (0x20) - System Interrupts Mask
 
391
 */
 
392
#define WM8350_IM_OC_INT                        0x2000
 
393
#define WM8350_IM_UV_INT                        0x1000
 
394
#define WM8350_IM_PUTO_INT                      0x0800
 
395
#define WM8350_IM_SPARE_INT                     0x0400
 
396
#define WM8350_IM_CS_INT                        0x0200
 
397
#define WM8350_IM_EXT_INT                       0x0100
 
398
#define WM8350_IM_CODEC_INT                     0x0080
 
399
#define WM8350_IM_GP_INT                        0x0040
 
400
#define WM8350_IM_AUXADC_INT                    0x0020
 
401
#define WM8350_IM_RTC_INT                       0x0010
 
402
#define WM8350_IM_SYS_INT                       0x0008
 
403
#define WM8350_IM_CHG_INT                       0x0004
 
404
#define WM8350_IM_USB_INT                       0x0002
 
405
#define WM8350_IM_WKUP_INT                      0x0001
 
406
 
 
407
/*
 
408
 * R33 (0x21) - Interrupt Status 1 Mask
 
409
 */
 
410
#define WM8350_IM_CHG_BAT_HOT_EINT              0x8000
 
411
#define WM8350_IM_CHG_BAT_COLD_EINT             0x4000
 
412
#define WM8350_IM_CHG_BAT_FAIL_EINT             0x2000
 
413
#define WM8350_IM_CHG_TO_EINT                   0x1000
 
414
#define WM8350_IM_CHG_END_EINT                  0x0800
 
415
#define WM8350_IM_CHG_START_EINT                0x0400
 
416
#define WM8350_IM_CHG_FAST_RDY_EINT             0x0200
 
417
#define WM8350_IM_RTC_PER_EINT                  0x0080
 
418
#define WM8350_IM_RTC_SEC_EINT                  0x0040
 
419
#define WM8350_IM_RTC_ALM_EINT                  0x0020
 
420
#define WM8350_IM_CHG_VBATT_LT_3P9_EINT         0x0004
 
421
#define WM8350_IM_CHG_VBATT_LT_3P1_EINT         0x0002
 
422
#define WM8350_IM_CHG_VBATT_LT_2P85_EINT        0x0001
 
423
 
 
424
/*
 
425
 * R34 (0x22) - Interrupt Status 2 Mask
 
426
 */
 
427
#define WM8350_IM_SPARE2_EINT                   0x8000
 
428
#define WM8350_IM_SPARE1_EINT                   0x4000
 
429
#define WM8350_IM_CS1_EINT                      0x2000
 
430
#define WM8350_IM_CS2_EINT                      0x1000
 
431
#define WM8350_IM_USB_LIMIT_EINT                0x0400
 
432
#define WM8350_IM_AUXADC_DATARDY_EINT           0x0100
 
433
#define WM8350_IM_AUXADC_DCOMP4_EINT            0x0080
 
434
#define WM8350_IM_AUXADC_DCOMP3_EINT            0x0040
 
435
#define WM8350_IM_AUXADC_DCOMP2_EINT            0x0020
 
436
#define WM8350_IM_AUXADC_DCOMP1_EINT            0x0010
 
437
#define WM8350_IM_SYS_HYST_COMP_FAIL_EINT       0x0008
 
438
#define WM8350_IM_SYS_CHIP_GT115_EINT           0x0004
 
439
#define WM8350_IM_SYS_CHIP_GT140_EINT           0x0002
 
440
#define WM8350_IM_SYS_WDOG_TO_EINT              0x0001
 
441
 
 
442
/*
 
443
 * R35 (0x23) - Power Up Interrupt Status Mask
 
444
 */
 
445
#define WM8350_IM_PUTO_LDO4_EINT                0x0800
 
446
#define WM8350_IM_PUTO_LDO3_EINT                0x0400
 
447
#define WM8350_IM_PUTO_LDO2_EINT                0x0200
 
448
#define WM8350_IM_PUTO_LDO1_EINT                0x0100
 
449
#define WM8350_IM_PUTO_DC6_EINT                 0x0020
 
450
#define WM8350_IM_PUTO_DC5_EINT                 0x0010
 
451
#define WM8350_IM_PUTO_DC4_EINT                 0x0008
 
452
#define WM8350_IM_PUTO_DC3_EINT                 0x0004
 
453
#define WM8350_IM_PUTO_DC2_EINT                 0x0002
 
454
#define WM8350_IM_PUTO_DC1_EINT                 0x0001
 
455
 
 
456
/*
 
457
 * R36 (0x24) - Under Voltage Interrupt status Mask
 
458
 */
 
459
#define WM8350_IM_UV_LDO4_EINT                  0x0800
 
460
#define WM8350_IM_UV_LDO3_EINT                  0x0400
 
461
#define WM8350_IM_UV_LDO2_EINT                  0x0200
 
462
#define WM8350_IM_UV_LDO1_EINT                  0x0100
 
463
#define WM8350_IM_UV_DC6_EINT                   0x0020
 
464
#define WM8350_IM_UV_DC5_EINT                   0x0010
 
465
#define WM8350_IM_UV_DC4_EINT                   0x0008
 
466
#define WM8350_IM_UV_DC3_EINT                   0x0004
 
467
#define WM8350_IM_UV_DC2_EINT                   0x0002
 
468
#define WM8350_IM_UV_DC1_EINT                   0x0001
 
469
 
 
470
/*
 
471
 * R37 (0x25) - Over Current Interrupt status Mask
 
472
 */
 
473
#define WM8350_IM_OC_LS_EINT                    0x8000
 
474
 
 
475
/*
 
476
 * R38 (0x26) - GPIO Interrupt Status Mask
 
477
 */
 
478
#define WM8350_IM_GP12_EINT                     0x1000
 
479
#define WM8350_IM_GP11_EINT                     0x0800
 
480
#define WM8350_IM_GP10_EINT                     0x0400
 
481
#define WM8350_IM_GP9_EINT                      0x0200
 
482
#define WM8350_IM_GP8_EINT                      0x0100
 
483
#define WM8350_IM_GP7_EINT                      0x0080
 
484
#define WM8350_IM_GP6_EINT                      0x0040
 
485
#define WM8350_IM_GP5_EINT                      0x0020
 
486
#define WM8350_IM_GP4_EINT                      0x0010
 
487
#define WM8350_IM_GP3_EINT                      0x0008
 
488
#define WM8350_IM_GP2_EINT                      0x0004
 
489
#define WM8350_IM_GP1_EINT                      0x0002
 
490
#define WM8350_IM_GP0_EINT                      0x0001
 
491
 
 
492
/*
 
493
 * R39 (0x27) - Comparator Interrupt Status Mask
 
494
 */
 
495
#define WM8350_IM_EXT_USB_FB_EINT               0x8000
 
496
#define WM8350_IM_EXT_WALL_FB_EINT              0x4000
 
497
#define WM8350_IM_EXT_BAT_FB_EINT               0x2000
 
498
#define WM8350_IM_CODEC_JCK_DET_L_EINT          0x0800
 
499
#define WM8350_IM_CODEC_JCK_DET_R_EINT          0x0400
 
500
#define WM8350_IM_CODEC_MICSCD_EINT             0x0200
 
501
#define WM8350_IM_CODEC_MICD_EINT               0x0100
 
502
#define WM8350_IM_WKUP_OFF_STATE_EINT           0x0040
 
503
#define WM8350_IM_WKUP_HIB_STATE_EINT           0x0020
 
504
#define WM8350_IM_WKUP_CONV_FAULT_EINT          0x0010
 
505
#define WM8350_IM_WKUP_WDOG_RST_EINT            0x0008
 
506
#define WM8350_IM_WKUP_GP_PWR_ON_EINT           0x0004
 
507
#define WM8350_IM_WKUP_ONKEY_EINT               0x0002
 
508
#define WM8350_IM_WKUP_GP_WAKEUP_EINT           0x0001
 
509
 
 
510
/*
 
511
 * R220 (0xDC) - RAM BIST 1
 
512
 */
 
513
#define WM8350_READ_STATUS                      0x0800
 
514
#define WM8350_TSTRAM_CLK                       0x0100
 
515
#define WM8350_TSTRAM_CLK_ENA                   0x0080
 
516
#define WM8350_STARTSEQ                         0x0040
 
517
#define WM8350_READ_SRC                         0x0020
 
518
#define WM8350_COUNT_DIR                        0x0010
 
519
#define WM8350_TSTRAM_MODE_MASK                 0x000E
 
520
#define WM8350_TSTRAM_ENA                       0x0001
 
521
 
 
522
/*
 
523
 * R225 (0xE1) - DCDC/LDO status
 
524
 */
 
525
#define WM8350_LS_STS                           0x8000
 
526
#define WM8350_LDO4_STS                         0x0800
 
527
#define WM8350_LDO3_STS                         0x0400
 
528
#define WM8350_LDO2_STS                         0x0200
 
529
#define WM8350_LDO1_STS                         0x0100
 
530
#define WM8350_DC6_STS                          0x0020
 
531
#define WM8350_DC5_STS                          0x0010
 
532
#define WM8350_DC4_STS                          0x0008
 
533
#define WM8350_DC3_STS                          0x0004
 
534
#define WM8350_DC2_STS                          0x0002
 
535
#define WM8350_DC1_STS                          0x0001
 
536
 
 
537
/*
 
538
 * R226 (0xE2) - Charger status
 
539
 */
 
540
#define WM8350_CHG_BATT_HOT_OVRDE               0x8000
 
541
#define WM8350_CHG_BATT_COLD_OVRDE              0x4000
 
542
 
 
543
/*
 
544
 * R227 (0xE3) - Misc Overrides
 
545
 */
 
546
#define WM8350_USB_LIMIT_OVRDE                  0x0400
 
547
 
 
548
/*
 
549
 * R227 (0xE7) - Comparator Overrides
 
550
 */
 
551
#define WM8350_USB_FB_OVRDE                     0x8000
 
552
#define WM8350_WALL_FB_OVRDE                    0x4000
 
553
#define WM8350_BATT_FB_OVRDE                    0x2000
 
554
 
 
555
 
 
556
/*
 
557
 * R233 (0xE9) - State Machinine Status
 
558
 */
 
559
#define WM8350_USB_SM_MASK                      0x0700
 
560
#define WM8350_USB_SM_SHIFT                     8
 
561
 
 
562
#define WM8350_USB_SM_100_SLV   1
 
563
#define WM8350_USB_SM_500_SLV   5
 
564
#define WM8350_USB_SM_STDBY_SLV 7
 
565
 
 
566
/* WM8350 wake up conditions */
 
567
#define WM8350_IRQ_WKUP_OFF_STATE               43
 
568
#define WM8350_IRQ_WKUP_HIB_STATE               44
 
569
#define WM8350_IRQ_WKUP_CONV_FAULT              45
 
570
#define WM8350_IRQ_WKUP_WDOG_RST                46
 
571
#define WM8350_IRQ_WKUP_GP_PWR_ON               47
 
572
#define WM8350_IRQ_WKUP_ONKEY                   48
 
573
#define WM8350_IRQ_WKUP_GP_WAKEUP               49
 
574
 
 
575
/* wm8350 chip revisions */
 
576
#define WM8350_REV_E                            0x4
 
577
#define WM8350_REV_F                            0x5
 
578
#define WM8350_REV_G                            0x6
 
579
#define WM8350_REV_H                            0x7
 
580
 
 
581
#define WM8350_NUM_IRQ                          63
 
582
 
 
583
#define WM8350_NUM_IRQ_REGS 7
 
584
 
 
585
struct wm8350_reg_access {
 
586
        u16 readable;           /* Mask of readable bits */
 
587
        u16 writable;           /* Mask of writable bits */
 
588
        u16 vol;                /* Mask of volatile bits */
 
589
};
 
590
extern const struct wm8350_reg_access wm8350_reg_io_map[];
 
591
extern const u16 wm8350_mode0_defaults[];
 
592
extern const u16 wm8350_mode1_defaults[];
 
593
extern const u16 wm8350_mode2_defaults[];
 
594
extern const u16 wm8350_mode3_defaults[];
 
595
extern const u16 wm8351_mode0_defaults[];
 
596
extern const u16 wm8351_mode1_defaults[];
 
597
extern const u16 wm8351_mode2_defaults[];
 
598
extern const u16 wm8351_mode3_defaults[];
 
599
extern const u16 wm8352_mode0_defaults[];
 
600
extern const u16 wm8352_mode1_defaults[];
 
601
extern const u16 wm8352_mode2_defaults[];
 
602
extern const u16 wm8352_mode3_defaults[];
 
603
 
 
604
struct wm8350;
 
605
 
 
606
struct wm8350_hwmon {
 
607
        struct platform_device *pdev;
 
608
        struct device *classdev;
 
609
};
 
610
 
 
611
struct wm8350 {
 
612
        struct device *dev;
 
613
 
 
614
        /* device IO */
 
615
        union {
 
616
                struct i2c_client *i2c_client;
 
617
                struct spi_device *spi_device;
 
618
        };
 
619
        int (*read_dev)(struct wm8350 *wm8350, char reg, int size, void *dest);
 
620
        int (*write_dev)(struct wm8350 *wm8350, char reg, int size,
 
621
                         void *src);
 
622
        u16 *reg_cache;
 
623
 
 
624
        struct mutex auxadc_mutex;
 
625
        struct completion auxadc_done;
 
626
 
 
627
        /* Interrupt handling */
 
628
        struct mutex irq_lock;
 
629
        int chip_irq;
 
630
        int irq_base;
 
631
        u16 irq_masks[WM8350_NUM_IRQ_REGS];
 
632
 
 
633
        /* Client devices */
 
634
        struct wm8350_codec codec;
 
635
        struct wm8350_gpio gpio;
 
636
        struct wm8350_hwmon hwmon;
 
637
        struct wm8350_pmic pmic;
 
638
        struct wm8350_power power;
 
639
        struct wm8350_rtc rtc;
 
640
        struct wm8350_wdt wdt;
 
641
};
 
642
 
 
643
/**
 
644
 * Data to be supplied by the platform to initialise the WM8350.
 
645
 *
 
646
 * @init: Function called during driver initialisation.  Should be
 
647
 *        used by the platform to configure GPIO functions and similar.
 
648
 * @irq_high: Set if WM8350 IRQ is active high.
 
649
 * @irq_base: Base IRQ for genirq (not currently used).
 
650
 * @gpio_base: Base for gpiolib.
 
651
 */
 
652
struct wm8350_platform_data {
 
653
        int (*init)(struct wm8350 *wm8350);
 
654
        int irq_high;
 
655
        int irq_base;
 
656
        int gpio_base;
 
657
};
 
658
 
 
659
 
 
660
/*
 
661
 * WM8350 device initialisation and exit.
 
662
 */
 
663
int wm8350_device_init(struct wm8350 *wm8350, int irq,
 
664
                       struct wm8350_platform_data *pdata);
 
665
void wm8350_device_exit(struct wm8350 *wm8350);
 
666
 
 
667
/*
 
668
 * WM8350 device IO
 
669
 */
 
670
int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
 
671
int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
 
672
u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
 
673
int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
 
674
int wm8350_reg_lock(struct wm8350 *wm8350);
 
675
int wm8350_reg_unlock(struct wm8350 *wm8350);
 
676
int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
 
677
int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);
 
678
 
 
679
/*
 
680
 * WM8350 internal interrupts
 
681
 */
 
682
static inline int wm8350_register_irq(struct wm8350 *wm8350, int irq,
 
683
                                      irq_handler_t handler,
 
684
                                      unsigned long flags,
 
685
                                      const char *name, void *data)
 
686
{
 
687
        if (!wm8350->irq_base)
 
688
                return -ENODEV;
 
689
 
 
690
        return request_threaded_irq(irq + wm8350->irq_base, NULL,
 
691
                                    handler, flags, name, data);
 
692
}
 
693
 
 
694
static inline void wm8350_free_irq(struct wm8350 *wm8350, int irq, void *data)
 
695
{
 
696
        free_irq(irq + wm8350->irq_base, data);
 
697
}
 
698
 
 
699
static inline void wm8350_mask_irq(struct wm8350 *wm8350, int irq)
 
700
{
 
701
        disable_irq(irq + wm8350->irq_base);
 
702
}
 
703
 
 
704
static inline void wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
 
705
{
 
706
        enable_irq(irq + wm8350->irq_base);
 
707
}
 
708
 
 
709
int wm8350_irq_init(struct wm8350 *wm8350, int irq,
 
710
                    struct wm8350_platform_data *pdata);
 
711
int wm8350_irq_exit(struct wm8350 *wm8350);
 
712
 
 
713
#endif