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Viewing changes to arch/arm/mach-at91/irq.c

  • Committer: Package Import Robot
  • Author(s): Alessio Igor Bogani
  • Date: 2011-10-26 11:13:05 UTC
  • Revision ID: package-import@ubuntu.com-20111026111305-tz023xykf0i6eosh
Tags: upstream-3.2.0
Import upstream version 3.2.0

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arch/arm/mach-at91/irq.c
 
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/*
 
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 * linux/arch/arm/mach-at91/irq.c
 
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 *
 
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 *  Copyright (C) 2004 SAN People
 
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 *  Copyright (C) 2004 ATMEL
 
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 *  Copyright (C) Rick Bronson
 
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 *
 
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 * This program is free software; you can redistribute it and/or modify
 
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 * it under the terms of the GNU General Public License as published by
 
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 * the Free Software Foundation; either version 2 of the License, or
 
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 * (at your option) any later version.
 
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 *
 
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 * This program is distributed in the hope that it will be useful,
 
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 
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 * GNU General Public License for more details.
 
17
 *
 
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 * You should have received a copy of the GNU General Public License
 
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 * along with this program; if not, write to the Free Software
 
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 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 
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 */
 
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#include <linux/init.h>
 
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#include <linux/module.h>
 
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#include <linux/mm.h>
 
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#include <linux/types.h>
 
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#include <mach/hardware.h>
 
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#include <asm/irq.h>
 
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#include <asm/setup.h>
 
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#include <asm/mach/arch.h>
 
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#include <asm/mach/irq.h>
 
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#include <asm/mach/map.h>
 
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static void at91_aic_mask_irq(struct irq_data *d)
 
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{
 
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        /* Disable interrupt on AIC */
 
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        at91_sys_write(AT91_AIC_IDCR, 1 << d->irq);
 
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}
 
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static void at91_aic_unmask_irq(struct irq_data *d)
 
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{
 
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        /* Enable interrupt on AIC */
 
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        at91_sys_write(AT91_AIC_IECR, 1 << d->irq);
 
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}
 
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unsigned int at91_extern_irq;
 
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#define is_extern_irq(irq) ((1 << (irq)) & at91_extern_irq)
 
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static int at91_aic_set_type(struct irq_data *d, unsigned type)
 
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{
 
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        unsigned int smr, srctype;
 
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        switch (type) {
 
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        case IRQ_TYPE_LEVEL_HIGH:
 
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                srctype = AT91_AIC_SRCTYPE_HIGH;
 
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                break;
 
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        case IRQ_TYPE_EDGE_RISING:
 
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                srctype = AT91_AIC_SRCTYPE_RISING;
 
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                break;
 
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        case IRQ_TYPE_LEVEL_LOW:
 
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                if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))           /* only supported on external interrupts */
 
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                        srctype = AT91_AIC_SRCTYPE_LOW;
 
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                else
 
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                        return -EINVAL;
 
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                break;
 
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        case IRQ_TYPE_EDGE_FALLING:
 
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                if ((d->irq == AT91_ID_FIQ) || is_extern_irq(d->irq))           /* only supported on external interrupts */
 
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                        srctype = AT91_AIC_SRCTYPE_FALLING;
 
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                else
 
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                        return -EINVAL;
 
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                break;
 
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        default:
 
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                return -EINVAL;
 
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        }
 
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        smr = at91_sys_read(AT91_AIC_SMR(d->irq)) & ~AT91_AIC_SRCTYPE;
 
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        at91_sys_write(AT91_AIC_SMR(d->irq), smr | srctype);
 
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        return 0;
 
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}
 
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#ifdef CONFIG_PM
 
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static u32 wakeups;
 
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static u32 backups;
 
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static int at91_aic_set_wake(struct irq_data *d, unsigned value)
 
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{
 
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        if (unlikely(d->irq >= 32))
 
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                return -EINVAL;
 
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        if (value)
 
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                wakeups |= (1 << d->irq);
 
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        else
 
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                wakeups &= ~(1 << d->irq);
 
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        return 0;
 
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}
 
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void at91_irq_suspend(void)
 
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{
 
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        backups = at91_sys_read(AT91_AIC_IMR);
 
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        at91_sys_write(AT91_AIC_IDCR, backups);
 
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        at91_sys_write(AT91_AIC_IECR, wakeups);
 
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}
 
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void at91_irq_resume(void)
 
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{
 
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        at91_sys_write(AT91_AIC_IDCR, wakeups);
 
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        at91_sys_write(AT91_AIC_IECR, backups);
 
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}
 
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#else
 
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#define at91_aic_set_wake       NULL
 
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#endif
 
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static struct irq_chip at91_aic_chip = {
 
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        .name           = "AIC",
 
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        .irq_ack        = at91_aic_mask_irq,
 
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        .irq_mask       = at91_aic_mask_irq,
 
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        .irq_unmask     = at91_aic_unmask_irq,
 
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        .irq_set_type   = at91_aic_set_type,
 
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        .irq_set_wake   = at91_aic_set_wake,
 
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};
 
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/*
 
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 * Initialize the AIC interrupt controller.
 
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 */
 
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void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS])
 
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{
 
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        unsigned int i;
 
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        /*
 
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         * The IVR is used by macro get_irqnr_and_base to read and verify.
 
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         * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred.
 
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         */
 
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        for (i = 0; i < NR_AIC_IRQS; i++) {
 
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                /* Put irq number in Source Vector Register: */
 
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                at91_sys_write(AT91_AIC_SVR(i), i);
 
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                /* Active Low interrupt, with the specified priority */
 
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                at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]);
 
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                irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq);
 
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                set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
 
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                /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */
 
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                if (i < 8)
 
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                        at91_sys_write(AT91_AIC_EOICR, 0);
 
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        }
 
153
 
 
154
        /*
 
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         * Spurious Interrupt ID in Spurious Vector Register is NR_AIC_IRQS
 
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         * When there is no current interrupt, the IRQ Vector Register reads the value stored in AIC_SPU
 
157
         */
 
158
        at91_sys_write(AT91_AIC_SPU, NR_AIC_IRQS);
 
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160
        /* No debugging in AIC: Debug (Protect) Control Register */
 
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        at91_sys_write(AT91_AIC_DCR, 0);
 
162
 
 
163
        /* Disable and clear all interrupts initially */
 
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        at91_sys_write(AT91_AIC_IDCR, 0xFFFFFFFF);
 
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        at91_sys_write(AT91_AIC_ICCR, 0xFFFFFFFF);
 
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}