2
* wm8993.c -- WM8993 ALSA SoC audio driver
4
* Copyright 2009, 2010 Wolfson Microelectronics plc
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* Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/regulator/consumer.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/tlv.h>
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#include <sound/soc.h>
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#include <sound/initval.h>
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#include <sound/wm8993.h>
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#define WM8993_NUM_SUPPLIES 6
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static const char *wm8993_supply_names[WM8993_NUM_SUPPLIES] = {
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static u16 wm8993_reg_defaults[WM8993_REGISTER_COUNT] = {
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0x8993, /* R0 - Software Reset */
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0x0000, /* R1 - Power Management (1) */
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0x6000, /* R2 - Power Management (2) */
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0x0000, /* R3 - Power Management (3) */
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0x4050, /* R4 - Audio Interface (1) */
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0x4000, /* R5 - Audio Interface (2) */
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0x01C8, /* R6 - Clocking 1 */
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0x0000, /* R7 - Clocking 2 */
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0x0000, /* R8 - Audio Interface (3) */
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0x0040, /* R9 - Audio Interface (4) */
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0x0004, /* R10 - DAC CTRL */
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0x00C0, /* R11 - Left DAC Digital Volume */
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0x00C0, /* R12 - Right DAC Digital Volume */
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0x0000, /* R13 - Digital Side Tone */
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0x0300, /* R14 - ADC CTRL */
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0x00C0, /* R15 - Left ADC Digital Volume */
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0x00C0, /* R16 - Right ADC Digital Volume */
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0x0000, /* R18 - GPIO CTRL 1 */
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0x0010, /* R19 - GPIO1 */
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0x0000, /* R20 - IRQ_DEBOUNCE */
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0x8000, /* R22 - GPIOCTRL 2 */
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0x0800, /* R23 - GPIO_POL */
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0x008B, /* R24 - Left Line Input 1&2 Volume */
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0x008B, /* R25 - Left Line Input 3&4 Volume */
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0x008B, /* R26 - Right Line Input 1&2 Volume */
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0x008B, /* R27 - Right Line Input 3&4 Volume */
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0x006D, /* R28 - Left Output Volume */
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0x006D, /* R29 - Right Output Volume */
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0x0066, /* R30 - Line Outputs Volume */
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0x0020, /* R31 - HPOUT2 Volume */
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0x0079, /* R32 - Left OPGA Volume */
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0x0079, /* R33 - Right OPGA Volume */
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0x0003, /* R34 - SPKMIXL Attenuation */
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0x0003, /* R35 - SPKMIXR Attenuation */
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0x0011, /* R36 - SPKOUT Mixers */
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0x0100, /* R37 - SPKOUT Boost */
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0x0079, /* R38 - Speaker Volume Left */
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0x0079, /* R39 - Speaker Volume Right */
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0x0000, /* R40 - Input Mixer2 */
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0x0000, /* R41 - Input Mixer3 */
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0x0000, /* R42 - Input Mixer4 */
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0x0000, /* R43 - Input Mixer5 */
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0x0000, /* R44 - Input Mixer6 */
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0x0000, /* R45 - Output Mixer1 */
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0x0000, /* R46 - Output Mixer2 */
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0x0000, /* R47 - Output Mixer3 */
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0x0000, /* R48 - Output Mixer4 */
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0x0000, /* R49 - Output Mixer5 */
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0x0000, /* R50 - Output Mixer6 */
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0x0000, /* R51 - HPOUT2 Mixer */
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0x0000, /* R52 - Line Mixer1 */
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0x0000, /* R53 - Line Mixer2 */
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0x0000, /* R54 - Speaker Mixer */
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0x0000, /* R55 - Additional Control */
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0x0000, /* R56 - AntiPOP1 */
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0x0000, /* R57 - AntiPOP2 */
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0x0000, /* R58 - MICBIAS */
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0x0000, /* R60 - FLL Control 1 */
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0x0000, /* R61 - FLL Control 2 */
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0x0000, /* R62 - FLL Control 3 */
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0x2EE0, /* R63 - FLL Control 4 */
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0x0002, /* R64 - FLL Control 5 */
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0x2287, /* R65 - Clocking 3 */
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0x025F, /* R66 - Clocking 4 */
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0x0000, /* R67 - MW Slave Control */
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0x0002, /* R69 - Bus Control 1 */
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0x0000, /* R70 - Write Sequencer 0 */
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0x0000, /* R71 - Write Sequencer 1 */
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0x0000, /* R72 - Write Sequencer 2 */
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0x0000, /* R73 - Write Sequencer 3 */
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0x0000, /* R74 - Write Sequencer 4 */
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0x0000, /* R75 - Write Sequencer 5 */
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0x1F25, /* R76 - Charge Pump 1 */
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0x0000, /* R81 - Class W 0 */
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0x0000, /* R84 - DC Servo 0 */
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0x054A, /* R85 - DC Servo 1 */
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0x0000, /* R87 - DC Servo 3 */
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0x0000, /* R88 - DC Servo Readback 0 */
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0x0000, /* R89 - DC Servo Readback 1 */
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0x0000, /* R90 - DC Servo Readback 2 */
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0x0100, /* R96 - Analogue HP 0 */
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0x0000, /* R98 - EQ1 */
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0x000C, /* R99 - EQ2 */
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0x000C, /* R100 - EQ3 */
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0x000C, /* R101 - EQ4 */
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0x000C, /* R102 - EQ5 */
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0x000C, /* R103 - EQ6 */
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0x0FCA, /* R104 - EQ7 */
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0x0400, /* R105 - EQ8 */
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0x00D8, /* R106 - EQ9 */
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0x1EB5, /* R107 - EQ10 */
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0xF145, /* R108 - EQ11 */
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0x0B75, /* R109 - EQ12 */
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0x01C5, /* R110 - EQ13 */
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0x1C58, /* R111 - EQ14 */
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0xF373, /* R112 - EQ15 */
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0x0A54, /* R113 - EQ16 */
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0x0558, /* R114 - EQ17 */
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0x168E, /* R115 - EQ18 */
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0xF829, /* R116 - EQ19 */
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0x07AD, /* R117 - EQ20 */
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0x1103, /* R118 - EQ21 */
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0x0564, /* R119 - EQ22 */
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0x0559, /* R120 - EQ23 */
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0x4000, /* R121 - EQ24 */
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0x0000, /* R122 - Digital Pulls */
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0x0F08, /* R123 - DRC Control 1 */
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0x0000, /* R124 - DRC Control 2 */
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0x0080, /* R125 - DRC Control 3 */
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0x0000, /* R126 - DRC Control 4 */
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} clk_sys_rates[] = {
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int div; /* *10 due to .5s */
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struct wm_hubs_data hubs_data;
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struct regulator_bulk_data supplies[WM8993_NUM_SUPPLIES];
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struct wm8993_platform_data pdata;
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enum snd_soc_control_type control_type;
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unsigned int mclk_rate;
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unsigned int sysclk_rate;
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unsigned int fll_fref;
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unsigned int fll_fout;
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static int wm8993_volatile(struct snd_soc_codec *codec, unsigned int reg)
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case WM8993_SOFTWARE_RESET:
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case WM8993_DC_SERVO_0:
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case WM8993_DC_SERVO_READBACK_0:
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case WM8993_DC_SERVO_READBACK_1:
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case WM8993_DC_SERVO_READBACK_2:
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/* The size in bits of the FLL divide multiplied by 10
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* to allow rounding later */
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#define FIXED_FLL_SIZE ((1 << 16) * 10)
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{ 64000, 128000, 3, 8 },
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{ 128000, 256000, 2, 4 },
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{ 256000, 1000000, 1, 2 },
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{ 1000000, 13500000, 0, 1 },
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static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
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unsigned int K, Ndiv, Nmod, target;
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/* Fref must be <=13.5MHz */
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fll_div->fll_clk_ref_div = 0;
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while ((Fref / div) > 13500000) {
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fll_div->fll_clk_ref_div++;
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pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
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pr_debug("Fref=%u Fout=%u\n", Fref, Fout);
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/* Apply the division for our remaining calculations */
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/* Fvco should be 90-100MHz; don't check the upper bound */
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while (target < 90000000) {
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pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
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fll_div->fll_outdiv = div;
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pr_debug("Fvco=%dHz\n", target);
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/* Find an appropriate FLL_FRATIO and factor it out of the target */
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for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
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if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
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fll_div->fll_fratio = fll_fratios[i].fll_fratio;
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target /= fll_fratios[i].ratio;
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if (i == ARRAY_SIZE(fll_fratios)) {
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pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref);
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/* Now, calculate N.K */
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Ndiv = target / Fref;
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Nmod = target % Fref;
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pr_debug("Nmod=%d\n", Nmod);
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/* Calculate fractional part - scale up so we can round. */
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Kpart = FIXED_FLL_SIZE * (long long)Nmod;
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K = Kpart & 0xFFFFFFFF;
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/* Move down to proper range now rounding is done */
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pr_debug("N=%x K=%x FLL_FRATIO=%x FLL_OUTDIV=%x FLL_CLK_REF_DIV=%x\n",
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fll_div->n, fll_div->k,
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fll_div->fll_fratio, fll_div->fll_outdiv,
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fll_div->fll_clk_ref_div);
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static int _wm8993_set_fll(struct snd_soc_codec *codec, int fll_id, int source,
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unsigned int Fref, unsigned int Fout)
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struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
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u16 reg1, reg4, reg5;
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struct _fll_div fll_div;
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if (Fref == wm8993->fll_fref && Fout == wm8993->fll_fout)
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/* Disable the FLL */
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dev_dbg(codec->dev, "FLL disabled\n");
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wm8993->fll_fref = 0;
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wm8993->fll_fout = 0;
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reg1 = snd_soc_read(codec, WM8993_FLL_CONTROL_1);
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reg1 &= ~WM8993_FLL_ENA;
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snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
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ret = fll_factors(&fll_div, Fref, Fout);
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reg5 = snd_soc_read(codec, WM8993_FLL_CONTROL_5);
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reg5 &= ~WM8993_FLL_CLK_SRC_MASK;
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case WM8993_FLL_MCLK:
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case WM8993_FLL_LRCLK:
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case WM8993_FLL_BCLK:
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dev_err(codec->dev, "Unknown FLL ID %d\n", fll_id);
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/* Any FLL configuration change requires that the FLL be
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reg1 = snd_soc_read(codec, WM8993_FLL_CONTROL_1);
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reg1 &= ~WM8993_FLL_ENA;
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snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
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/* Apply the configuration */
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reg1 |= WM8993_FLL_FRAC_MASK;
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reg1 &= ~WM8993_FLL_FRAC_MASK;
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snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1);
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snd_soc_write(codec, WM8993_FLL_CONTROL_2,
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(fll_div.fll_outdiv << WM8993_FLL_OUTDIV_SHIFT) |
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(fll_div.fll_fratio << WM8993_FLL_FRATIO_SHIFT));
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snd_soc_write(codec, WM8993_FLL_CONTROL_3, fll_div.k);
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reg4 = snd_soc_read(codec, WM8993_FLL_CONTROL_4);
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reg4 &= ~WM8993_FLL_N_MASK;
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reg4 |= fll_div.n << WM8993_FLL_N_SHIFT;
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snd_soc_write(codec, WM8993_FLL_CONTROL_4, reg4);
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reg5 &= ~WM8993_FLL_CLK_REF_DIV_MASK;
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reg5 |= fll_div.fll_clk_ref_div << WM8993_FLL_CLK_REF_DIV_SHIFT;
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snd_soc_write(codec, WM8993_FLL_CONTROL_5, reg5);
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snd_soc_write(codec, WM8993_FLL_CONTROL_1, reg1 | WM8993_FLL_ENA);
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dev_dbg(codec->dev, "FLL enabled at %dHz->%dHz\n", Fref, Fout);
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wm8993->fll_fref = Fref;
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wm8993->fll_fout = Fout;
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wm8993->fll_src = source;
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static int wm8993_set_fll(struct snd_soc_dai *dai, int fll_id, int source,
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unsigned int Fref, unsigned int Fout)
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return _wm8993_set_fll(dai->codec, fll_id, source, Fref, Fout);
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static int configure_clock(struct snd_soc_codec *codec)
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struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
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/* This should be done on init() for bypass paths */
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switch (wm8993->sysclk_source) {
469
case WM8993_SYSCLK_MCLK:
470
dev_dbg(codec->dev, "Using %dHz MCLK\n", wm8993->mclk_rate);
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reg = snd_soc_read(codec, WM8993_CLOCKING_2);
473
reg &= ~(WM8993_MCLK_DIV | WM8993_SYSCLK_SRC);
474
if (wm8993->mclk_rate > 13500000) {
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reg |= WM8993_MCLK_DIV;
476
wm8993->sysclk_rate = wm8993->mclk_rate / 2;
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reg &= ~WM8993_MCLK_DIV;
479
wm8993->sysclk_rate = wm8993->mclk_rate;
481
snd_soc_write(codec, WM8993_CLOCKING_2, reg);
484
case WM8993_SYSCLK_FLL:
485
dev_dbg(codec->dev, "Using %dHz FLL clock\n",
488
reg = snd_soc_read(codec, WM8993_CLOCKING_2);
489
reg |= WM8993_SYSCLK_SRC;
490
if (wm8993->fll_fout > 13500000) {
491
reg |= WM8993_MCLK_DIV;
492
wm8993->sysclk_rate = wm8993->fll_fout / 2;
494
reg &= ~WM8993_MCLK_DIV;
495
wm8993->sysclk_rate = wm8993->fll_fout;
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snd_soc_write(codec, WM8993_CLOCKING_2, reg);
501
dev_err(codec->dev, "System clock not configured\n");
505
dev_dbg(codec->dev, "CLK_SYS is %dHz\n", wm8993->sysclk_rate);
510
static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0);
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static const DECLARE_TLV_DB_SCALE(drc_comp_threash, -4500, 75, 0);
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static const DECLARE_TLV_DB_SCALE(drc_comp_amp, -2250, 75, 0);
513
static const DECLARE_TLV_DB_SCALE(drc_min_tlv, -1800, 600, 0);
514
static const unsigned int drc_max_tlv[] = {
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TLV_DB_RANGE_HEAD(2),
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0, 2, TLV_DB_SCALE_ITEM(1200, 600, 0),
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3, 3, TLV_DB_SCALE_ITEM(3600, 0, 0),
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static const DECLARE_TLV_DB_SCALE(drc_qr_tlv, 1200, 600, 0);
520
static const DECLARE_TLV_DB_SCALE(drc_startup_tlv, -1800, 300, 0);
521
static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
522
static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
523
static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0);
525
static const char *dac_deemph_text[] = {
532
static const struct soc_enum dac_deemph =
533
SOC_ENUM_SINGLE(WM8993_DAC_CTRL, 4, 4, dac_deemph_text);
535
static const char *adc_hpf_text[] = {
542
static const struct soc_enum adc_hpf =
543
SOC_ENUM_SINGLE(WM8993_ADC_CTRL, 5, 4, adc_hpf_text);
545
static const char *drc_path_text[] = {
550
static const struct soc_enum drc_path =
551
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 14, 2, drc_path_text);
553
static const char *drc_r0_text[] = {
562
static const struct soc_enum drc_r0 =
563
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 8, 6, drc_r0_text);
565
static const char *drc_r1_text[] = {
573
static const struct soc_enum drc_r1 =
574
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_4, 13, 5, drc_r1_text);
576
static const char *drc_attack_text[] = {
591
static const struct soc_enum drc_attack =
592
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 12, 12, drc_attack_text);
594
static const char *drc_decay_text[] = {
606
static const struct soc_enum drc_decay =
607
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_2, 8, 9, drc_decay_text);
609
static const char *drc_ff_text[] = {
614
static const struct soc_enum drc_ff =
615
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 7, 2, drc_ff_text);
617
static const char *drc_qr_rate_text[] = {
623
static const struct soc_enum drc_qr_rate =
624
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_3, 0, 3, drc_qr_rate_text);
626
static const char *drc_smooth_text[] = {
632
static const struct soc_enum drc_smooth =
633
SOC_ENUM_SINGLE(WM8993_DRC_CONTROL_1, 4, 3, drc_smooth_text);
635
static const struct snd_kcontrol_new wm8993_snd_controls[] = {
636
SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8993_DIGITAL_SIDE_TONE,
637
5, 9, 12, 0, sidetone_tlv),
639
SOC_SINGLE("DRC Switch", WM8993_DRC_CONTROL_1, 15, 1, 0),
640
SOC_ENUM("DRC Path", drc_path),
641
SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8993_DRC_CONTROL_2,
642
2, 60, 1, drc_comp_threash),
643
SOC_SINGLE_TLV("DRC Compressor Amplitude Volume", WM8993_DRC_CONTROL_3,
644
11, 30, 1, drc_comp_amp),
645
SOC_ENUM("DRC R0", drc_r0),
646
SOC_ENUM("DRC R1", drc_r1),
647
SOC_SINGLE_TLV("DRC Minimum Volume", WM8993_DRC_CONTROL_1, 2, 3, 1,
649
SOC_SINGLE_TLV("DRC Maximum Volume", WM8993_DRC_CONTROL_1, 0, 3, 0,
651
SOC_ENUM("DRC Attack Rate", drc_attack),
652
SOC_ENUM("DRC Decay Rate", drc_decay),
653
SOC_ENUM("DRC FF Delay", drc_ff),
654
SOC_SINGLE("DRC Anti-clip Switch", WM8993_DRC_CONTROL_1, 9, 1, 0),
655
SOC_SINGLE("DRC Quick Release Switch", WM8993_DRC_CONTROL_1, 10, 1, 0),
656
SOC_SINGLE_TLV("DRC Quick Release Volume", WM8993_DRC_CONTROL_3, 2, 3, 0,
658
SOC_ENUM("DRC Quick Release Rate", drc_qr_rate),
659
SOC_SINGLE("DRC Smoothing Switch", WM8993_DRC_CONTROL_1, 11, 1, 0),
660
SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8993_DRC_CONTROL_1, 8, 1, 0),
661
SOC_ENUM("DRC Smoothing Hysteresis Threshold", drc_smooth),
662
SOC_SINGLE_TLV("DRC Startup Volume", WM8993_DRC_CONTROL_4, 8, 18, 0,
665
SOC_SINGLE("EQ Switch", WM8993_EQ1, 0, 1, 0),
667
SOC_DOUBLE_R_TLV("Capture Volume", WM8993_LEFT_ADC_DIGITAL_VOLUME,
668
WM8993_RIGHT_ADC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
669
SOC_SINGLE("ADC High Pass Filter Switch", WM8993_ADC_CTRL, 8, 1, 0),
670
SOC_ENUM("ADC High Pass Filter Mode", adc_hpf),
672
SOC_DOUBLE_R_TLV("Playback Volume", WM8993_LEFT_DAC_DIGITAL_VOLUME,
673
WM8993_RIGHT_DAC_DIGITAL_VOLUME, 1, 96, 0, digital_tlv),
674
SOC_SINGLE_TLV("Playback Boost Volume", WM8993_AUDIO_INTERFACE_2, 10, 3, 0,
676
SOC_ENUM("DAC Deemphasis", dac_deemph),
678
SOC_SINGLE_TLV("SPKL DAC Volume", WM8993_SPKMIXL_ATTENUATION,
679
2, 1, 1, wm_hubs_spkmix_tlv),
681
SOC_SINGLE_TLV("SPKR DAC Volume", WM8993_SPKMIXR_ATTENUATION,
682
2, 1, 1, wm_hubs_spkmix_tlv),
685
static const struct snd_kcontrol_new wm8993_eq_controls[] = {
686
SOC_SINGLE_TLV("EQ1 Volume", WM8993_EQ2, 0, 24, 0, eq_tlv),
687
SOC_SINGLE_TLV("EQ2 Volume", WM8993_EQ3, 0, 24, 0, eq_tlv),
688
SOC_SINGLE_TLV("EQ3 Volume", WM8993_EQ4, 0, 24, 0, eq_tlv),
689
SOC_SINGLE_TLV("EQ4 Volume", WM8993_EQ5, 0, 24, 0, eq_tlv),
690
SOC_SINGLE_TLV("EQ5 Volume", WM8993_EQ6, 0, 24, 0, eq_tlv),
693
static int clk_sys_event(struct snd_soc_dapm_widget *w,
694
struct snd_kcontrol *kcontrol, int event)
696
struct snd_soc_codec *codec = w->codec;
699
case SND_SOC_DAPM_PRE_PMU:
700
return configure_clock(codec);
702
case SND_SOC_DAPM_POST_PMD:
710
* When used with DAC outputs only the WM8993 charge pump supports
711
* operation in class W mode, providing very low power consumption
712
* when used with digital sources. Enable and disable this mode
713
* automatically depending on the mixer configuration.
715
* Currently the only supported paths are the direct DAC->headphone
716
* paths (which provide minimum power consumption anyway).
718
static int class_w_put(struct snd_kcontrol *kcontrol,
719
struct snd_ctl_elem_value *ucontrol)
721
struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol);
722
struct snd_soc_dapm_widget *widget = wlist->widgets[0];
723
struct snd_soc_codec *codec = widget->codec;
724
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
727
/* Turn it off if we're using the main output mixer */
728
if (ucontrol->value.integer.value[0] == 0) {
729
if (wm8993->class_w_users == 0) {
730
dev_dbg(codec->dev, "Disabling Class W\n");
731
snd_soc_update_bits(codec, WM8993_CLASS_W_0,
736
wm8993->class_w_users++;
737
wm8993->hubs_data.class_w = true;
740
/* Implement the change */
741
ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
743
/* Enable it if we're using the direct DAC path */
744
if (ucontrol->value.integer.value[0] == 1) {
745
if (wm8993->class_w_users == 1) {
746
dev_dbg(codec->dev, "Enabling Class W\n");
747
snd_soc_update_bits(codec, WM8993_CLASS_W_0,
753
wm8993->class_w_users--;
754
wm8993->hubs_data.class_w = false;
757
dev_dbg(codec->dev, "Indirect DAC use count now %d\n",
758
wm8993->class_w_users);
763
#define SOC_DAPM_ENUM_W(xname, xenum) \
764
{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
765
.info = snd_soc_info_enum_double, \
766
.get = snd_soc_dapm_get_enum_double, \
767
.put = class_w_put, \
768
.private_value = (unsigned long)&xenum }
770
static const char *hp_mux_text[] = {
775
static const struct soc_enum hpl_enum =
776
SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text);
778
static const struct snd_kcontrol_new hpl_mux =
779
SOC_DAPM_ENUM_W("Left Headphone Mux", hpl_enum);
781
static const struct soc_enum hpr_enum =
782
SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text);
784
static const struct snd_kcontrol_new hpr_mux =
785
SOC_DAPM_ENUM_W("Right Headphone Mux", hpr_enum);
787
static const struct snd_kcontrol_new left_speaker_mixer[] = {
788
SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 7, 1, 0),
789
SOC_DAPM_SINGLE("IN1LP Switch", WM8993_SPEAKER_MIXER, 5, 1, 0),
790
SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 3, 1, 0),
791
SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
794
static const struct snd_kcontrol_new right_speaker_mixer[] = {
795
SOC_DAPM_SINGLE("Input Switch", WM8993_SPEAKER_MIXER, 6, 1, 0),
796
SOC_DAPM_SINGLE("IN1RP Switch", WM8993_SPEAKER_MIXER, 4, 1, 0),
797
SOC_DAPM_SINGLE("Output Switch", WM8993_SPEAKER_MIXER, 2, 1, 0),
798
SOC_DAPM_SINGLE("DAC Switch", WM8993_SPEAKER_MIXER, 0, 1, 0),
801
static const char *aif_text[] = {
805
static const struct soc_enum aifoutl_enum =
806
SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 15, 2, aif_text);
808
static const struct snd_kcontrol_new aifoutl_mux =
809
SOC_DAPM_ENUM("AIFOUTL Mux", aifoutl_enum);
811
static const struct soc_enum aifoutr_enum =
812
SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_1, 14, 2, aif_text);
814
static const struct snd_kcontrol_new aifoutr_mux =
815
SOC_DAPM_ENUM("AIFOUTR Mux", aifoutr_enum);
817
static const struct soc_enum aifinl_enum =
818
SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 15, 2, aif_text);
820
static const struct snd_kcontrol_new aifinl_mux =
821
SOC_DAPM_ENUM("AIFINL Mux", aifinl_enum);
823
static const struct soc_enum aifinr_enum =
824
SOC_ENUM_SINGLE(WM8993_AUDIO_INTERFACE_2, 14, 2, aif_text);
826
static const struct snd_kcontrol_new aifinr_mux =
827
SOC_DAPM_ENUM("AIFINR Mux", aifinr_enum);
829
static const char *sidetone_text[] = {
830
"None", "Left", "Right"
833
static const struct soc_enum sidetonel_enum =
834
SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 2, 3, sidetone_text);
836
static const struct snd_kcontrol_new sidetonel_mux =
837
SOC_DAPM_ENUM("Left Sidetone", sidetonel_enum);
839
static const struct soc_enum sidetoner_enum =
840
SOC_ENUM_SINGLE(WM8993_DIGITAL_SIDE_TONE, 0, 3, sidetone_text);
842
static const struct snd_kcontrol_new sidetoner_mux =
843
SOC_DAPM_ENUM("Right Sidetone", sidetoner_enum);
845
static const struct snd_soc_dapm_widget wm8993_dapm_widgets[] = {
846
SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8993_BUS_CONTROL_1, 1, 0, clk_sys_event,
847
SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
848
SND_SOC_DAPM_SUPPLY("TOCLK", WM8993_CLOCKING_1, 14, 0, NULL, 0),
849
SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8993_CLOCKING_3, 0, 0, NULL, 0),
850
SND_SOC_DAPM_SUPPLY("VMID", SND_SOC_NOPM, 0, 0, NULL, 0),
852
SND_SOC_DAPM_ADC("ADCL", NULL, WM8993_POWER_MANAGEMENT_2, 1, 0),
853
SND_SOC_DAPM_ADC("ADCR", NULL, WM8993_POWER_MANAGEMENT_2, 0, 0),
855
SND_SOC_DAPM_MUX("AIFOUTL Mux", SND_SOC_NOPM, 0, 0, &aifoutl_mux),
856
SND_SOC_DAPM_MUX("AIFOUTR Mux", SND_SOC_NOPM, 0, 0, &aifoutr_mux),
858
SND_SOC_DAPM_AIF_OUT("AIFOUTL", "Capture", 0, SND_SOC_NOPM, 0, 0),
859
SND_SOC_DAPM_AIF_OUT("AIFOUTR", "Capture", 1, SND_SOC_NOPM, 0, 0),
861
SND_SOC_DAPM_AIF_IN("AIFINL", "Playback", 0, SND_SOC_NOPM, 0, 0),
862
SND_SOC_DAPM_AIF_IN("AIFINR", "Playback", 1, SND_SOC_NOPM, 0, 0),
864
SND_SOC_DAPM_MUX("DACL Mux", SND_SOC_NOPM, 0, 0, &aifinl_mux),
865
SND_SOC_DAPM_MUX("DACR Mux", SND_SOC_NOPM, 0, 0, &aifinr_mux),
867
SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &sidetonel_mux),
868
SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &sidetoner_mux),
870
SND_SOC_DAPM_DAC("DACL", NULL, WM8993_POWER_MANAGEMENT_3, 1, 0),
871
SND_SOC_DAPM_DAC("DACR", NULL, WM8993_POWER_MANAGEMENT_3, 0, 0),
873
SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux),
874
SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux),
876
SND_SOC_DAPM_MIXER("SPKL", WM8993_POWER_MANAGEMENT_3, 8, 0,
877
left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
878
SND_SOC_DAPM_MIXER("SPKR", WM8993_POWER_MANAGEMENT_3, 9, 0,
879
right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
880
SND_SOC_DAPM_PGA("Direct Voice", SND_SOC_NOPM, 0, 0, NULL, 0),
883
static const struct snd_soc_dapm_route routes[] = {
884
{ "MICBIAS1", NULL, "VMID" },
885
{ "MICBIAS2", NULL, "VMID" },
887
{ "ADCL", NULL, "CLK_SYS" },
888
{ "ADCL", NULL, "CLK_DSP" },
889
{ "ADCR", NULL, "CLK_SYS" },
890
{ "ADCR", NULL, "CLK_DSP" },
892
{ "AIFOUTL Mux", "Left", "ADCL" },
893
{ "AIFOUTL Mux", "Right", "ADCR" },
894
{ "AIFOUTR Mux", "Left", "ADCL" },
895
{ "AIFOUTR Mux", "Right", "ADCR" },
897
{ "AIFOUTL", NULL, "AIFOUTL Mux" },
898
{ "AIFOUTR", NULL, "AIFOUTR Mux" },
900
{ "DACL Mux", "Left", "AIFINL" },
901
{ "DACL Mux", "Right", "AIFINR" },
902
{ "DACR Mux", "Left", "AIFINL" },
903
{ "DACR Mux", "Right", "AIFINR" },
905
{ "DACL Sidetone", "Left", "ADCL" },
906
{ "DACL Sidetone", "Right", "ADCR" },
907
{ "DACR Sidetone", "Left", "ADCL" },
908
{ "DACR Sidetone", "Right", "ADCR" },
910
{ "DACL", NULL, "CLK_SYS" },
911
{ "DACL", NULL, "CLK_DSP" },
912
{ "DACL", NULL, "DACL Mux" },
913
{ "DACL", NULL, "DACL Sidetone" },
914
{ "DACR", NULL, "CLK_SYS" },
915
{ "DACR", NULL, "CLK_DSP" },
916
{ "DACR", NULL, "DACR Mux" },
917
{ "DACR", NULL, "DACR Sidetone" },
919
{ "Left Output Mixer", "DAC Switch", "DACL" },
921
{ "Right Output Mixer", "DAC Switch", "DACR" },
923
{ "Left Output PGA", NULL, "CLK_SYS" },
925
{ "Right Output PGA", NULL, "CLK_SYS" },
927
{ "SPKL", "DAC Switch", "DACL" },
928
{ "SPKL", NULL, "CLK_SYS" },
930
{ "SPKR", "DAC Switch", "DACR" },
931
{ "SPKR", NULL, "CLK_SYS" },
933
{ "Left Headphone Mux", "DAC", "DACL" },
934
{ "Right Headphone Mux", "DAC", "DACR" },
937
static void wm8993_cache_restore(struct snd_soc_codec *codec)
939
u16 *cache = codec->reg_cache;
942
if (!codec->cache_sync)
945
/* Reenable hardware writes */
946
codec->cache_only = 0;
948
/* Restore the register settings */
949
for (i = 1; i < WM8993_MAX_REGISTER; i++) {
950
if (cache[i] == wm8993_reg_defaults[i])
952
snd_soc_write(codec, i, cache[i]);
955
/* We're in sync again */
956
codec->cache_sync = 0;
959
static int wm8993_set_bias_level(struct snd_soc_codec *codec,
960
enum snd_soc_bias_level level)
962
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
966
case SND_SOC_BIAS_ON:
967
case SND_SOC_BIAS_PREPARE:
969
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
970
WM8993_VMID_SEL_MASK, 0x2);
971
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
972
WM8993_TSHUT_ENA, WM8993_TSHUT_ENA);
975
case SND_SOC_BIAS_STANDBY:
976
if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
977
ret = regulator_bulk_enable(ARRAY_SIZE(wm8993->supplies),
982
wm8993_cache_restore(codec);
984
/* Tune DC servo configuration */
985
snd_soc_write(codec, 0x44, 3);
986
snd_soc_write(codec, 0x56, 3);
987
snd_soc_write(codec, 0x44, 0);
989
/* Bring up VMID with fast soft start */
990
snd_soc_update_bits(codec, WM8993_ANTIPOP2,
991
WM8993_STARTUP_BIAS_ENA |
992
WM8993_VMID_BUF_ENA |
993
WM8993_VMID_RAMP_MASK |
995
WM8993_STARTUP_BIAS_ENA |
996
WM8993_VMID_BUF_ENA |
997
WM8993_VMID_RAMP_MASK |
1000
/* If either line output is single ended we
1001
* need the VMID buffer */
1002
if (!wm8993->pdata.lineout1_diff ||
1003
!wm8993->pdata.lineout2_diff)
1004
snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1005
WM8993_LINEOUT_VMID_BUF_ENA,
1006
WM8993_LINEOUT_VMID_BUF_ENA);
1009
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1010
WM8993_VMID_SEL_MASK |
1012
WM8993_BIAS_ENA | 0x2);
1015
/* Switch to normal bias */
1016
snd_soc_update_bits(codec, WM8993_ANTIPOP2,
1018
WM8993_STARTUP_BIAS_ENA, 0);
1022
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1023
WM8993_VMID_SEL_MASK, 0x4);
1025
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_2,
1026
WM8993_TSHUT_ENA, 0);
1029
case SND_SOC_BIAS_OFF:
1030
snd_soc_update_bits(codec, WM8993_ANTIPOP1,
1031
WM8993_LINEOUT_VMID_BUF_ENA, 0);
1033
snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1,
1034
WM8993_VMID_SEL_MASK | WM8993_BIAS_ENA,
1037
snd_soc_update_bits(codec, WM8993_ANTIPOP2,
1038
WM8993_STARTUP_BIAS_ENA |
1039
WM8993_VMID_BUF_ENA |
1040
WM8993_VMID_RAMP_MASK |
1041
WM8993_BIAS_SRC, 0);
1043
#ifdef CONFIG_REGULATOR
1044
/* Post 2.6.34 we will be able to get a callback when
1045
* the regulators are disabled which we can use but
1046
* for now just assume that the power will be cut if
1047
* the regulator API is in use.
1049
codec->cache_sync = 1;
1052
regulator_bulk_disable(ARRAY_SIZE(wm8993->supplies),
1057
codec->dapm.bias_level = level;
1062
static int wm8993_set_sysclk(struct snd_soc_dai *codec_dai,
1063
int clk_id, unsigned int freq, int dir)
1065
struct snd_soc_codec *codec = codec_dai->codec;
1066
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1069
case WM8993_SYSCLK_MCLK:
1070
wm8993->mclk_rate = freq;
1071
case WM8993_SYSCLK_FLL:
1072
wm8993->sysclk_source = clk_id;
1082
static int wm8993_set_dai_fmt(struct snd_soc_dai *dai,
1085
struct snd_soc_codec *codec = dai->codec;
1086
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1087
unsigned int aif1 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_1);
1088
unsigned int aif4 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_4);
1090
aif1 &= ~(WM8993_BCLK_DIR | WM8993_AIF_BCLK_INV |
1091
WM8993_AIF_LRCLK_INV | WM8993_AIF_FMT_MASK);
1092
aif4 &= ~WM8993_LRCLK_DIR;
1094
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1095
case SND_SOC_DAIFMT_CBS_CFS:
1098
case SND_SOC_DAIFMT_CBS_CFM:
1099
aif4 |= WM8993_LRCLK_DIR;
1102
case SND_SOC_DAIFMT_CBM_CFS:
1103
aif1 |= WM8993_BCLK_DIR;
1106
case SND_SOC_DAIFMT_CBM_CFM:
1107
aif1 |= WM8993_BCLK_DIR;
1108
aif4 |= WM8993_LRCLK_DIR;
1115
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1116
case SND_SOC_DAIFMT_DSP_B:
1117
aif1 |= WM8993_AIF_LRCLK_INV;
1118
case SND_SOC_DAIFMT_DSP_A:
1121
case SND_SOC_DAIFMT_I2S:
1124
case SND_SOC_DAIFMT_RIGHT_J:
1126
case SND_SOC_DAIFMT_LEFT_J:
1133
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1134
case SND_SOC_DAIFMT_DSP_A:
1135
case SND_SOC_DAIFMT_DSP_B:
1136
/* frame inversion not valid for DSP modes */
1137
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1138
case SND_SOC_DAIFMT_NB_NF:
1140
case SND_SOC_DAIFMT_IB_NF:
1141
aif1 |= WM8993_AIF_BCLK_INV;
1148
case SND_SOC_DAIFMT_I2S:
1149
case SND_SOC_DAIFMT_RIGHT_J:
1150
case SND_SOC_DAIFMT_LEFT_J:
1151
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1152
case SND_SOC_DAIFMT_NB_NF:
1154
case SND_SOC_DAIFMT_IB_IF:
1155
aif1 |= WM8993_AIF_BCLK_INV | WM8993_AIF_LRCLK_INV;
1157
case SND_SOC_DAIFMT_IB_NF:
1158
aif1 |= WM8993_AIF_BCLK_INV;
1160
case SND_SOC_DAIFMT_NB_IF:
1161
aif1 |= WM8993_AIF_LRCLK_INV;
1171
snd_soc_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1172
snd_soc_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1177
static int wm8993_hw_params(struct snd_pcm_substream *substream,
1178
struct snd_pcm_hw_params *params,
1179
struct snd_soc_dai *dai)
1181
struct snd_soc_codec *codec = dai->codec;
1182
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1183
int ret, i, best, best_val, cur_val;
1184
unsigned int clocking1, clocking3, aif1, aif4;
1186
clocking1 = snd_soc_read(codec, WM8993_CLOCKING_1);
1187
clocking1 &= ~WM8993_BCLK_DIV_MASK;
1189
clocking3 = snd_soc_read(codec, WM8993_CLOCKING_3);
1190
clocking3 &= ~(WM8993_CLK_SYS_RATE_MASK | WM8993_SAMPLE_RATE_MASK);
1192
aif1 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_1);
1193
aif1 &= ~WM8993_AIF_WL_MASK;
1195
aif4 = snd_soc_read(codec, WM8993_AUDIO_INTERFACE_4);
1196
aif4 &= ~WM8993_LRCLK_RATE_MASK;
1198
/* What BCLK do we need? */
1199
wm8993->fs = params_rate(params);
1200
wm8993->bclk = 2 * wm8993->fs;
1201
if (wm8993->tdm_slots) {
1202
dev_dbg(codec->dev, "Configuring for %d %d bit TDM slots\n",
1203
wm8993->tdm_slots, wm8993->tdm_width);
1204
wm8993->bclk *= wm8993->tdm_width * wm8993->tdm_slots;
1206
switch (params_format(params)) {
1207
case SNDRV_PCM_FORMAT_S16_LE:
1210
case SNDRV_PCM_FORMAT_S20_3LE:
1214
case SNDRV_PCM_FORMAT_S24_LE:
1218
case SNDRV_PCM_FORMAT_S32_LE:
1227
dev_dbg(codec->dev, "Target BCLK is %dHz\n", wm8993->bclk);
1229
ret = configure_clock(codec);
1233
/* Select nearest CLK_SYS_RATE */
1235
best_val = abs((wm8993->sysclk_rate / clk_sys_rates[0].ratio)
1237
for (i = 1; i < ARRAY_SIZE(clk_sys_rates); i++) {
1238
cur_val = abs((wm8993->sysclk_rate /
1239
clk_sys_rates[i].ratio) - wm8993->fs);
1240
if (cur_val < best_val) {
1245
dev_dbg(codec->dev, "Selected CLK_SYS_RATIO of %d\n",
1246
clk_sys_rates[best].ratio);
1247
clocking3 |= (clk_sys_rates[best].clk_sys_rate
1248
<< WM8993_CLK_SYS_RATE_SHIFT);
1252
best_val = abs(wm8993->fs - sample_rates[0].rate);
1253
for (i = 1; i < ARRAY_SIZE(sample_rates); i++) {
1255
cur_val = abs(wm8993->fs - sample_rates[i].rate);
1256
if (cur_val < best_val) {
1261
dev_dbg(codec->dev, "Selected SAMPLE_RATE of %dHz\n",
1262
sample_rates[best].rate);
1263
clocking3 |= (sample_rates[best].sample_rate
1264
<< WM8993_SAMPLE_RATE_SHIFT);
1269
for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
1270
cur_val = ((wm8993->sysclk_rate * 10) / bclk_divs[i].div)
1272
if (cur_val < 0) /* Table is sorted */
1274
if (cur_val < best_val) {
1279
wm8993->bclk = (wm8993->sysclk_rate * 10) / bclk_divs[best].div;
1280
dev_dbg(codec->dev, "Selected BCLK_DIV of %d for %dHz BCLK\n",
1281
bclk_divs[best].div, wm8993->bclk);
1282
clocking1 |= bclk_divs[best].bclk_div << WM8993_BCLK_DIV_SHIFT;
1284
/* LRCLK is a simple fraction of BCLK */
1285
dev_dbg(codec->dev, "LRCLK_RATE is %d\n", wm8993->bclk / wm8993->fs);
1286
aif4 |= wm8993->bclk / wm8993->fs;
1288
snd_soc_write(codec, WM8993_CLOCKING_1, clocking1);
1289
snd_soc_write(codec, WM8993_CLOCKING_3, clocking3);
1290
snd_soc_write(codec, WM8993_AUDIO_INTERFACE_1, aif1);
1291
snd_soc_write(codec, WM8993_AUDIO_INTERFACE_4, aif4);
1293
/* ReTune Mobile? */
1294
if (wm8993->pdata.num_retune_configs) {
1295
u16 eq1 = snd_soc_read(codec, WM8993_EQ1);
1296
struct wm8993_retune_mobile_setting *s;
1299
best_val = abs(wm8993->pdata.retune_configs[0].rate
1301
for (i = 0; i < wm8993->pdata.num_retune_configs; i++) {
1302
cur_val = abs(wm8993->pdata.retune_configs[i].rate
1304
if (cur_val < best_val) {
1309
s = &wm8993->pdata.retune_configs[best];
1311
dev_dbg(codec->dev, "ReTune Mobile %s tuned for %dHz\n",
1314
/* Disable EQ while we reconfigure */
1315
snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, 0);
1317
for (i = 1; i < ARRAY_SIZE(s->config); i++)
1318
snd_soc_write(codec, WM8993_EQ1 + i, s->config[i]);
1320
snd_soc_update_bits(codec, WM8993_EQ1, WM8993_EQ_ENA, eq1);
1326
static int wm8993_digital_mute(struct snd_soc_dai *codec_dai, int mute)
1328
struct snd_soc_codec *codec = codec_dai->codec;
1331
reg = snd_soc_read(codec, WM8993_DAC_CTRL);
1334
reg |= WM8993_DAC_MUTE;
1336
reg &= ~WM8993_DAC_MUTE;
1338
snd_soc_write(codec, WM8993_DAC_CTRL, reg);
1343
static int wm8993_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1344
unsigned int rx_mask, int slots, int slot_width)
1346
struct snd_soc_codec *codec = dai->codec;
1347
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1351
/* Don't need to validate anything if we're turning off TDM */
1353
wm8993->tdm_slots = 0;
1357
/* Note that we allow configurations we can't handle ourselves -
1358
* for example, we can generate clocks for slots 2 and up even if
1359
* we can't use those slots ourselves.
1361
aif1 |= WM8993_AIFADC_TDM;
1362
aif2 |= WM8993_AIFDAC_TDM;
1368
aif1 |= WM8993_AIFADC_TDM_CHAN;
1379
aif2 |= WM8993_AIFDAC_TDM_CHAN;
1386
wm8993->tdm_width = slot_width;
1387
wm8993->tdm_slots = slots / 2;
1389
snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_1,
1390
WM8993_AIFADC_TDM | WM8993_AIFADC_TDM_CHAN, aif1);
1391
snd_soc_update_bits(codec, WM8993_AUDIO_INTERFACE_2,
1392
WM8993_AIFDAC_TDM | WM8993_AIFDAC_TDM_CHAN, aif2);
1397
static struct snd_soc_dai_ops wm8993_ops = {
1398
.set_sysclk = wm8993_set_sysclk,
1399
.set_fmt = wm8993_set_dai_fmt,
1400
.hw_params = wm8993_hw_params,
1401
.digital_mute = wm8993_digital_mute,
1402
.set_pll = wm8993_set_fll,
1403
.set_tdm_slot = wm8993_set_tdm_slot,
1406
#define WM8993_RATES SNDRV_PCM_RATE_8000_48000
1408
#define WM8993_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1409
SNDRV_PCM_FMTBIT_S20_3LE |\
1410
SNDRV_PCM_FMTBIT_S24_LE |\
1411
SNDRV_PCM_FMTBIT_S32_LE)
1413
static struct snd_soc_dai_driver wm8993_dai = {
1414
.name = "wm8993-hifi",
1416
.stream_name = "Playback",
1419
.rates = WM8993_RATES,
1420
.formats = WM8993_FORMATS,
1423
.stream_name = "Capture",
1426
.rates = WM8993_RATES,
1427
.formats = WM8993_FORMATS,
1430
.symmetric_rates = 1,
1433
static int wm8993_probe(struct snd_soc_codec *codec)
1435
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1436
struct snd_soc_dapm_context *dapm = &codec->dapm;
1439
wm8993->hubs_data.hp_startup_mode = 1;
1440
wm8993->hubs_data.dcs_codes_l = -2;
1441
wm8993->hubs_data.dcs_codes_r = -2;
1442
wm8993->hubs_data.series_startup = 1;
1444
ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
1446
dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1450
for (i = 0; i < ARRAY_SIZE(wm8993->supplies); i++)
1451
wm8993->supplies[i].supply = wm8993_supply_names[i];
1453
ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8993->supplies),
1456
dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
1460
ret = regulator_bulk_enable(ARRAY_SIZE(wm8993->supplies),
1463
dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
1467
val = snd_soc_read(codec, WM8993_SOFTWARE_RESET);
1468
if (val != wm8993_reg_defaults[WM8993_SOFTWARE_RESET]) {
1469
dev_err(codec->dev, "Invalid ID register value %x\n", val);
1474
ret = snd_soc_write(codec, WM8993_SOFTWARE_RESET, 0xffff);
1478
codec->cache_only = 1;
1480
/* By default we're using the output mixers */
1481
wm8993->class_w_users = 2;
1483
/* Latch volume update bits and default ZC on */
1484
snd_soc_update_bits(codec, WM8993_RIGHT_DAC_DIGITAL_VOLUME,
1485
WM8993_DAC_VU, WM8993_DAC_VU);
1486
snd_soc_update_bits(codec, WM8993_RIGHT_ADC_DIGITAL_VOLUME,
1487
WM8993_ADC_VU, WM8993_ADC_VU);
1489
/* Manualy manage the HPOUT sequencing for independent stereo
1491
snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0,
1492
WM8993_HPOUT1_AUTO_PU, 0);
1494
/* Use automatic clock configuration */
1495
snd_soc_update_bits(codec, WM8993_CLOCKING_4, WM8993_SR_MODE, 0);
1497
wm_hubs_handle_analogue_pdata(codec, wm8993->pdata.lineout1_diff,
1498
wm8993->pdata.lineout2_diff,
1499
wm8993->pdata.lineout1fb,
1500
wm8993->pdata.lineout2fb,
1501
wm8993->pdata.jd_scthr,
1502
wm8993->pdata.jd_thr,
1503
wm8993->pdata.micbias1_lvl,
1504
wm8993->pdata.micbias2_lvl);
1506
ret = wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1510
snd_soc_add_controls(codec, wm8993_snd_controls,
1511
ARRAY_SIZE(wm8993_snd_controls));
1512
if (wm8993->pdata.num_retune_configs != 0) {
1513
dev_dbg(codec->dev, "Using ReTune Mobile\n");
1515
dev_dbg(codec->dev, "No ReTune Mobile, using normal EQ\n");
1516
snd_soc_add_controls(codec, wm8993_eq_controls,
1517
ARRAY_SIZE(wm8993_eq_controls));
1520
snd_soc_dapm_new_controls(dapm, wm8993_dapm_widgets,
1521
ARRAY_SIZE(wm8993_dapm_widgets));
1522
wm_hubs_add_analogue_controls(codec);
1524
snd_soc_dapm_add_routes(dapm, routes, ARRAY_SIZE(routes));
1525
wm_hubs_add_analogue_routes(codec, wm8993->pdata.lineout1_diff,
1526
wm8993->pdata.lineout2_diff);
1531
regulator_bulk_disable(ARRAY_SIZE(wm8993->supplies), wm8993->supplies);
1533
regulator_bulk_free(ARRAY_SIZE(wm8993->supplies), wm8993->supplies);
1537
static int wm8993_remove(struct snd_soc_codec *codec)
1539
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1541
wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1542
regulator_bulk_free(ARRAY_SIZE(wm8993->supplies), wm8993->supplies);
1547
static int wm8993_suspend(struct snd_soc_codec *codec, pm_message_t state)
1549
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1550
int fll_fout = wm8993->fll_fout;
1551
int fll_fref = wm8993->fll_fref;
1554
/* Stop the FLL in an orderly fashion */
1555
ret = _wm8993_set_fll(codec, 0, 0, 0, 0);
1557
dev_err(codec->dev, "Failed to stop FLL\n");
1561
wm8993->fll_fout = fll_fout;
1562
wm8993->fll_fref = fll_fref;
1564
wm8993_set_bias_level(codec, SND_SOC_BIAS_OFF);
1569
static int wm8993_resume(struct snd_soc_codec *codec)
1571
struct wm8993_priv *wm8993 = snd_soc_codec_get_drvdata(codec);
1574
wm8993_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1576
/* Restart the FLL? */
1577
if (wm8993->fll_fout) {
1578
int fll_fout = wm8993->fll_fout;
1579
int fll_fref = wm8993->fll_fref;
1581
wm8993->fll_fref = 0;
1582
wm8993->fll_fout = 0;
1584
ret = _wm8993_set_fll(codec, 0, wm8993->fll_src,
1585
fll_fref, fll_fout);
1587
dev_err(codec->dev, "Failed to restart FLL\n");
1593
#define wm8993_suspend NULL
1594
#define wm8993_resume NULL
1597
static struct snd_soc_codec_driver soc_codec_dev_wm8993 = {
1598
.probe = wm8993_probe,
1599
.remove = wm8993_remove,
1600
.suspend = wm8993_suspend,
1601
.resume = wm8993_resume,
1602
.set_bias_level = wm8993_set_bias_level,
1603
.reg_cache_size = ARRAY_SIZE(wm8993_reg_defaults),
1604
.reg_word_size = sizeof(u16),
1605
.reg_cache_default = wm8993_reg_defaults,
1606
.volatile_register = wm8993_volatile,
1609
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1610
static __devinit int wm8993_i2c_probe(struct i2c_client *i2c,
1611
const struct i2c_device_id *id)
1613
struct wm8993_priv *wm8993;
1616
wm8993 = kzalloc(sizeof(struct wm8993_priv), GFP_KERNEL);
1620
i2c_set_clientdata(i2c, wm8993);
1622
ret = snd_soc_register_codec(&i2c->dev,
1623
&soc_codec_dev_wm8993, &wm8993_dai, 1);
1629
static __devexit int wm8993_i2c_remove(struct i2c_client *client)
1631
snd_soc_unregister_codec(&client->dev);
1632
kfree(i2c_get_clientdata(client));
1636
static const struct i2c_device_id wm8993_i2c_id[] = {
1640
MODULE_DEVICE_TABLE(i2c, wm8993_i2c_id);
1642
static struct i2c_driver wm8993_i2c_driver = {
1644
.name = "wm8993-codec",
1645
.owner = THIS_MODULE,
1647
.probe = wm8993_i2c_probe,
1648
.remove = __devexit_p(wm8993_i2c_remove),
1649
.id_table = wm8993_i2c_id,
1653
static int __init wm8993_modinit(void)
1656
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1657
ret = i2c_add_driver(&wm8993_i2c_driver);
1659
pr_err("WM8993: Unable to register I2C driver: %d\n",
1665
module_init(wm8993_modinit);
1667
static void __exit wm8993_exit(void)
1669
#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1670
i2c_del_driver(&wm8993_i2c_driver);
1673
module_exit(wm8993_exit);
1676
MODULE_DESCRIPTION("ASoC WM8993 driver");
1677
MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
1678
MODULE_LICENSE("GPL");