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* SBC8349E Device Tree Source
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* Copyright 2007 Wind River Inc.
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* Paul Gortmaker (see MAINTAINERS for contact information)
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* -based largely on the Freescale MPC834x_MDS dts.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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compatible = "SBC834xE";
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d-cache-line-size = <32>;
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i-cache-line-size = <32>;
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d-cache-size = <32768>;
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i-cache-size = <32768>;
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timebase-frequency = <0>; // from bootloader
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bus-frequency = <0>; // from bootloader
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clock-frequency = <0>; // from bootloader
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device_type = "memory";
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reg = <0x00000000 0x10000000>; // 256MB at 0
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ranges = <0x0 0xe0000000 0x00100000>;
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reg = <0xe0000000 0x00000200>;
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compatible = "mpc83xx_wdt";
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compatible = "fsl-i2c";
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interrupts = <14 0x8>;
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interrupt-parent = <&ipic>;
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compatible = "fsl-i2c";
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interrupts = <15 0x8>;
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interrupt-parent = <&ipic>;
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compatible = "fsl,spi";
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reg = <0x7000 0x1000>;
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interrupts = <16 0x8>;
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interrupt-parent = <&ipic>;
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compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
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ranges = <0 0x8100 0x1a8>;
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interrupt-parent = <&ipic>;
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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interrupt-parent = <&ipic>;
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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interrupt-parent = <&ipic>;
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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interrupt-parent = <&ipic>;
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compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
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interrupt-parent = <&ipic>;
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/* phy type (ULPI or SERIAL) are only types supported for MPH */
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compatible = "fsl-usb2-mph";
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reg = <0x22000 0x1000>;
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#address-cells = <1>;
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interrupt-parent = <&ipic>;
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interrupts = <39 0x8>;
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enet0: ethernet@24000 {
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#address-cells = <1>;
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device_type = "network";
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compatible = "gianfar";
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reg = <0x24000 0x1000>;
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ranges = <0x0 0x24000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <32 0x8 33 0x8 34 0x8>;
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interrupt-parent = <&ipic>;
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tbi-handle = <&tbi0>;
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phy-handle = <&phy0>;
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linux,network-index = <0>;
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#address-cells = <1>;
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compatible = "fsl,gianfar-mdio";
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phy0: ethernet-phy@19 {
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interrupt-parent = <&ipic>;
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interrupts = <20 0x8>;
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device_type = "ethernet-phy";
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phy1: ethernet-phy@1a {
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interrupt-parent = <&ipic>;
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interrupts = <21 0x8>;
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device_type = "ethernet-phy";
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device_type = "tbi-phy";
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enet1: ethernet@25000 {
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#address-cells = <1>;
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device_type = "network";
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compatible = "gianfar";
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reg = <0x25000 0x1000>;
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ranges = <0x0 0x25000 0x1000>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <35 0x8 36 0x8 37 0x8>;
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interrupt-parent = <&ipic>;
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tbi-handle = <&tbi1>;
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phy-handle = <&phy1>;
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linux,network-index = <1>;
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#address-cells = <1>;
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compatible = "fsl,gianfar-tbi";
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device_type = "tbi-phy";
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serial0: serial@4500 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4500 0x100>;
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clock-frequency = <0>;
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interrupts = <9 0x8>;
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interrupt-parent = <&ipic>;
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serial1: serial@4600 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0x4600 0x100>;
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clock-frequency = <0>;
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interrupts = <10 0x8>;
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interrupt-parent = <&ipic>;
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compatible = "fsl,sec2.0";
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reg = <0x30000 0x10000>;
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interrupts = <11 0x8>;
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interrupt-parent = <&ipic>;
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fsl,num-channels = <4>;
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fsl,channel-fifo-len = <24>;
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fsl,exec-units-mask = <0x7e>;
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fsl,descriptor-types-mask = <0x01010ebf>;
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* interrupts cell = <intr #, sense>
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* sense values match linux IORESOURCE_IRQ_* defines:
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* sense == 8: Level, low assertion
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* sense == 2: Edge, high-to-low change
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <2>;
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device_type = "ipic";
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#address-cells = <2>;
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compatible = "fsl,mpc8349-localbus", "simple-bus";
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reg = <0xe0005000 0x1000>;
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interrupts = <77 0x8>;
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interrupt-parent = <&ipic>;
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ranges = <0x0 0x0 0xff800000 0x00800000 /* 8MB Flash */
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0x1 0x0 0xf8000000 0x00002000 /* 8KB EEPROM */
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0x2 0x0 0x10000000 0x04000000 /* 64MB SDRAM */
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0x3 0x0 0x10000000 0x04000000>; /* 64MB SDRAM */
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#address-cells = <1>;
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compatible = "intel,28F640J3A", "cfi-flash";
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reg = <0x0 0x0 0x800000>;
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reg = <0x00000000 0x00040000>;
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reg = <0x00040000 0x006c0000>;
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label = "legacy u-boot";
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reg = <0x00700000 0x00100000>;
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interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
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0x8800 0x0 0x0 0x1 &ipic 48 0x8
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0x8800 0x0 0x0 0x2 &ipic 17 0x8
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0x8800 0x0 0x0 0x3 &ipic 18 0x8
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0x8800 0x0 0x0 0x4 &ipic 19 0x8>;
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interrupt-parent = <&ipic>;
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interrupts = <0x42 0x8>;
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ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
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0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
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0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
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clock-frequency = <66666666>;
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#interrupt-cells = <1>;
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#address-cells = <3>;
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reg = <0xe0008500 0x100 /* internal registers */
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0xe0008300 0x8>; /* config space access registers */
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compatible = "fsl,mpc8349-pci";