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************************************************************************************************************************
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* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE
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***********************************************************************************************************************/
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#if !defined (__SI_GB_REG_H__)
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#define __SI_GB_REG_H__
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/*****************************************************************************************************************
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* Register Spec Release: Chip Spec 0.28
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*****************************************************************************************************************/
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// Make sure the necessary endian defines are there.
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#if defined(LITTLEENDIAN_CPU)
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#elif defined(BIGENDIAN_CPU)
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#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
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* GB_ADDR_CONFIG struct
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#if defined(LITTLEENDIAN_CPU)
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typedef struct _GB_ADDR_CONFIG_T {
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unsigned int num_pipes : 3;
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unsigned int pipe_interleave_size : 3;
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unsigned int bank_interleave_size : 3;
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unsigned int num_shader_engines : 2;
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unsigned int shader_engine_tile_size : 3;
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unsigned int num_gpus : 3;
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unsigned int multi_gpu_tile_size : 2;
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unsigned int row_size : 2;
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unsigned int num_lower_pipes : 1;
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#elif defined(BIGENDIAN_CPU)
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typedef struct _GB_ADDR_CONFIG_T {
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unsigned int num_lower_pipes : 1;
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unsigned int row_size : 2;
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unsigned int multi_gpu_tile_size : 2;
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unsigned int num_gpus : 3;
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unsigned int shader_engine_tile_size : 3;
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unsigned int num_shader_engines : 2;
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unsigned int bank_interleave_size : 3;
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unsigned int pipe_interleave_size : 3;
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unsigned int num_pipes : 3;
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unsigned int val : 32;
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#if defined(LITTLEENDIAN_CPU)
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typedef struct _GB_TILE_MODE_T {
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unsigned int micro_tile_mode : 2;
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unsigned int array_mode : 4;
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unsigned int pipe_config : 5;
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unsigned int tile_split : 3;
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unsigned int bank_width : 2;
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unsigned int bank_height : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int num_banks : 2;
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unsigned int micro_tile_mode_new : 3;
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unsigned int sample_split : 2;
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unsigned int alt_pipe_config : 5;
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typedef struct _GB_MACROTILE_MODE_T {
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unsigned int bank_width : 2;
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unsigned int bank_height : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int num_banks : 2;
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unsigned int alt_bank_height : 2;
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unsigned int alt_macro_tile_aspect : 2;
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unsigned int alt_num_banks : 2;
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} GB_MACROTILE_MODE_T;
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#elif defined(BIGENDIAN_CPU)
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typedef struct _GB_TILE_MODE_T {
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unsigned int alt_pipe_config : 5;
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unsigned int sample_split : 2;
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unsigned int micro_tile_mode_new : 3;
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unsigned int num_banks : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int bank_height : 2;
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unsigned int bank_width : 2;
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unsigned int tile_split : 3;
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unsigned int pipe_config : 5;
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unsigned int array_mode : 4;
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unsigned int micro_tile_mode : 2;
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typedef struct _GB_MACROTILE_MODE_T {
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unsigned int alt_num_banks : 2;
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unsigned int alt_macro_tile_aspect : 2;
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unsigned int alt_bank_height : 2;
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unsigned int num_banks : 2;
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unsigned int macro_tile_aspect : 2;
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unsigned int bank_height : 2;
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unsigned int bank_width : 2;
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} GB_MACROTILE_MODE_T;
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unsigned int val : 32;
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unsigned int val : 32;
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GB_MACROTILE_MODE_T f;