2
* Copyright © 2014 Connor Abbott
4
* Permission is hereby granted, free of charge, to any person obtaining a
5
* copy of this software and associated documentation files (the "Software"),
6
* to deal in the Software without restriction, including without limitation
7
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
* and/or sell copies of the Software, and to permit persons to whom the
9
* Software is furnished to do so, subject to the following conditions:
11
* The above copyright notice and this permission notice (including the next
12
* paragraph) shall be included in all copies or substantial portions of the
15
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24
#include "nir_instr_set.h"
26
#include "util/half_float.h"
29
src_is_ssa(nir_src *src, void *data)
36
dest_is_ssa(nir_dest *dest, void *data)
42
ASSERTED static inline bool
43
instr_each_src_and_dest_is_ssa(const nir_instr *instr)
45
if (!nir_foreach_dest((nir_instr *)instr, dest_is_ssa, NULL) ||
46
!nir_foreach_src((nir_instr *)instr, src_is_ssa, NULL))
52
/* This function determines if uses of an instruction can safely be rewritten
53
* to use another identical instruction instead. Note that this function must
54
* be kept in sync with hash_instr() and nir_instrs_equal() -- only
55
* instructions that pass this test will be handed on to those functions, and
56
* conversely they must handle everything that this function returns true for.
59
instr_can_rewrite(const nir_instr *instr)
61
/* We only handle SSA. */
62
assert(instr_each_src_and_dest_is_ssa(instr));
64
switch (instr->type) {
65
case nir_instr_type_alu:
66
case nir_instr_type_deref:
67
case nir_instr_type_tex:
68
case nir_instr_type_load_const:
69
case nir_instr_type_phi:
71
case nir_instr_type_intrinsic:
72
return nir_intrinsic_can_reorder(nir_instr_as_intrinsic(instr));
73
case nir_instr_type_call:
74
case nir_instr_type_jump:
75
case nir_instr_type_ssa_undef:
77
case nir_instr_type_parallel_copy:
79
unreachable("Invalid instruction type");
86
#define HASH(hash, data) XXH32(&(data), sizeof(data), hash)
89
hash_src(uint32_t hash, const nir_src *src)
92
hash = HASH(hash, src->ssa);
97
hash_alu_src(uint32_t hash, const nir_alu_src *src, unsigned num_components)
99
hash = HASH(hash, src->abs);
100
hash = HASH(hash, src->negate);
102
for (unsigned i = 0; i < num_components; i++)
103
hash = HASH(hash, src->swizzle[i]);
105
hash = hash_src(hash, &src->src);
110
hash_alu(uint32_t hash, const nir_alu_instr *instr)
112
hash = HASH(hash, instr->op);
114
/* We explicitly don't hash instr->exact. */
115
uint8_t flags = instr->no_signed_wrap |
116
instr->no_unsigned_wrap << 1;
117
hash = HASH(hash, flags);
119
hash = HASH(hash, instr->dest.dest.ssa.num_components);
120
hash = HASH(hash, instr->dest.dest.ssa.bit_size);
122
if (nir_op_infos[instr->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
123
assert(nir_op_infos[instr->op].num_inputs >= 2);
125
uint32_t hash0 = hash_alu_src(hash, &instr->src[0],
126
nir_ssa_alu_instr_src_components(instr, 0));
127
uint32_t hash1 = hash_alu_src(hash, &instr->src[1],
128
nir_ssa_alu_instr_src_components(instr, 1));
129
/* For commutative operations, we need some commutative way of
130
* combining the hashes. One option would be to XOR them but that
131
* means that anything with two identical sources will hash to 0 and
132
* that's common enough we probably don't want the guaranteed
133
* collision. Either addition or multiplication will also work.
135
hash = hash0 * hash1;
137
for (unsigned i = 2; i < nir_op_infos[instr->op].num_inputs; i++) {
138
hash = hash_alu_src(hash, &instr->src[i],
139
nir_ssa_alu_instr_src_components(instr, i));
142
for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++) {
143
hash = hash_alu_src(hash, &instr->src[i],
144
nir_ssa_alu_instr_src_components(instr, i));
152
hash_deref(uint32_t hash, const nir_deref_instr *instr)
154
hash = HASH(hash, instr->deref_type);
155
hash = HASH(hash, instr->modes);
156
hash = HASH(hash, instr->type);
158
if (instr->deref_type == nir_deref_type_var)
159
return HASH(hash, instr->var);
161
hash = hash_src(hash, &instr->parent);
163
switch (instr->deref_type) {
164
case nir_deref_type_struct:
165
hash = HASH(hash, instr->strct.index);
168
case nir_deref_type_array:
169
case nir_deref_type_ptr_as_array:
170
hash = hash_src(hash, &instr->arr.index);
173
case nir_deref_type_cast:
174
hash = HASH(hash, instr->cast.ptr_stride);
175
hash = HASH(hash, instr->cast.align_mul);
176
hash = HASH(hash, instr->cast.align_offset);
179
case nir_deref_type_var:
180
case nir_deref_type_array_wildcard:
185
unreachable("Invalid instruction deref type");
192
hash_load_const(uint32_t hash, const nir_load_const_instr *instr)
194
hash = HASH(hash, instr->def.num_components);
196
if (instr->def.bit_size == 1) {
197
for (unsigned i = 0; i < instr->def.num_components; i++) {
198
uint8_t b = instr->value[i].b;
199
hash = HASH(hash, b);
202
unsigned size = instr->def.num_components * sizeof(*instr->value);
203
hash = XXH32(instr->value, size, hash);
210
cmp_phi_src(const void *data1, const void *data2)
212
nir_phi_src *src1 = *(nir_phi_src **)data1;
213
nir_phi_src *src2 = *(nir_phi_src **)data2;
214
return src1->pred - src2->pred;
218
hash_phi(uint32_t hash, const nir_phi_instr *instr)
220
hash = HASH(hash, instr->instr.block);
222
/* sort sources by predecessor, since the order shouldn't matter */
223
unsigned num_preds = instr->instr.block->predecessors->entries;
224
NIR_VLA(nir_phi_src *, srcs, num_preds);
226
nir_foreach_phi_src(src, instr) {
230
qsort(srcs, num_preds, sizeof(nir_phi_src *), cmp_phi_src);
232
for (i = 0; i < num_preds; i++) {
233
hash = hash_src(hash, &srcs[i]->src);
234
hash = HASH(hash, srcs[i]->pred);
241
hash_intrinsic(uint32_t hash, const nir_intrinsic_instr *instr)
243
const nir_intrinsic_info *info = &nir_intrinsic_infos[instr->intrinsic];
244
hash = HASH(hash, instr->intrinsic);
246
if (info->has_dest) {
247
hash = HASH(hash, instr->dest.ssa.num_components);
248
hash = HASH(hash, instr->dest.ssa.bit_size);
251
hash = XXH32(instr->const_index, info->num_indices * sizeof(instr->const_index[0]), hash);
253
for (unsigned i = 0; i < nir_intrinsic_infos[instr->intrinsic].num_srcs; i++)
254
hash = hash_src(hash, &instr->src[i]);
260
hash_tex(uint32_t hash, const nir_tex_instr *instr)
262
hash = HASH(hash, instr->op);
263
hash = HASH(hash, instr->num_srcs);
265
for (unsigned i = 0; i < instr->num_srcs; i++) {
266
hash = HASH(hash, instr->src[i].src_type);
267
hash = hash_src(hash, &instr->src[i].src);
270
hash = HASH(hash, instr->coord_components);
271
hash = HASH(hash, instr->sampler_dim);
272
hash = HASH(hash, instr->is_array);
273
hash = HASH(hash, instr->is_shadow);
274
hash = HASH(hash, instr->is_new_style_shadow);
275
hash = HASH(hash, instr->is_sparse);
276
unsigned component = instr->component;
277
hash = HASH(hash, component);
278
for (unsigned i = 0; i < 4; ++i)
279
for (unsigned j = 0; j < 2; ++j)
280
hash = HASH(hash, instr->tg4_offsets[i][j]);
281
hash = HASH(hash, instr->texture_index);
282
hash = HASH(hash, instr->sampler_index);
283
hash = HASH(hash, instr->texture_non_uniform);
284
hash = HASH(hash, instr->sampler_non_uniform);
289
/* Computes a hash of an instruction for use in a hash table. Note that this
290
* will only work for instructions where instr_can_rewrite() returns true, and
291
* it should return identical hashes for two instructions that are the same
292
* according nir_instrs_equal().
296
hash_instr(const void *data)
298
const nir_instr *instr = data;
301
switch (instr->type) {
302
case nir_instr_type_alu:
303
hash = hash_alu(hash, nir_instr_as_alu(instr));
305
case nir_instr_type_deref:
306
hash = hash_deref(hash, nir_instr_as_deref(instr));
308
case nir_instr_type_load_const:
309
hash = hash_load_const(hash, nir_instr_as_load_const(instr));
311
case nir_instr_type_phi:
312
hash = hash_phi(hash, nir_instr_as_phi(instr));
314
case nir_instr_type_intrinsic:
315
hash = hash_intrinsic(hash, nir_instr_as_intrinsic(instr));
317
case nir_instr_type_tex:
318
hash = hash_tex(hash, nir_instr_as_tex(instr));
321
unreachable("Invalid instruction type");
328
nir_srcs_equal(nir_src src1, nir_src src2)
332
return src1.ssa == src2.ssa;
340
if ((src1.reg.indirect == NULL) != (src2.reg.indirect == NULL))
343
if (src1.reg.indirect) {
344
if (!nir_srcs_equal(*src1.reg.indirect, *src2.reg.indirect))
348
return src1.reg.reg == src2.reg.reg &&
349
src1.reg.base_offset == src2.reg.base_offset;
355
* If the \p s is an SSA value that was generated by a negation instruction,
356
* that instruction is returned as a \c nir_alu_instr. Otherwise \c NULL is
359
static nir_alu_instr *
360
get_neg_instr(nir_src s)
362
nir_alu_instr *alu = nir_src_as_alu_instr(s);
364
return alu != NULL && (alu->op == nir_op_fneg || alu->op == nir_op_ineg)
369
nir_const_value_negative_equal(nir_const_value c1,
371
nir_alu_type full_type)
373
assert(nir_alu_type_get_base_type(full_type) != nir_type_invalid);
374
assert(nir_alu_type_get_type_size(full_type) != 0);
377
case nir_type_float16:
378
return _mesa_half_to_float(c1.u16) == -_mesa_half_to_float(c2.u16);
380
case nir_type_float32:
381
return c1.f32 == -c2.f32;
383
case nir_type_float64:
384
return c1.f64 == -c2.f64;
388
return c1.i8 == -c2.i8;
391
case nir_type_uint16:
392
return c1.i16 == -c2.i16;
395
case nir_type_uint32:
396
return c1.i32 == -c2.i32;
399
case nir_type_uint64:
400
return c1.i64 == -c2.i64;
410
* Shallow compare of ALU srcs to determine if one is the negation of the other
412
* This function detects cases where \p alu1 is a constant and \p alu2 is a
413
* constant that is its negation. It will also detect cases where \p alu2 is
414
* an SSA value that is a \c nir_op_fneg applied to \p alu1 (and vice versa).
416
* This function does not detect the general case when \p alu1 and \p alu2 are
417
* SSA values that are the negations of each other (e.g., \p alu1 represents
418
* (a * b) and \p alu2 represents (-a * b)).
421
* It is the responsibility of the caller to ensure that the component counts,
422
* write masks, and base types of the sources being compared are compatible.
425
nir_alu_srcs_negative_equal(const nir_alu_instr *alu1,
426
const nir_alu_instr *alu2,
427
unsigned src1, unsigned src2)
430
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
431
assert(nir_alu_instr_channel_used(alu1, src1, i) ==
432
nir_alu_instr_channel_used(alu2, src2, i));
435
if (nir_alu_type_get_base_type(nir_op_infos[alu1->op].input_types[src1]) == nir_type_float) {
436
assert(nir_op_infos[alu1->op].input_types[src1] ==
437
nir_op_infos[alu2->op].input_types[src2]);
439
assert(nir_op_infos[alu1->op].input_types[src1] == nir_type_int);
440
assert(nir_op_infos[alu2->op].input_types[src2] == nir_type_int);
444
if (alu1->src[src1].abs != alu2->src[src2].abs)
447
bool parity = alu1->src[src1].negate != alu2->src[src2].negate;
449
/* Handling load_const instructions is tricky. */
451
const nir_const_value *const const1 =
452
nir_src_as_const_value(alu1->src[src1].src);
454
if (const1 != NULL) {
455
/* Assume that constant folding will eliminate source mods and unary
461
const nir_const_value *const const2 =
462
nir_src_as_const_value(alu2->src[src2].src);
467
if (nir_src_bit_size(alu1->src[src1].src) !=
468
nir_src_bit_size(alu2->src[src2].src))
471
const nir_alu_type full_type = nir_op_infos[alu1->op].input_types[src1] |
472
nir_src_bit_size(alu1->src[src1].src);
473
for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
474
if (nir_alu_instr_channel_used(alu1, src1, i) &&
475
!nir_const_value_negative_equal(const1[alu1->src[src1].swizzle[i]],
476
const2[alu2->src[src2].swizzle[i]],
484
uint8_t alu1_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
485
nir_src alu1_actual_src;
486
nir_alu_instr *neg1 = get_neg_instr(alu1->src[src1].src);
490
alu1_actual_src = neg1->src[0].src;
492
for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg1, 0); i++)
493
alu1_swizzle[i] = neg1->src[0].swizzle[i];
495
alu1_actual_src = alu1->src[src1].src;
497
for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++)
501
uint8_t alu2_swizzle[NIR_MAX_VEC_COMPONENTS] = {0};
502
nir_src alu2_actual_src;
503
nir_alu_instr *neg2 = get_neg_instr(alu2->src[src2].src);
507
alu2_actual_src = neg2->src[0].src;
509
for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(neg2, 0); i++)
510
alu2_swizzle[i] = neg2->src[0].swizzle[i];
512
alu2_actual_src = alu2->src[src2].src;
514
for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu2, src2); i++)
518
for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
519
if (alu1_swizzle[alu1->src[src1].swizzle[i]] !=
520
alu2_swizzle[alu2->src[src2].swizzle[i]])
524
return parity && nir_srcs_equal(alu1_actual_src, alu2_actual_src);
528
nir_alu_srcs_equal(const nir_alu_instr *alu1, const nir_alu_instr *alu2,
529
unsigned src1, unsigned src2)
531
if (alu1->src[src1].abs != alu2->src[src2].abs ||
532
alu1->src[src1].negate != alu2->src[src2].negate)
535
for (unsigned i = 0; i < nir_ssa_alu_instr_src_components(alu1, src1); i++) {
536
if (alu1->src[src1].swizzle[i] != alu2->src[src2].swizzle[i])
540
return nir_srcs_equal(alu1->src[src1].src, alu2->src[src2].src);
543
/* Returns "true" if two instructions are equal. Note that this will only
544
* work for the subset of instructions defined by instr_can_rewrite(). Also,
545
* it should only return "true" for instructions that hash_instr() will return
546
* the same hash for (ignoring collisions, of course).
550
nir_instrs_equal(const nir_instr *instr1, const nir_instr *instr2)
552
assert(instr_can_rewrite(instr1) && instr_can_rewrite(instr2));
554
if (instr1->type != instr2->type)
557
switch (instr1->type) {
558
case nir_instr_type_alu: {
559
nir_alu_instr *alu1 = nir_instr_as_alu(instr1);
560
nir_alu_instr *alu2 = nir_instr_as_alu(instr2);
562
if (alu1->op != alu2->op)
565
/* We explicitly don't compare instr->exact. */
567
if (alu1->no_signed_wrap != alu2->no_signed_wrap)
570
if (alu1->no_unsigned_wrap != alu2->no_unsigned_wrap)
573
/* TODO: We can probably acutally do something more inteligent such
574
* as allowing different numbers and taking a maximum or something
576
if (alu1->dest.dest.ssa.num_components != alu2->dest.dest.ssa.num_components)
579
if (alu1->dest.dest.ssa.bit_size != alu2->dest.dest.ssa.bit_size)
582
if (nir_op_infos[alu1->op].algebraic_properties & NIR_OP_IS_2SRC_COMMUTATIVE) {
583
if ((!nir_alu_srcs_equal(alu1, alu2, 0, 0) ||
584
!nir_alu_srcs_equal(alu1, alu2, 1, 1)) &&
585
(!nir_alu_srcs_equal(alu1, alu2, 0, 1) ||
586
!nir_alu_srcs_equal(alu1, alu2, 1, 0)))
589
for (unsigned i = 2; i < nir_op_infos[alu1->op].num_inputs; i++) {
590
if (!nir_alu_srcs_equal(alu1, alu2, i, i))
594
for (unsigned i = 0; i < nir_op_infos[alu1->op].num_inputs; i++) {
595
if (!nir_alu_srcs_equal(alu1, alu2, i, i))
601
case nir_instr_type_deref: {
602
nir_deref_instr *deref1 = nir_instr_as_deref(instr1);
603
nir_deref_instr *deref2 = nir_instr_as_deref(instr2);
605
if (deref1->deref_type != deref2->deref_type ||
606
deref1->modes != deref2->modes ||
607
deref1->type != deref2->type)
610
if (deref1->deref_type == nir_deref_type_var)
611
return deref1->var == deref2->var;
613
if (!nir_srcs_equal(deref1->parent, deref2->parent))
616
switch (deref1->deref_type) {
617
case nir_deref_type_struct:
618
if (deref1->strct.index != deref2->strct.index)
622
case nir_deref_type_array:
623
case nir_deref_type_ptr_as_array:
624
if (!nir_srcs_equal(deref1->arr.index, deref2->arr.index))
628
case nir_deref_type_cast:
629
if (deref1->cast.ptr_stride != deref2->cast.ptr_stride ||
630
deref1->cast.align_mul != deref2->cast.align_mul ||
631
deref1->cast.align_offset != deref2->cast.align_offset)
635
case nir_deref_type_var:
636
case nir_deref_type_array_wildcard:
641
unreachable("Invalid instruction deref type");
645
case nir_instr_type_tex: {
646
nir_tex_instr *tex1 = nir_instr_as_tex(instr1);
647
nir_tex_instr *tex2 = nir_instr_as_tex(instr2);
649
if (tex1->op != tex2->op)
652
if (tex1->num_srcs != tex2->num_srcs)
654
for (unsigned i = 0; i < tex1->num_srcs; i++) {
655
if (tex1->src[i].src_type != tex2->src[i].src_type ||
656
!nir_srcs_equal(tex1->src[i].src, tex2->src[i].src)) {
661
if (tex1->coord_components != tex2->coord_components ||
662
tex1->sampler_dim != tex2->sampler_dim ||
663
tex1->is_array != tex2->is_array ||
664
tex1->is_shadow != tex2->is_shadow ||
665
tex1->is_new_style_shadow != tex2->is_new_style_shadow ||
666
tex1->component != tex2->component ||
667
tex1->texture_index != tex2->texture_index ||
668
tex1->sampler_index != tex2->sampler_index) {
672
if (memcmp(tex1->tg4_offsets, tex2->tg4_offsets,
673
sizeof(tex1->tg4_offsets)))
678
case nir_instr_type_load_const: {
679
nir_load_const_instr *load1 = nir_instr_as_load_const(instr1);
680
nir_load_const_instr *load2 = nir_instr_as_load_const(instr2);
682
if (load1->def.num_components != load2->def.num_components)
685
if (load1->def.bit_size != load2->def.bit_size)
688
if (load1->def.bit_size == 1) {
689
for (unsigned i = 0; i < load1->def.num_components; ++i) {
690
if (load1->value[i].b != load2->value[i].b)
694
unsigned size = load1->def.num_components * sizeof(*load1->value);
695
if (memcmp(load1->value, load2->value, size) != 0)
700
case nir_instr_type_phi: {
701
nir_phi_instr *phi1 = nir_instr_as_phi(instr1);
702
nir_phi_instr *phi2 = nir_instr_as_phi(instr2);
704
if (phi1->instr.block != phi2->instr.block)
707
nir_foreach_phi_src(src1, phi1) {
708
nir_foreach_phi_src(src2, phi2) {
709
if (src1->pred == src2->pred) {
710
if (!nir_srcs_equal(src1->src, src2->src))
720
case nir_instr_type_intrinsic: {
721
nir_intrinsic_instr *intrinsic1 = nir_instr_as_intrinsic(instr1);
722
nir_intrinsic_instr *intrinsic2 = nir_instr_as_intrinsic(instr2);
723
const nir_intrinsic_info *info =
724
&nir_intrinsic_infos[intrinsic1->intrinsic];
726
if (intrinsic1->intrinsic != intrinsic2->intrinsic ||
727
intrinsic1->num_components != intrinsic2->num_components)
730
if (info->has_dest && intrinsic1->dest.ssa.num_components !=
731
intrinsic2->dest.ssa.num_components)
734
if (info->has_dest && intrinsic1->dest.ssa.bit_size !=
735
intrinsic2->dest.ssa.bit_size)
738
for (unsigned i = 0; i < info->num_srcs; i++) {
739
if (!nir_srcs_equal(intrinsic1->src[i], intrinsic2->src[i]))
743
for (unsigned i = 0; i < info->num_indices; i++) {
744
if (intrinsic1->const_index[i] != intrinsic2->const_index[i])
750
case nir_instr_type_call:
751
case nir_instr_type_jump:
752
case nir_instr_type_ssa_undef:
753
case nir_instr_type_parallel_copy:
755
unreachable("Invalid instruction type");
758
unreachable("All cases in the above switch should return");
762
nir_instr_get_dest_ssa_def(nir_instr *instr)
764
switch (instr->type) {
765
case nir_instr_type_alu:
766
assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
767
return &nir_instr_as_alu(instr)->dest.dest.ssa;
768
case nir_instr_type_deref:
769
assert(nir_instr_as_deref(instr)->dest.is_ssa);
770
return &nir_instr_as_deref(instr)->dest.ssa;
771
case nir_instr_type_load_const:
772
return &nir_instr_as_load_const(instr)->def;
773
case nir_instr_type_phi:
774
assert(nir_instr_as_phi(instr)->dest.is_ssa);
775
return &nir_instr_as_phi(instr)->dest.ssa;
776
case nir_instr_type_intrinsic:
777
assert(nir_instr_as_intrinsic(instr)->dest.is_ssa);
778
return &nir_instr_as_intrinsic(instr)->dest.ssa;
779
case nir_instr_type_tex:
780
assert(nir_instr_as_tex(instr)->dest.is_ssa);
781
return &nir_instr_as_tex(instr)->dest.ssa;
783
unreachable("We never ask for any of these");
788
cmp_func(const void *data1, const void *data2)
790
return nir_instrs_equal(data1, data2);
794
nir_instr_set_create(void *mem_ctx)
796
return _mesa_set_create(mem_ctx, hash_instr, cmp_func);
800
nir_instr_set_destroy(struct set *instr_set)
802
_mesa_set_destroy(instr_set, NULL);
806
nir_instr_set_add_or_rewrite(struct set *instr_set, nir_instr *instr,
807
bool (*cond_function) (const nir_instr *a,
810
if (!instr_can_rewrite(instr))
813
struct set_entry *e = _mesa_set_search_or_add(instr_set, instr, NULL);
814
nir_instr *match = (nir_instr *) e->key;
818
if (!cond_function || cond_function(match, instr)) {
819
/* rewrite instruction if condition is matched */
820
nir_ssa_def *def = nir_instr_get_dest_ssa_def(instr);
821
nir_ssa_def *new_def = nir_instr_get_dest_ssa_def(match);
823
/* It's safe to replace an exact instruction with an inexact one as
824
* long as we make it exact. If we got here, the two instructions are
825
* exactly identical in every other way so, once we've set the exact
826
* bit, they are the same.
828
if (instr->type == nir_instr_type_alu && nir_instr_as_alu(instr)->exact)
829
nir_instr_as_alu(match)->exact = true;
831
nir_ssa_def_rewrite_uses(def, new_def);
833
nir_instr_remove(instr);
837
/* otherwise, replace hashed instruction */
844
nir_instr_set_remove(struct set *instr_set, nir_instr *instr)
846
if (!instr_can_rewrite(instr))
849
struct set_entry *entry = _mesa_set_search(instr_set, instr);
851
_mesa_set_remove(instr_set, entry);