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* Copyright © 2008 Jérôme Glisse
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* Copyright © 2011 Marek Olšák <maraeo@gmail.com>
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* Copyright © 2015 Advanced Micro Devices, Inc.
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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#include "amdgpu_winsys.h"
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#include "pipebuffer/pb_slab.h"
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struct amdgpu_sparse_backing_chunk;
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* Sub-allocation information for a real buffer used as backing memory of a
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struct amdgpu_sparse_backing {
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struct list_head list;
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struct amdgpu_winsys_bo *bo;
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/* Sorted list of free chunks. */
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struct amdgpu_sparse_backing_chunk *chunks;
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struct amdgpu_sparse_commitment {
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struct amdgpu_sparse_backing *backing;
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struct amdgpu_winsys_bo {
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struct pb_buffer base;
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amdgpu_va_handle va_handle;
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struct list_head global_list_item;
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void *cpu_ptr; /* for user_ptr and permanent maps */
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bool use_reusable_pool;
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/* Whether buffer_get_handle or buffer_from_handle has been called,
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* it can only transition from false to true. Protected by lock.
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struct pb_slab_entry entry;
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struct amdgpu_winsys_bo *real;
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amdgpu_va_handle va_handle;
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uint32_t num_va_pages;
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uint32_t num_backing_pages;
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struct list_head backing;
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/* Commitment information for each page of the virtual memory area. */
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struct amdgpu_sparse_commitment *commitments;
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amdgpu_bo_handle bo; /* NULL for slab entries and sparse buffers */
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/* how many command streams, which are being emitted in a separate
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* thread, is this bo referenced in? */
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volatile int num_active_ioctls;
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/* Fences for buffer synchronization. */
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struct pipe_fence_handle **fences;
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struct pb_cache_entry cache_entry[];
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struct amdgpu_winsys_bo *buffer;
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struct amdgpu_winsys_bo *entries;
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bool amdgpu_bo_can_reclaim(struct amdgpu_winsys *ws, struct pb_buffer *_buf);
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struct pb_buffer *amdgpu_bo_create(struct amdgpu_winsys *ws,
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enum radeon_bo_domain domain,
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enum radeon_bo_flag flags);
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void amdgpu_bo_destroy(struct amdgpu_winsys *ws, struct pb_buffer *_buf);
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void *amdgpu_bo_map(struct radeon_winsys *rws,
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struct pb_buffer *buf,
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struct radeon_cmdbuf *rcs,
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enum pipe_map_flags usage);
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void amdgpu_bo_unmap(struct radeon_winsys *rws, struct pb_buffer *buf);
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void amdgpu_bo_init_functions(struct amdgpu_screen_winsys *ws);
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bool amdgpu_bo_can_reclaim_slab(void *priv, struct pb_slab_entry *entry);
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struct pb_slab *amdgpu_bo_slab_alloc_encrypted(void *priv, unsigned heap,
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unsigned group_index);
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struct pb_slab *amdgpu_bo_slab_alloc_normal(void *priv, unsigned heap,
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unsigned group_index);
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void amdgpu_bo_slab_free(struct amdgpu_winsys *ws, struct pb_slab *slab);
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struct amdgpu_winsys_bo *amdgpu_winsys_bo(struct pb_buffer *bo)
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return (struct amdgpu_winsys_bo *)bo;
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struct amdgpu_slab *amdgpu_slab(struct pb_slab *slab)
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return (struct amdgpu_slab *)slab;
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void amdgpu_winsys_bo_reference(struct amdgpu_winsys *ws,
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struct amdgpu_winsys_bo **dst,
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struct amdgpu_winsys_bo *src)
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radeon_bo_reference(&ws->dummy_ws.base,
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(struct pb_buffer**)dst, (struct pb_buffer*)src);