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* Copyright (c) 2013 Rob Clark <robclark@freedesktop.org>
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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int yyget_lineno(void);
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extern int yylex(void);
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typedef void *YY_BUFFER_STATE;
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extern YY_BUFFER_STATE yy_scan_string(const char *);
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extern void yy_delete_buffer(YY_BUFFER_STATE);
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void yyerror(const char *error);
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void yyerror(const char *error)
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fprintf(stderr, "error at line %d: %s\n", yyget_lineno(), error);
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static struct asm_instruction *instr; /* current instruction */
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instr = next_instr(tok);
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instr->has_immed = true;
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instr->has_shift = true;
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instr->has_bit = true;
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literal(uint32_t num)
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instr->literal = num;
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instr->is_literal = true;
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label(const char *str)
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%token <num> T_CONTROL_REG
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%token <str> T_LABEL_DECL
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%token <str> T_LABEL_REF
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%token <num> T_LITERAL
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%token <num> T_REGISTER
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%token <tok> T_OP_NOP
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%token <tok> T_OP_ADD
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%token <tok> T_OP_ADDHI
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%token <tok> T_OP_SUB
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%token <tok> T_OP_SUBHI
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%token <tok> T_OP_AND
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%token <tok> T_OP_XOR
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%token <tok> T_OP_NOT
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%token <tok> T_OP_SHL
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%token <tok> T_OP_USHR
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%token <tok> T_OP_ISHR
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%token <tok> T_OP_ROT
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%token <tok> T_OP_MUL8
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%token <tok> T_OP_MIN
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%token <tok> T_OP_MAX
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%token <tok> T_OP_CMP
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%token <tok> T_OP_MSB
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%token <tok> T_OP_MOV
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%token <tok> T_OP_CWRITE
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%token <tok> T_OP_CREAD
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%token <tok> T_OP_STORE
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%token <tok> T_OP_LOAD
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%token <tok> T_OP_BRNE
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%token <tok> T_OP_BREQ
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%token <tok> T_OP_RET
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%token <tok> T_OP_IRET
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%token <tok> T_OP_CALL
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%token <tok> T_OP_JUMP
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%token <tok> T_OP_WAITIN
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%token <tok> T_OP_PREEMPTLEAVE
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%token <tok> T_OP_SETSECURE
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%token <tok> T_LSHIFT
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%type <num> immediate
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instrs: instr_or_label instrs
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instr_or_label: instr_r
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| T_REP instr_r { instr->rep = true; }
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| T_LABEL_DECL { decl_label($1); }
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/* instructions that can optionally have (rep) flag: */
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| T_XMOV alu_instr { instr->xmov = $1; }
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/* need to special case:
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* - not (single src, possibly an immediate)
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* - msb (single src, must be reg)
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* - mov (single src, plus possibly a shift)
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* from the other ALU instructions:
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alu_msb_instr: T_OP_MSB reg ',' reg { new_instr($1); dst($2); src2($4); }
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alu_not_instr: T_OP_NOT reg ',' reg { new_instr($1); dst($2); src2($4); }
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| T_OP_NOT reg ',' immediate { new_instr($1); dst($2); immed($4); }
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alu_mov_instr: T_OP_MOV reg ',' reg { new_instr($1); dst($2); src1($4); }
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| T_OP_MOV reg ',' immediate T_LSHIFT immediate {
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new_instr($1); dst($2); immed($4); shift($6);
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| T_OP_MOV reg ',' immediate { new_instr($1); dst($2); immed($4); }
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| T_OP_MOV reg ',' T_LABEL_REF T_LSHIFT immediate {
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new_instr($1); dst($2); label($4); shift($6);
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| T_OP_MOV reg ',' T_LABEL_REF { new_instr($1); dst($2); label($4); }
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alu_2src_op: T_OP_ADD { new_instr($1); }
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| T_OP_ADDHI { new_instr($1); }
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| T_OP_SUB { new_instr($1); }
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| T_OP_SUBHI { new_instr($1); }
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| T_OP_AND { new_instr($1); }
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| T_OP_OR { new_instr($1); }
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| T_OP_XOR { new_instr($1); }
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| T_OP_SHL { new_instr($1); }
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| T_OP_USHR { new_instr($1); }
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| T_OP_ISHR { new_instr($1); }
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| T_OP_ROT { new_instr($1); }
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| T_OP_MUL8 { new_instr($1); }
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| T_OP_MIN { new_instr($1); }
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| T_OP_MAX { new_instr($1); }
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| T_OP_CMP { new_instr($1); }
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alu_2src_instr: alu_2src_op reg ',' reg ',' reg { dst($2); src1($4); src2($6); }
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| alu_2src_op reg ',' reg ',' immediate { dst($2); src1($4); immed($6); }
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alu_instr: alu_2src_instr
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config_op: T_OP_CWRITE { new_instr($1); }
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| T_OP_CREAD { new_instr($1); }
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| T_OP_LOAD { new_instr($1); }
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| T_OP_STORE { new_instr($1); }
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config_instr: config_op reg ',' '[' reg '+' immediate ']' ',' immediate {
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src1($2); src2($5); immed($7); bit($10);
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branch_op: T_OP_BRNE { new_instr($1); }
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| T_OP_BREQ { new_instr($1); }
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branch_instr: branch_op reg ',' T_BIT ',' T_LABEL_REF { src1($2); bit($4); label($6); }
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| branch_op reg ',' immediate ',' T_LABEL_REF { src1($2); immed($4); label($6); }
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other_instr: T_OP_CALL T_LABEL_REF { new_instr($1); label($2); }
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| T_OP_PREEMPTLEAVE T_LABEL_REF { new_instr($1); label($2); }
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| T_OP_SETSECURE reg ',' T_LABEL_REF { new_instr($1); src1($2); label($4); }
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| T_OP_RET { new_instr($1); }
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| T_OP_IRET { new_instr($1); }
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| T_OP_JUMP T_LABEL_REF { new_instr($1); label($2); }
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| T_OP_WAITIN { new_instr($1); }
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| T_OP_NOP { new_instr($1); }
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| T_LITERAL { new_instr($1); literal($1); }
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| T_CONTROL_REG '+' immediate { $$ = $1 + $3; }