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* Copyright © 2020 Advanced Micro Devices, Inc.
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
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* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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#ifndef AC_SHADOWED_REGS
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#define AC_SHADOWED_REGS
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#include "ac_gpu_info.h"
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enum ac_reg_range_type
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SI_NUM_SHADOWED_REG_RANGES,
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SI_REG_RANGE_NON_SHADOWED = SI_NUM_SHADOWED_REG_RANGES,
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SI_NUM_ALL_REG_RANGES,
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typedef void (*set_context_reg_seq_array_fn)(struct radeon_cmdbuf *cs, unsigned reg, unsigned num,
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const uint32_t *values);
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void ac_get_reg_ranges(enum chip_class chip_class, enum radeon_family family,
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enum ac_reg_range_type type, unsigned *num_ranges,
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const struct ac_reg_range **ranges);
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void ac_emulate_clear_state(const struct radeon_info *info, struct radeon_cmdbuf *cs,
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set_context_reg_seq_array_fn set_context_reg_seq_array);
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void ac_check_shadowed_regs(enum chip_class chip_class, enum radeon_family family,
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unsigned reg_offset, unsigned count);
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void ac_print_shadowed_regs(const struct radeon_info *info);