~mmach/netext73/mesa-haswell

« back to all changes in this revision

Viewing changes to src/gallium/drivers/freedreno/a3xx/fd3_zsa.c

  • Committer: mmach
  • Date: 2022-09-22 19:56:13 UTC
  • Revision ID: netbit73@gmail.com-20220922195613-wtik9mmy20tmor0i
2022-09-22 21:17:09

Show diffs side-by-side

added added

removed removed

Lines of Context:
1
 
/*
2
 
 * Copyright (C) 2013 Rob Clark <robclark@freedesktop.org>
3
 
 *
4
 
 * Permission is hereby granted, free of charge, to any person obtaining a
5
 
 * copy of this software and associated documentation files (the "Software"),
6
 
 * to deal in the Software without restriction, including without limitation
7
 
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
 
 * and/or sell copies of the Software, and to permit persons to whom the
9
 
 * Software is furnished to do so, subject to the following conditions:
10
 
 *
11
 
 * The above copyright notice and this permission notice (including the next
12
 
 * paragraph) shall be included in all copies or substantial portions of the
13
 
 * Software.
14
 
 *
15
 
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16
 
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
 
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18
 
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
 
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20
 
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21
 
 * SOFTWARE.
22
 
 *
23
 
 * Authors:
24
 
 *    Rob Clark <robclark@freedesktop.org>
25
 
 */
26
 
 
27
 
#include "pipe/p_state.h"
28
 
#include "util/u_memory.h"
29
 
#include "util/u_string.h"
30
 
 
31
 
#include "fd3_context.h"
32
 
#include "fd3_format.h"
33
 
#include "fd3_zsa.h"
34
 
 
35
 
void *
36
 
fd3_zsa_state_create(struct pipe_context *pctx,
37
 
                     const struct pipe_depth_stencil_alpha_state *cso)
38
 
{
39
 
   struct fd3_zsa_stateobj *so;
40
 
 
41
 
   so = CALLOC_STRUCT(fd3_zsa_stateobj);
42
 
   if (!so)
43
 
      return NULL;
44
 
 
45
 
   so->base = *cso;
46
 
 
47
 
   so->rb_depth_control |=
48
 
      A3XX_RB_DEPTH_CONTROL_ZFUNC(cso->depth_func); /* maps 1:1 */
49
 
 
50
 
   if (cso->depth_enabled)
51
 
      so->rb_depth_control |=
52
 
         A3XX_RB_DEPTH_CONTROL_Z_TEST_ENABLE | A3XX_RB_DEPTH_CONTROL_Z_READ_ENABLE;
53
 
 
54
 
   if (cso->depth_writemask)
55
 
      so->rb_depth_control |= A3XX_RB_DEPTH_CONTROL_Z_WRITE_ENABLE;
56
 
 
57
 
   if (cso->stencil[0].enabled) {
58
 
      const struct pipe_stencil_state *s = &cso->stencil[0];
59
 
 
60
 
      so->rb_stencil_control |=
61
 
         A3XX_RB_STENCIL_CONTROL_STENCIL_READ |
62
 
         A3XX_RB_STENCIL_CONTROL_STENCIL_ENABLE |
63
 
         A3XX_RB_STENCIL_CONTROL_FUNC(s->func) | /* maps 1:1 */
64
 
         A3XX_RB_STENCIL_CONTROL_FAIL(fd_stencil_op(s->fail_op)) |
65
 
         A3XX_RB_STENCIL_CONTROL_ZPASS(fd_stencil_op(s->zpass_op)) |
66
 
         A3XX_RB_STENCIL_CONTROL_ZFAIL(fd_stencil_op(s->zfail_op));
67
 
      so->rb_stencilrefmask |=
68
 
         0xff000000 | /* ??? */
69
 
         A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) |
70
 
         A3XX_RB_STENCILREFMASK_STENCILMASK(s->valuemask);
71
 
 
72
 
      if (cso->stencil[1].enabled) {
73
 
         const struct pipe_stencil_state *bs = &cso->stencil[1];
74
 
 
75
 
         so->rb_stencil_control |=
76
 
            A3XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF |
77
 
            A3XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
78
 
            A3XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
79
 
            A3XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
80
 
            A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
81
 
         so->rb_stencilrefmask_bf |=
82
 
            0xff000000 | /* ??? */
83
 
            A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(bs->writemask) |
84
 
            A3XX_RB_STENCILREFMASK_STENCILMASK(bs->valuemask);
85
 
      }
86
 
   }
87
 
 
88
 
   if (cso->alpha_enabled) {
89
 
      so->rb_render_control =
90
 
         A3XX_RB_RENDER_CONTROL_ALPHA_TEST |
91
 
         A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(cso->alpha_func);
92
 
      so->rb_alpha_ref = A3XX_RB_ALPHA_REF_UINT(cso->alpha_ref_value * 255.0f) |
93
 
                         A3XX_RB_ALPHA_REF_FLOAT(cso->alpha_ref_value);
94
 
      so->rb_depth_control |= A3XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
95
 
   }
96
 
 
97
 
   return so;
98
 
}