2
* Copyright (c) 2013 Rob Clark <robdclark@gmail.com>
4
* Permission is hereby granted, free of charge, to any person obtaining a
5
* copy of this software and associated documentation files (the "Software"),
6
* to deal in the Software without restriction, including without limitation
7
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8
* and/or sell copies of the Software, and to permit persons to whom the
9
* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
12
* paragraph) shall be included in all copies or substantial portions of the
15
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32
#include <util/u_debug.h>
37
#include "instr-a3xx.h"
39
static enum debug_t debug;
41
static const char *levels[] = {
62
struct isa_decode_options *options;
64
unsigned extra_cycles;
67
* nop_count/has_end used to detect the real end of shader. Since
68
* in some cases there can be a epilogue following an `end` we look
69
* for a sequence of `nop`s following the `end`
71
int nop_count; /* number of nop's since non-nop instruction: */
72
bool has_end; /* have we seen end instruction */
74
int cur_n; /* current instr # */
75
int cur_opc_cat; /* current opc_cat */
80
* State accumulated decoding fields of the current instruction,
81
* handled after decoding is complete (ie. at start of next instr)
90
* State accumulated decoding fields of src or dst register
102
struct shader_stats *stats;
106
print_stats(struct disasm_ctx *ctx)
108
if (ctx->options->gpu_id >= 600) {
109
/* handle MERGEREGS case.. this isn't *entirely* accurate, as
110
* you can have shader stages not using merged register file,
111
* but it is good enough for a guestimate:
113
unsigned n = (ctx->stats->halfreg + 1) / 2;
115
ctx->stats->halfreg = 0;
116
ctx->stats->fullreg = MAX2(ctx->stats->fullreg, n);
119
unsigned instructions = ctx->cur_n + ctx->extra_cycles + 1;
121
fprintf(ctx->out, "%sStats:\n", levels[ctx->level]);
123
"%s- shaderdb: %u instr, %u nops, %u non-nops, %u mov, %u cov\n",
124
levels[ctx->level], instructions, ctx->stats->nops,
125
instructions - ctx->stats->nops, ctx->stats->mov_count,
126
ctx->stats->cov_count);
129
"%s- shaderdb: %u last-baryf, %d half, %d full, %u constlen\n",
130
levels[ctx->level], ctx->stats->last_baryf,
131
DIV_ROUND_UP(ctx->stats->halfreg, 4),
132
DIV_ROUND_UP(ctx->stats->fullreg, 4),
133
DIV_ROUND_UP(ctx->stats->constlen, 4));
137
"%s- shaderdb: %u cat0, %u cat1, %u cat2, %u cat3, %u cat4, %u cat5, %u cat6, %u cat7\n",
138
levels[ctx->level], ctx->stats->instrs_per_cat[0],
139
ctx->stats->instrs_per_cat[1], ctx->stats->instrs_per_cat[2],
140
ctx->stats->instrs_per_cat[3], ctx->stats->instrs_per_cat[4],
141
ctx->stats->instrs_per_cat[5], ctx->stats->instrs_per_cat[6],
142
ctx->stats->instrs_per_cat[7]);
144
fprintf(ctx->out, "%s- shaderdb: %u sstall, %u (ss), %u (sy)\n",
145
levels[ctx->level], ctx->stats->sstall, ctx->stats->ss,
149
static const struct opc_info {
151
} opcs[1 << (3 + NOPC_BITS)] = {
152
#define OPC(cat, opc, name) [(opc)] = {#name}
153
/* clang-format off */
155
OPC(0, OPC_NOP, nop),
157
OPC(0, OPC_JUMP, jump),
158
OPC(0, OPC_CALL, call),
159
OPC(0, OPC_RET, ret),
160
OPC(0, OPC_KILL, kill),
161
OPC(0, OPC_DEMOTE, demote),
162
OPC(0, OPC_END, end),
163
OPC(0, OPC_EMIT, emit),
164
OPC(0, OPC_CUT, cut),
165
OPC(0, OPC_CHMASK, chmask),
166
OPC(0, OPC_CHSH, chsh),
167
OPC(0, OPC_FLOW_REV, flow_rev),
168
OPC(0, OPC_PREDT, predt),
169
OPC(0, OPC_PREDF, predf),
170
OPC(0, OPC_PREDE, prede),
171
OPC(0, OPC_BKT, bkt),
172
OPC(0, OPC_STKS, stks),
173
OPC(0, OPC_STKR, stkr),
174
OPC(0, OPC_XSET, xset),
175
OPC(0, OPC_XCLR, xclr),
176
OPC(0, OPC_GETLAST, getlast),
177
OPC(0, OPC_GETONE, getone),
178
OPC(0, OPC_DBG, dbg),
179
OPC(0, OPC_SHPS, shps),
180
OPC(0, OPC_SHPE, shpe),
184
OPC(1, OPC_MOVMSK, movmsk),
185
OPC(1, OPC_SWZ, swz),
186
OPC(1, OPC_SCT, sct),
187
OPC(1, OPC_GAT, gat),
188
OPC(1, OPC_BALLOT_MACRO, ballot.macro),
189
OPC(1, OPC_ANY_MACRO, any.macro),
190
OPC(1, OPC_ALL_MACRO, all.macro),
191
OPC(1, OPC_ELECT_MACRO, elect.macro),
192
OPC(1, OPC_READ_COND_MACRO, read_cond.macro),
193
OPC(1, OPC_READ_FIRST_MACRO, read_first.macro),
194
OPC(1, OPC_SWZ_SHARED_MACRO, swz_shared.macro),
195
OPC(1, OPC_SCAN_MACRO, scan.macro),
196
OPC(1, OPC_SHPS_MACRO, shps.macro),
199
OPC(2, OPC_ADD_F, add.f),
200
OPC(2, OPC_MIN_F, min.f),
201
OPC(2, OPC_MAX_F, max.f),
202
OPC(2, OPC_MUL_F, mul.f),
203
OPC(2, OPC_SIGN_F, sign.f),
204
OPC(2, OPC_CMPS_F, cmps.f),
205
OPC(2, OPC_ABSNEG_F, absneg.f),
206
OPC(2, OPC_CMPV_F, cmpv.f),
207
OPC(2, OPC_FLOOR_F, floor.f),
208
OPC(2, OPC_CEIL_F, ceil.f),
209
OPC(2, OPC_RNDNE_F, rndne.f),
210
OPC(2, OPC_RNDAZ_F, rndaz.f),
211
OPC(2, OPC_TRUNC_F, trunc.f),
212
OPC(2, OPC_ADD_U, add.u),
213
OPC(2, OPC_ADD_S, add.s),
214
OPC(2, OPC_SUB_U, sub.u),
215
OPC(2, OPC_SUB_S, sub.s),
216
OPC(2, OPC_CMPS_U, cmps.u),
217
OPC(2, OPC_CMPS_S, cmps.s),
218
OPC(2, OPC_MIN_U, min.u),
219
OPC(2, OPC_MIN_S, min.s),
220
OPC(2, OPC_MAX_U, max.u),
221
OPC(2, OPC_MAX_S, max.s),
222
OPC(2, OPC_ABSNEG_S, absneg.s),
223
OPC(2, OPC_AND_B, and.b),
224
OPC(2, OPC_OR_B, or.b),
225
OPC(2, OPC_NOT_B, not.b),
226
OPC(2, OPC_XOR_B, xor.b),
227
OPC(2, OPC_CMPV_U, cmpv.u),
228
OPC(2, OPC_CMPV_S, cmpv.s),
229
OPC(2, OPC_MUL_U24, mul.u24),
230
OPC(2, OPC_MUL_S24, mul.s24),
231
OPC(2, OPC_MULL_U, mull.u),
232
OPC(2, OPC_BFREV_B, bfrev.b),
233
OPC(2, OPC_CLZ_S, clz.s),
234
OPC(2, OPC_CLZ_B, clz.b),
235
OPC(2, OPC_SHL_B, shl.b),
236
OPC(2, OPC_SHR_B, shr.b),
237
OPC(2, OPC_ASHR_B, ashr.b),
238
OPC(2, OPC_BARY_F, bary.f),
239
OPC(2, OPC_MGEN_B, mgen.b),
240
OPC(2, OPC_GETBIT_B, getbit.b),
241
OPC(2, OPC_SETRM, setrm),
242
OPC(2, OPC_CBITS_B, cbits.b),
243
OPC(2, OPC_SHB, shb),
244
OPC(2, OPC_MSAD, msad),
247
OPC(3, OPC_MAD_U16, mad.u16),
248
OPC(3, OPC_MADSH_U16, madsh.u16),
249
OPC(3, OPC_MAD_S16, mad.s16),
250
OPC(3, OPC_MADSH_M16, madsh.m16),
251
OPC(3, OPC_MAD_U24, mad.u24),
252
OPC(3, OPC_MAD_S24, mad.s24),
253
OPC(3, OPC_MAD_F16, mad.f16),
254
OPC(3, OPC_MAD_F32, mad.f32),
255
OPC(3, OPC_SEL_B16, sel.b16),
256
OPC(3, OPC_SEL_B32, sel.b32),
257
OPC(3, OPC_SEL_S16, sel.s16),
258
OPC(3, OPC_SEL_S32, sel.s32),
259
OPC(3, OPC_SEL_F16, sel.f16),
260
OPC(3, OPC_SEL_F32, sel.f32),
261
OPC(3, OPC_SAD_S16, sad.s16),
262
OPC(3, OPC_SAD_S32, sad.s32),
263
OPC(3, OPC_SHRM, shrm),
264
OPC(3, OPC_SHLM, shlm),
265
OPC(3, OPC_SHRG, shrg),
266
OPC(3, OPC_SHLG, shlg),
267
OPC(3, OPC_ANDG, andg),
268
OPC(3, OPC_DP2ACC, dp2acc),
269
OPC(3, OPC_DP4ACC, dp4acc),
270
OPC(3, OPC_WMM, wmm),
271
OPC(3, OPC_WMM_ACCU, wmm.accu),
274
OPC(4, OPC_RCP, rcp),
275
OPC(4, OPC_RSQ, rsq),
276
OPC(4, OPC_LOG2, log2),
277
OPC(4, OPC_EXP2, exp2),
278
OPC(4, OPC_SIN, sin),
279
OPC(4, OPC_COS, cos),
280
OPC(4, OPC_SQRT, sqrt),
281
OPC(4, OPC_HRSQ, hrsq),
282
OPC(4, OPC_HLOG2, hlog2),
283
OPC(4, OPC_HEXP2, hexp2),
286
OPC(5, OPC_ISAM, isam),
287
OPC(5, OPC_ISAML, isaml),
288
OPC(5, OPC_ISAMM, isamm),
289
OPC(5, OPC_SAM, sam),
290
OPC(5, OPC_SAMB, samb),
291
OPC(5, OPC_SAML, saml),
292
OPC(5, OPC_SAMGQ, samgq),
293
OPC(5, OPC_GETLOD, getlod),
294
OPC(5, OPC_CONV, conv),
295
OPC(5, OPC_CONVM, convm),
296
OPC(5, OPC_GETSIZE, getsize),
297
OPC(5, OPC_GETBUF, getbuf),
298
OPC(5, OPC_GETPOS, getpos),
299
OPC(5, OPC_GETINFO, getinfo),
300
OPC(5, OPC_DSX, dsx),
301
OPC(5, OPC_DSY, dsy),
302
OPC(5, OPC_GATHER4R, gather4r),
303
OPC(5, OPC_GATHER4G, gather4g),
304
OPC(5, OPC_GATHER4B, gather4b),
305
OPC(5, OPC_GATHER4A, gather4a),
306
OPC(5, OPC_SAMGP0, samgp0),
307
OPC(5, OPC_SAMGP1, samgp1),
308
OPC(5, OPC_SAMGP2, samgp2),
309
OPC(5, OPC_SAMGP3, samgp3),
310
OPC(5, OPC_DSXPP_1, dsxpp.1),
311
OPC(5, OPC_DSYPP_1, dsypp.1),
312
OPC(5, OPC_RGETPOS, rgetpos),
313
OPC(5, OPC_RGETINFO, rgetinfo),
314
OPC(5, OPC_BRCST_ACTIVE, brcst.active),
315
OPC(5, OPC_QUAD_SHUFFLE_BRCST, quad_shuffle.brcst),
316
OPC(5, OPC_QUAD_SHUFFLE_HORIZ, quad_shuffle.horiz),
317
OPC(5, OPC_QUAD_SHUFFLE_VERT, quad_shuffle.vert),
318
OPC(5, OPC_QUAD_SHUFFLE_DIAG, quad_shuffle.diag),
319
/* macros are needed here for ir3_print */
320
OPC(5, OPC_DSXPP_MACRO, dsxpp.macro),
321
OPC(5, OPC_DSYPP_MACRO, dsypp.macro),
325
OPC(6, OPC_LDG, ldg),
326
OPC(6, OPC_LDG_A, ldg.a),
327
OPC(6, OPC_LDL, ldl),
328
OPC(6, OPC_LDP, ldp),
329
OPC(6, OPC_STG, stg),
330
OPC(6, OPC_STG_A, stg.a),
331
OPC(6, OPC_STL, stl),
332
OPC(6, OPC_STP, stp),
333
OPC(6, OPC_LDIB, ldib),
334
OPC(6, OPC_G2L, g2l),
335
OPC(6, OPC_L2G, l2g),
336
OPC(6, OPC_PREFETCH, prefetch),
337
OPC(6, OPC_LDLW, ldlw),
338
OPC(6, OPC_STLW, stlw),
339
OPC(6, OPC_RESFMT, resfmt),
340
OPC(6, OPC_RESINFO, resinfo),
341
OPC(6, OPC_ATOMIC_ADD, atomic.add),
342
OPC(6, OPC_ATOMIC_SUB, atomic.sub),
343
OPC(6, OPC_ATOMIC_XCHG, atomic.xchg),
344
OPC(6, OPC_ATOMIC_INC, atomic.inc),
345
OPC(6, OPC_ATOMIC_DEC, atomic.dec),
346
OPC(6, OPC_ATOMIC_CMPXCHG, atomic.cmpxchg),
347
OPC(6, OPC_ATOMIC_MIN, atomic.min),
348
OPC(6, OPC_ATOMIC_MAX, atomic.max),
349
OPC(6, OPC_ATOMIC_AND, atomic.and),
350
OPC(6, OPC_ATOMIC_OR, atomic.or),
351
OPC(6, OPC_ATOMIC_XOR, atomic.xor),
352
OPC(6, OPC_ATOMIC_B_ADD, atomic.b.add),
353
OPC(6, OPC_ATOMIC_B_SUB, atomic.b.sub),
354
OPC(6, OPC_ATOMIC_B_XCHG, atomic.b.xchg),
355
OPC(6, OPC_ATOMIC_B_INC, atomic.b.inc),
356
OPC(6, OPC_ATOMIC_B_DEC, atomic.b.dec),
357
OPC(6, OPC_ATOMIC_B_CMPXCHG, atomic.b.cmpxchg),
358
OPC(6, OPC_ATOMIC_B_MIN, atomic.b.min),
359
OPC(6, OPC_ATOMIC_B_MAX, atomic.b.max),
360
OPC(6, OPC_ATOMIC_B_AND, atomic.b.and),
361
OPC(6, OPC_ATOMIC_B_OR, atomic.b.or),
362
OPC(6, OPC_ATOMIC_B_XOR, atomic.b.xor),
363
OPC(6, OPC_ATOMIC_S_ADD, atomic.s.add),
364
OPC(6, OPC_ATOMIC_S_SUB, atomic.s.sub),
365
OPC(6, OPC_ATOMIC_S_XCHG, atomic.s.xchg),
366
OPC(6, OPC_ATOMIC_S_INC, atomic.s.inc),
367
OPC(6, OPC_ATOMIC_S_DEC, atomic.s.dec),
368
OPC(6, OPC_ATOMIC_S_CMPXCHG, atomic.s.cmpxchg),
369
OPC(6, OPC_ATOMIC_S_MIN, atomic.s.min),
370
OPC(6, OPC_ATOMIC_S_MAX, atomic.s.max),
371
OPC(6, OPC_ATOMIC_S_AND, atomic.s.and),
372
OPC(6, OPC_ATOMIC_S_OR, atomic.s.or),
373
OPC(6, OPC_ATOMIC_S_XOR, atomic.s.xor),
374
OPC(6, OPC_ATOMIC_G_ADD, atomic.g.add),
375
OPC(6, OPC_ATOMIC_G_SUB, atomic.g.sub),
376
OPC(6, OPC_ATOMIC_G_XCHG, atomic.g.xchg),
377
OPC(6, OPC_ATOMIC_G_INC, atomic.g.inc),
378
OPC(6, OPC_ATOMIC_G_DEC, atomic.g.dec),
379
OPC(6, OPC_ATOMIC_G_CMPXCHG, atomic.g.cmpxchg),
380
OPC(6, OPC_ATOMIC_G_MIN, atomic.g.min),
381
OPC(6, OPC_ATOMIC_G_MAX, atomic.g.max),
382
OPC(6, OPC_ATOMIC_G_AND, atomic.g.and),
383
OPC(6, OPC_ATOMIC_G_OR, atomic.g.or),
384
OPC(6, OPC_ATOMIC_G_XOR, atomic.g.xor),
385
OPC(6, OPC_LDGB, ldgb),
386
OPC(6, OPC_STGB, stgb),
387
OPC(6, OPC_STIB, stib),
388
OPC(6, OPC_LDC, ldc),
389
OPC(6, OPC_LDLV, ldlv),
390
OPC(6, OPC_PIPR, pipr),
391
OPC(6, OPC_PIPC, pipc),
392
OPC(6, OPC_EMIT2, emit),
393
OPC(6, OPC_ENDLS, endls),
394
OPC(6, OPC_GETSPID, getspid),
395
OPC(6, OPC_GETWID, getwid),
396
OPC(6, OPC_GETFIBERID, getfiberid),
397
OPC(6, OPC_STC, stc),
398
OPC(6, OPC_LDC_K, ldc.k),
400
OPC(6, OPC_SPILL_MACRO, spill.macro),
401
OPC(6, OPC_RELOAD_MACRO, reload.macro),
403
OPC(7, OPC_BAR, bar),
404
OPC(7, OPC_FENCE, fence),
405
/* clang-format on */
409
#define GETINFO(instr) \
410
(&(opcs[((instr)->opc_cat << NOPC_BITS) | instr_opc(instr, ctx->gpu_id)]))
413
disasm_a3xx_instr_name(opc_t opc)
415
if (opc_cat(opc) == -1)
417
return opcs[opc].name;
421
disasm_field_cb(void *d, const char *field_name, struct isa_decode_value *val)
423
struct disasm_ctx *ctx = d;
425
if (!strcmp(field_name, "NAME")) {
426
if (!strcmp("nop", val->str)) {
429
if (ctx->nop_count > 3) {
430
ctx->options->stop = true;
433
ctx->stats->nops += 1 + ctx->last.repeat;
438
if (!strcmp("end", val->str)) {
441
} else if (!strcmp("chsh", val->str)) {
442
ctx->options->stop = true;
443
} else if (!strcmp("bary.f", val->str)) {
444
ctx->stats->last_baryf = ctx->cur_n;
446
} else if (!strcmp(field_name, "REPEAT")) {
447
ctx->extra_cycles += val->num;
448
ctx->stats->instrs_per_cat[ctx->cur_opc_cat] += val->num;
449
ctx->last.repeat = val->num;
450
} else if (!strcmp(field_name, "NOP")) {
451
ctx->extra_cycles += val->num;
452
ctx->stats->instrs_per_cat[0] += val->num;
453
ctx->stats->nops += val->num;
454
ctx->last.nop = val->num;
455
} else if (!strcmp(field_name, "SY")) {
456
ctx->stats->sy += val->num;
457
} else if (!strcmp(field_name, "SS")) {
458
ctx->stats->ss += val->num;
459
ctx->last.ss = !!val->num;
460
} else if (!strcmp(field_name, "CONST")) {
461
ctx->reg.num = val->num;
462
ctx->reg.file = FILE_CONST;
463
} else if (!strcmp(field_name, "GPR")) {
464
/* don't count GPR regs r48.x (shared) or higher: */
466
ctx->reg.num = val->num;
467
ctx->reg.file = FILE_GPR;
469
} else if (!strcmp(field_name, "SRC_R") || !strcmp(field_name, "SRC1_R") ||
470
!strcmp(field_name, "SRC2_R") || !strcmp(field_name, "SRC3_R")) {
471
ctx->reg.r = val->num;
472
} else if (!strcmp(field_name, "DST")) {
473
/* Dest register is always repeated
475
* Note that this doesn't really properly handle instructions
476
* that write multiple components.. the old disasm didn't handle
480
} else if (strstr(field_name, "HALF")) {
481
ctx->reg.half = val->num;
482
} else if (!strcmp(field_name, "SWIZ")) {
483
unsigned num = (ctx->reg.num << 2) | val->num;
485
num += ctx->last.repeat;
487
if (ctx->reg.file == FILE_CONST) {
488
ctx->stats->constlen = MAX2(ctx->stats->constlen, num);
489
} else if (ctx->reg.file == FILE_GPR) {
491
ctx->stats->halfreg = MAX2(ctx->stats->halfreg, num);
493
ctx->stats->fullreg = MAX2(ctx->stats->fullreg, num);
497
memset(&ctx->reg, 0, sizeof(ctx->reg));
502
* Handle stat updates dealt with at the end of instruction decoding,
503
* ie. before beginning of next instruction
506
disasm_handle_last(struct disasm_ctx *ctx)
509
ctx->stats->sstall += ctx->sfu_delay;
513
if (ctx->cur_opc_cat == 4) {
516
int n = MIN2(ctx->sfu_delay, 1 + ctx->last.repeat + ctx->last.nop);
520
memset(&ctx->last, 0, sizeof(ctx->last));
524
disasm_instr_cb(void *d, unsigned n, void *instr)
526
struct disasm_ctx *ctx = d;
527
uint32_t *dwords = (uint32_t *)instr;
528
uint64_t val = dwords[1];
532
unsigned opc_cat = val >> 61;
534
/* There are some cases where we can get instr_cb called multiple
535
* times per instruction (like when we need an extra line for branch
536
* target labels), don't update stats in these cases:
538
if (n != ctx->cur_n) {
540
disasm_handle_last(ctx);
542
ctx->stats->instrs_per_cat[opc_cat]++;
545
/* mov vs cov stats are a bit harder to fish out of the field
546
* names, because current ir3-cat1.xml doesn't use {NAME} for
547
* this distinction. So for now just handle this case with
548
* some hand-coded parsing:
551
unsigned opc = (val >> 57) & 0x3;
552
unsigned src_type = (val >> 50) & 0x7;
553
unsigned dst_type = (val >> 46) & 0x7;
556
if (src_type == dst_type) {
557
ctx->stats->mov_count++;
559
ctx->stats->cov_count++;
565
ctx->cur_opc_cat = opc_cat;
567
if (debug & PRINT_RAW) {
568
fprintf(ctx->out, "%s:%d:%04d:%04d[%08xx_%08xx] ", levels[ctx->level],
569
opc_cat, n, ctx->extra_cycles + n, dwords[1], dwords[0]);
574
disasm_a3xx_stat(uint32_t *dwords, int sizedwords, int level, FILE *out,
575
unsigned gpu_id, struct shader_stats *stats)
577
struct isa_decode_options decode_options = {
581
.branch_labels = true,
582
.field_cb = disasm_field_cb,
583
.instr_cb = disasm_instr_cb,
585
struct disasm_ctx ctx = {
588
.options = &decode_options,
593
memset(stats, 0, sizeof(*stats));
595
decode_options.cbdata = &ctx;
597
isa_decode(dwords, sizedwords * 4, out, &decode_options);
599
disasm_handle_last(&ctx);
601
if (debug & PRINT_STATS)
608
disasm_a3xx_set_debug(enum debug_t d)
615
static bool jmp_env_valid;
616
static jmp_buf jmp_env;
619
ir3_assert_handler(const char *expr, const char *file, int line,
622
mesa_loge("%s:%u: %s: Assertion `%s' failed.", file, line, func, expr);
630
assert(!jmp_env_valid); \
631
if (setjmp(jmp_env) == 0) { \
632
jmp_env_valid = true; \
635
jmp_env_valid = false; \
639
disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out,
642
struct shader_stats stats;
643
return disasm_a3xx_stat(dwords, sizedwords, level, out, gpu_id, &stats);
647
try_disasm_a3xx(uint32_t *dwords, int sizedwords, int level, FILE *out,
650
struct shader_stats stats;
652
TRY(ret = disasm_a3xx_stat(dwords, sizedwords, level, out, gpu_id, &stats));