2
* Copyright © 2014 Broadcom
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* Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25
#include "pipe/p_defines.h"
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#include "util/u_memory.h"
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#include "util/format/u_format.h"
28
#include "util/u_inlines.h"
29
#include "util/u_surface.h"
30
#include "util/u_transfer_helper.h"
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#include "util/u_upload_mgr.h"
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#include "util/u_drm.h"
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#include "drm-uapi/drm_fourcc.h"
35
#include "drm-uapi/vc4_drm.h"
36
#include "vc4_screen.h"
37
#include "vc4_context.h"
38
#include "vc4_resource.h"
39
#include "vc4_tiling.h"
42
vc4_resource_bo_alloc(struct vc4_resource *rsc)
44
struct pipe_resource *prsc = &rsc->base;
45
struct pipe_screen *pscreen = prsc->screen;
48
if (vc4_debug & VC4_DEBUG_SURFACE) {
49
fprintf(stderr, "alloc %p: size %d + offset %d -> %d\n",
52
rsc->slices[0].offset,
53
rsc->slices[0].offset +
55
rsc->cube_map_stride * (prsc->array_size - 1));
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bo = vc4_bo_alloc(vc4_screen(pscreen),
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rsc->slices[0].offset +
61
rsc->cube_map_stride * (prsc->array_size - 1),
64
vc4_bo_unreference(&rsc->bo);
73
vc4_resource_transfer_unmap(struct pipe_context *pctx,
74
struct pipe_transfer *ptrans)
76
struct vc4_context *vc4 = vc4_context(pctx);
77
struct vc4_transfer *trans = vc4_transfer(ptrans);
80
struct vc4_resource *rsc = vc4_resource(ptrans->resource);
81
struct vc4_resource_slice *slice = &rsc->slices[ptrans->level];
83
if (ptrans->usage & PIPE_MAP_WRITE) {
84
vc4_store_tiled_image(rsc->bo->map + slice->offset +
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ptrans->box.z * rsc->cube_map_stride,
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trans->map, ptrans->stride,
88
slice->tiling, rsc->cpp,
94
pipe_resource_reference(&ptrans->resource, NULL);
95
slab_free(&vc4->transfer_pool, ptrans);
99
vc4_resource_transfer_map(struct pipe_context *pctx,
100
struct pipe_resource *prsc,
101
unsigned level, unsigned usage,
102
const struct pipe_box *box,
103
struct pipe_transfer **pptrans)
105
struct vc4_context *vc4 = vc4_context(pctx);
106
struct vc4_resource *rsc = vc4_resource(prsc);
107
struct vc4_transfer *trans;
108
struct pipe_transfer *ptrans;
109
enum pipe_format format = prsc->format;
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/* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
115
if ((usage & PIPE_MAP_DISCARD_RANGE) &&
116
!(usage & PIPE_MAP_UNSYNCHRONIZED) &&
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!(prsc->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) &&
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prsc->last_level == 0 &&
119
prsc->width0 == box->width &&
120
prsc->height0 == box->height &&
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prsc->depth0 == box->depth &&
122
prsc->array_size == 1 &&
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usage |= PIPE_MAP_DISCARD_WHOLE_RESOURCE;
127
if (usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE) {
128
if (vc4_resource_bo_alloc(rsc)) {
129
/* If it might be bound as one of our vertex buffers,
130
* make sure we re-emit vertex buffer state.
132
if (prsc->bind & PIPE_BIND_VERTEX_BUFFER)
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vc4->dirty |= VC4_DIRTY_VTXBUF;
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/* If we failed to reallocate, flush users so that we
136
* don't violate any syncing requirements.
138
vc4_flush_jobs_reading_resource(vc4, prsc);
140
} else if (!(usage & PIPE_MAP_UNSYNCHRONIZED)) {
141
/* If we're writing and the buffer is being used by the CL, we
142
* have to flush the CL first. If we're only reading, we need
143
* to flush if the CL has written our buffer.
145
if (usage & PIPE_MAP_WRITE)
146
vc4_flush_jobs_reading_resource(vc4, prsc);
148
vc4_flush_jobs_writing_resource(vc4, prsc);
151
if (usage & PIPE_MAP_WRITE) {
153
rsc->initialized_buffers = ~0;
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trans = slab_zalloc(&vc4->transfer_pool);
160
/* XXX: Handle DONTBLOCK, DISCARD_RANGE, PERSISTENT, COHERENT. */
162
ptrans = &trans->base;
164
pipe_resource_reference(&ptrans->resource, prsc);
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ptrans->level = level;
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ptrans->usage = usage;
169
if (usage & PIPE_MAP_UNSYNCHRONIZED)
170
buf = vc4_bo_map_unsynchronized(rsc->bo);
172
buf = vc4_bo_map(rsc->bo);
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fprintf(stderr, "Failed to map bo\n");
180
struct vc4_resource_slice *slice = &rsc->slices[level];
182
/* No direct mappings of tiled, since we need to manually
185
if (usage & PIPE_MAP_DIRECTLY)
188
/* Our load/store routines work on entire compressed blocks. */
189
u_box_pixels_to_blocks(&ptrans->box, &ptrans->box, format);
191
ptrans->stride = ptrans->box.width * rsc->cpp;
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ptrans->layer_stride = ptrans->stride * ptrans->box.height;
194
trans->map = malloc(ptrans->layer_stride * ptrans->box.depth);
196
if (usage & PIPE_MAP_READ) {
197
vc4_load_tiled_image(trans->map, ptrans->stride,
198
buf + slice->offset +
199
ptrans->box.z * rsc->cube_map_stride,
201
slice->tiling, rsc->cpp,
206
ptrans->stride = slice->stride;
207
ptrans->layer_stride = ptrans->stride;
209
return buf + slice->offset +
210
ptrans->box.y / util_format_get_blockheight(format) * ptrans->stride +
211
ptrans->box.x / util_format_get_blockwidth(format) * rsc->cpp +
212
ptrans->box.z * rsc->cube_map_stride;
217
vc4_resource_transfer_unmap(pctx, ptrans);
222
vc4_texture_subdata(struct pipe_context *pctx,
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struct pipe_resource *prsc,
226
const struct pipe_box *box,
229
unsigned layer_stride)
231
struct vc4_resource *rsc = vc4_resource(prsc);
232
struct vc4_resource_slice *slice = &rsc->slices[level];
234
/* For a direct mapping, we can just take the u_transfer path. */
237
(usage & PIPE_MAP_DISCARD_WHOLE_RESOURCE)) {
238
return u_default_texture_subdata(pctx, prsc, level, usage, box,
239
data, stride, layer_stride);
242
/* Otherwise, map and store the texture data directly into the tiled
246
if (usage & PIPE_MAP_UNSYNCHRONIZED)
247
buf = vc4_bo_map_unsynchronized(rsc->bo);
249
buf = vc4_bo_map(rsc->bo);
251
vc4_store_tiled_image(buf + slice->offset +
252
box->z * rsc->cube_map_stride,
254
(void *)data, stride,
255
slice->tiling, rsc->cpp,
260
vc4_resource_destroy(struct pipe_screen *pscreen,
261
struct pipe_resource *prsc)
263
struct vc4_screen *screen = vc4_screen(pscreen);
264
struct vc4_resource *rsc = vc4_resource(prsc);
265
vc4_bo_unreference(&rsc->bo);
268
renderonly_scanout_destroy(rsc->scanout, screen->ro);
274
vc4_resource_modifier(struct vc4_resource *rsc)
277
return DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
279
return DRM_FORMAT_MOD_LINEAR;
283
vc4_resource_get_handle(struct pipe_screen *pscreen,
284
struct pipe_context *pctx,
285
struct pipe_resource *prsc,
286
struct winsys_handle *whandle,
289
struct vc4_screen *screen = vc4_screen(pscreen);
290
struct vc4_resource *rsc = vc4_resource(prsc);
292
whandle->stride = rsc->slices[0].stride;
294
whandle->modifier = vc4_resource_modifier(rsc);
296
/* If we're passing some reference to our BO out to some other part of
297
* the system, then we can't do any optimizations about only us being
298
* the ones seeing it (like BO caching or shadow update avoidance).
300
rsc->bo->private = false;
302
switch (whandle->type) {
303
case WINSYS_HANDLE_TYPE_SHARED:
305
/* This could probably be supported, assuming that a
306
* control node was used for pl111.
308
fprintf(stderr, "flink unsupported with pl111\n");
312
return vc4_bo_flink(rsc->bo, &whandle->handle);
313
case WINSYS_HANDLE_TYPE_KMS:
315
return renderonly_get_handle(rsc->scanout, whandle);
317
whandle->handle = rsc->bo->handle;
319
case WINSYS_HANDLE_TYPE_FD:
320
/* FDs are cross-device, so we can export directly from vc4.
322
whandle->handle = vc4_bo_get_dmabuf(rsc->bo);
323
return whandle->handle != -1;
330
vc4_resource_get_param(struct pipe_screen *pscreen,
331
struct pipe_context *pctx, struct pipe_resource *prsc,
332
unsigned plane, unsigned layer, unsigned level,
333
enum pipe_resource_param param,
334
unsigned usage, uint64_t *value)
336
struct vc4_resource *rsc = vc4_resource(prsc);
339
case PIPE_RESOURCE_PARAM_STRIDE:
340
*value = rsc->slices[level].stride;
342
case PIPE_RESOURCE_PARAM_OFFSET:
345
case PIPE_RESOURCE_PARAM_MODIFIER:
346
*value = vc4_resource_modifier(rsc);
354
vc4_setup_slices(struct vc4_resource *rsc, const char *caller)
356
struct pipe_resource *prsc = &rsc->base;
357
uint32_t width = prsc->width0;
358
uint32_t height = prsc->height0;
359
if (prsc->format == PIPE_FORMAT_ETC1_RGB8) {
360
width = (width + 3) >> 2;
361
height = (height + 3) >> 2;
364
uint32_t pot_width = util_next_power_of_two(width);
365
uint32_t pot_height = util_next_power_of_two(height);
367
uint32_t utile_w = vc4_utile_width(rsc->cpp);
368
uint32_t utile_h = vc4_utile_height(rsc->cpp);
370
for (int i = prsc->last_level; i >= 0; i--) {
371
struct vc4_resource_slice *slice = &rsc->slices[i];
373
uint32_t level_width, level_height;
376
level_height = height;
378
level_width = u_minify(pot_width, i);
379
level_height = u_minify(pot_height, i);
383
slice->tiling = VC4_TILING_FORMAT_LINEAR;
384
if (prsc->nr_samples > 1) {
385
/* MSAA (4x) surfaces are stored as raw tile buffer contents. */
386
level_width = align(level_width, 32);
387
level_height = align(level_height, 32);
389
level_width = align(level_width, utile_w);
392
if (vc4_size_is_lt(level_width, level_height,
394
slice->tiling = VC4_TILING_FORMAT_LT;
395
level_width = align(level_width, utile_w);
396
level_height = align(level_height, utile_h);
398
slice->tiling = VC4_TILING_FORMAT_T;
399
level_width = align(level_width,
401
level_height = align(level_height,
406
slice->offset = offset;
407
slice->stride = (level_width * rsc->cpp *
408
MAX2(prsc->nr_samples, 1));
409
slice->size = level_height * slice->stride;
411
offset += slice->size;
413
if (vc4_debug & VC4_DEBUG_SURFACE) {
414
static const char tiling_chars[] = {
415
[VC4_TILING_FORMAT_LINEAR] = 'R',
416
[VC4_TILING_FORMAT_LT] = 'L',
417
[VC4_TILING_FORMAT_T] = 'T'
420
"rsc %s %p (format %s: vc4 %d), %dx%d: "
421
"level %d (%c) -> %dx%d, stride %d@0x%08x\n",
423
util_format_short_name(prsc->format),
425
prsc->width0, prsc->height0,
426
i, tiling_chars[slice->tiling],
427
level_width, level_height,
428
slice->stride, slice->offset);
432
/* The texture base pointer that has to point to level 0 doesn't have
433
* intra-page bits, so we have to align it, and thus shift up all the
436
uint32_t page_align_offset = (align(rsc->slices[0].offset, 4096) -
437
rsc->slices[0].offset);
438
if (page_align_offset) {
439
for (int i = 0; i <= prsc->last_level; i++)
440
rsc->slices[i].offset += page_align_offset;
443
/* Cube map faces appear as whole miptrees at a page-aligned offset
444
* from the first face's miptree.
446
if (prsc->target == PIPE_TEXTURE_CUBE) {
447
rsc->cube_map_stride = align(rsc->slices[0].offset +
448
rsc->slices[0].size, 4096);
452
static struct vc4_resource *
453
vc4_resource_setup(struct pipe_screen *pscreen,
454
const struct pipe_resource *tmpl)
456
struct vc4_resource *rsc = CALLOC_STRUCT(vc4_resource);
459
struct pipe_resource *prsc = &rsc->base;
463
pipe_reference_init(&prsc->reference, 1);
464
prsc->screen = pscreen;
466
if (prsc->nr_samples <= 1)
467
rsc->cpp = util_format_get_blocksize(tmpl->format);
469
rsc->cpp = sizeof(uint32_t);
476
static enum vc4_texture_data_type
477
get_resource_texture_format(struct pipe_resource *prsc)
479
struct vc4_resource *rsc = vc4_resource(prsc);
480
uint8_t format = vc4_get_tex_format(prsc->format);
483
if (prsc->nr_samples > 1) {
486
if (format == VC4_TEXTURE_TYPE_RGBA8888)
487
return VC4_TEXTURE_TYPE_RGBA32R;
496
static struct pipe_resource *
497
vc4_resource_create_with_modifiers(struct pipe_screen *pscreen,
498
const struct pipe_resource *tmpl,
499
const uint64_t *modifiers,
502
struct vc4_screen *screen = vc4_screen(pscreen);
503
struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
504
struct pipe_resource *prsc = &rsc->base;
505
bool linear_ok = drm_find_modifier(DRM_FORMAT_MOD_LINEAR, modifiers, count);
506
/* Use a tiled layout if we can, for better 3D performance. */
507
bool should_tile = true;
509
/* VBOs/PBOs are untiled (and 1 height). */
510
if (tmpl->target == PIPE_BUFFER)
513
/* MSAA buffers are linear. */
514
if (tmpl->nr_samples > 1)
517
/* No tiling when we're sharing with another device (pl111). */
518
if (screen->ro && (tmpl->bind & PIPE_BIND_SCANOUT))
521
/* Cursors are always linear, and the user can request linear as well.
523
if (tmpl->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR))
526
/* No shared objects with LT format -- the kernel only has T-format
527
* metadata. LT objects are small enough it's not worth the trouble to
528
* give them metadata to tile.
530
if ((tmpl->bind & (PIPE_BIND_SHARED | PIPE_BIND_SCANOUT)) &&
531
vc4_size_is_lt(prsc->width0, prsc->height0, rsc->cpp))
534
/* If we're sharing or scanning out, we need the ioctl present to
535
* inform the kernel or the other side.
537
if ((tmpl->bind & (PIPE_BIND_SHARED |
538
PIPE_BIND_SCANOUT)) && !screen->has_tiling_ioctl)
541
/* No user-specified modifier; determine our own. */
542
if (count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID) {
544
rsc->tiled = should_tile;
545
} else if (should_tile &&
546
drm_find_modifier(DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED,
549
} else if (linear_ok) {
552
fprintf(stderr, "Unsupported modifier requested\n");
556
if (tmpl->target != PIPE_BUFFER)
557
rsc->vc4_format = get_resource_texture_format(prsc);
559
vc4_setup_slices(rsc, "create");
560
if (!vc4_resource_bo_alloc(rsc))
563
if (screen->has_tiling_ioctl) {
566
modifier = DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED;
568
modifier = DRM_FORMAT_MOD_LINEAR;
569
struct drm_vc4_set_tiling set_tiling = {
570
.handle = rsc->bo->handle,
571
.modifier = modifier,
573
int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_SET_TILING,
579
/* Set up the "scanout resource" (the dmabuf export of our buffer to
580
* the KMS handle) if the buffer might ever have
581
* resource_get_handle(WINSYS_HANDLE_TYPE_KMS) called on it.
582
* create_with_modifiers() doesn't give us usage flags, so we have to
583
* assume that all calls with modifiers are scanout-possible.
586
((tmpl->bind & PIPE_BIND_SCANOUT) ||
587
!(count == 1 && modifiers[0] == DRM_FORMAT_MOD_INVALID))) {
589
renderonly_scanout_for_resource(prsc, screen->ro, NULL);
594
vc4_bo_label(screen, rsc->bo, "%sresource %dx%d@%d/%d",
595
(tmpl->bind & PIPE_BIND_SCANOUT) ? "scanout " : "",
596
tmpl->width0, tmpl->height0,
597
rsc->cpp * 8, prsc->last_level);
601
vc4_resource_destroy(pscreen, prsc);
605
struct pipe_resource *
606
vc4_resource_create(struct pipe_screen *pscreen,
607
const struct pipe_resource *tmpl)
609
const uint64_t mod = DRM_FORMAT_MOD_INVALID;
610
return vc4_resource_create_with_modifiers(pscreen, tmpl, &mod, 1);
613
static struct pipe_resource *
614
vc4_resource_from_handle(struct pipe_screen *pscreen,
615
const struct pipe_resource *tmpl,
616
struct winsys_handle *whandle,
619
struct vc4_screen *screen = vc4_screen(pscreen);
620
struct vc4_resource *rsc = vc4_resource_setup(pscreen, tmpl);
621
struct pipe_resource *prsc = &rsc->base;
622
struct vc4_resource_slice *slice = &rsc->slices[0];
627
switch (whandle->type) {
628
case WINSYS_HANDLE_TYPE_SHARED:
629
rsc->bo = vc4_bo_open_name(screen, whandle->handle);
631
case WINSYS_HANDLE_TYPE_FD:
632
rsc->bo = vc4_bo_open_dmabuf(screen, whandle->handle);
636
"Attempt to import unsupported handle type %d\n",
643
struct drm_vc4_get_tiling get_tiling = {
644
.handle = rsc->bo->handle,
646
int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_TILING, &get_tiling);
649
whandle->modifier = DRM_FORMAT_MOD_LINEAR;
650
} else if (whandle->modifier == DRM_FORMAT_MOD_INVALID) {
651
whandle->modifier = get_tiling.modifier;
652
} else if (whandle->modifier != get_tiling.modifier) {
654
"Modifier 0x%llx vs. tiling (0x%llx) mismatch\n",
655
(long long)whandle->modifier, get_tiling.modifier);
659
switch (whandle->modifier) {
660
case DRM_FORMAT_MOD_LINEAR:
663
case DRM_FORMAT_MOD_BROADCOM_VC4_T_TILED:
668
"Attempt to import unsupported modifier 0x%llx\n",
669
(long long)whandle->modifier);
673
rsc->vc4_format = get_resource_texture_format(prsc);
674
vc4_setup_slices(rsc, "import");
676
if (whandle->offset != 0) {
679
"Attempt to import unsupported "
680
"winsys offset %u\n",
685
rsc->slices[0].offset += whandle->offset;
687
if (rsc->slices[0].offset + rsc->slices[0].size >
689
fprintf(stderr, "Attempt to import "
690
"with overflowing offset (%d + %d > %d)\n",
699
/* Make sure that renderonly has a handle to our buffer in the
700
* display's fd, so that a later renderonly_get_handle()
701
* returns correct handles or GEM names.
704
renderonly_create_gpu_import_for_resource(prsc,
709
if (rsc->tiled && whandle->stride != slice->stride) {
710
static bool warned = false;
714
"Attempting to import %dx%d %s with "
715
"unsupported stride %d instead of %d\n",
716
prsc->width0, prsc->height0,
717
util_format_short_name(prsc->format),
722
} else if (!rsc->tiled) {
723
slice->stride = whandle->stride;
729
vc4_resource_destroy(pscreen, prsc);
733
static struct pipe_surface *
734
vc4_create_surface(struct pipe_context *pctx,
735
struct pipe_resource *ptex,
736
const struct pipe_surface *surf_tmpl)
738
struct vc4_surface *surface = CALLOC_STRUCT(vc4_surface);
739
struct vc4_resource *rsc = vc4_resource(ptex);
744
assert(surf_tmpl->u.tex.first_layer == surf_tmpl->u.tex.last_layer);
746
struct pipe_surface *psurf = &surface->base;
747
unsigned level = surf_tmpl->u.tex.level;
749
pipe_reference_init(&psurf->reference, 1);
750
pipe_resource_reference(&psurf->texture, ptex);
752
psurf->context = pctx;
753
psurf->format = surf_tmpl->format;
754
psurf->width = u_minify(ptex->width0, level);
755
psurf->height = u_minify(ptex->height0, level);
756
psurf->u.tex.level = level;
757
psurf->u.tex.first_layer = surf_tmpl->u.tex.first_layer;
758
psurf->u.tex.last_layer = surf_tmpl->u.tex.last_layer;
759
surface->offset = (rsc->slices[level].offset +
760
psurf->u.tex.first_layer * rsc->cube_map_stride);
761
surface->tiling = rsc->slices[level].tiling;
763
return &surface->base;
767
vc4_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
769
pipe_resource_reference(&psurf->texture, NULL);
774
vc4_dump_surface_non_msaa(struct pipe_surface *psurf)
776
struct pipe_resource *prsc = psurf->texture;
777
struct vc4_resource *rsc = vc4_resource(prsc);
778
uint32_t *map = vc4_bo_map(rsc->bo);
779
uint32_t stride = rsc->slices[0].stride / 4;
780
uint32_t width = psurf->width;
781
uint32_t height = psurf->height;
782
uint32_t chunk_w = width / 79;
783
uint32_t chunk_h = height / 40;
784
uint32_t found_colors[10] = { 0 };
785
uint32_t num_found_colors = 0;
787
if (rsc->vc4_format != VC4_TEXTURE_TYPE_RGBA32R) {
788
fprintf(stderr, "%s: Unsupported format %s\n",
789
__func__, util_format_short_name(psurf->format));
793
for (int by = 0; by < height; by += chunk_h) {
794
for (int bx = 0; bx < width; bx += chunk_w) {
795
int all_found_color = -1; /* nothing found */
797
for (int y = by; y < MIN2(height, by + chunk_h); y++) {
798
for (int x = bx; x < MIN2(width, bx + chunk_w); x++) {
799
uint32_t pix = map[y * stride + x];
802
for (i = 0; i < num_found_colors; i++) {
803
if (pix == found_colors[i])
806
if (i == num_found_colors &&
808
ARRAY_SIZE(found_colors)) {
809
found_colors[num_found_colors++] = pix;
812
if (i < num_found_colors) {
813
if (all_found_color == -1)
815
else if (i != all_found_color)
816
all_found_color = ARRAY_SIZE(found_colors);
820
/* If all pixels for this chunk have a consistent
821
* value, then print a character for it. Either a
822
* fixed name (particularly common for piglit tests),
823
* or a runtime-generated number.
825
if (all_found_color >= 0 &&
826
all_found_color < ARRAY_SIZE(found_colors)) {
827
static const struct {
839
for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
840
if (named_colors[i].val ==
841
found_colors[all_found_color]) {
842
fprintf(stderr, "%s",
847
/* For unnamed colors, print a number and the
848
* numbers will have values printed at the
851
if (i == ARRAY_SIZE(named_colors)) {
852
fprintf(stderr, "%c",
853
'0' + all_found_color);
856
/* If there's no consistent color, print this.
858
fprintf(stderr, ".");
861
fprintf(stderr, "\n");
864
for (int i = 0; i < num_found_colors; i++) {
865
fprintf(stderr, "color %d: 0x%08x\n", i, found_colors[i]);
870
vc4_surface_msaa_get_sample(struct pipe_surface *psurf,
871
uint32_t x, uint32_t y, uint32_t sample)
873
struct pipe_resource *prsc = psurf->texture;
874
struct vc4_resource *rsc = vc4_resource(prsc);
875
uint32_t tile_w = 32, tile_h = 32;
876
uint32_t tiles_w = DIV_ROUND_UP(psurf->width, 32);
878
uint32_t tile_x = x / tile_w;
879
uint32_t tile_y = y / tile_h;
880
uint32_t *tile = (vc4_bo_map(rsc->bo) +
881
VC4_TILE_BUFFER_SIZE * (tile_y * tiles_w + tile_x));
882
uint32_t subtile_x = x % tile_w;
883
uint32_t subtile_y = y % tile_h;
885
uint32_t quad_samples = VC4_MAX_SAMPLES * 4;
886
uint32_t tile_stride = quad_samples * tile_w / 2;
888
return *((uint32_t *)tile +
889
(subtile_y >> 1) * tile_stride +
890
(subtile_x >> 1) * quad_samples +
891
((subtile_y & 1) << 1) +
897
vc4_dump_surface_msaa_char(struct pipe_surface *psurf,
898
uint32_t start_x, uint32_t start_y,
899
uint32_t w, uint32_t h)
901
bool all_same_color = true;
902
uint32_t all_pix = 0;
904
for (int y = start_y; y < start_y + h; y++) {
905
for (int x = start_x; x < start_x + w; x++) {
906
for (int s = 0; s < VC4_MAX_SAMPLES; s++) {
907
uint32_t pix = vc4_surface_msaa_get_sample(psurf,
910
if (x == start_x && y == start_y)
912
else if (all_pix != pix)
913
all_same_color = false;
917
if (all_same_color) {
918
static const struct {
930
for (i = 0; i < ARRAY_SIZE(named_colors); i++) {
931
if (named_colors[i].val == all_pix) {
932
fprintf(stderr, "%s",
937
fprintf(stderr, "x");
939
fprintf(stderr, ".");
944
vc4_dump_surface_msaa(struct pipe_surface *psurf)
946
uint32_t tile_w = 32, tile_h = 32;
947
uint32_t tiles_w = DIV_ROUND_UP(psurf->width, tile_w);
948
uint32_t tiles_h = DIV_ROUND_UP(psurf->height, tile_h);
949
uint32_t char_w = 140, char_h = 60;
950
uint32_t char_w_per_tile = char_w / tiles_w - 1;
951
uint32_t char_h_per_tile = char_h / tiles_h - 1;
953
fprintf(stderr, "Surface: %dx%d (%dx MSAA)\n",
954
psurf->width, psurf->height, psurf->texture->nr_samples);
956
for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
957
fprintf(stderr, "-");
958
fprintf(stderr, "\n");
960
for (int ty = 0; ty < psurf->height; ty += tile_h) {
961
for (int y = 0; y < char_h_per_tile; y++) {
963
for (int tx = 0; tx < psurf->width; tx += tile_w) {
964
for (int x = 0; x < char_w_per_tile; x++) {
965
uint32_t bx1 = (x * tile_w /
967
uint32_t bx2 = ((x + 1) * tile_w /
969
uint32_t by1 = (y * tile_h /
971
uint32_t by2 = ((y + 1) * tile_h /
974
vc4_dump_surface_msaa_char(psurf,
980
fprintf(stderr, "|");
982
fprintf(stderr, "\n");
985
for (int x = 0; x < (char_w_per_tile + 1) * tiles_w; x++)
986
fprintf(stderr, "-");
987
fprintf(stderr, "\n");
991
/** Debug routine to dump the contents of an 8888 surface to the console */
993
vc4_dump_surface(struct pipe_surface *psurf)
998
if (psurf->texture->nr_samples > 1)
999
vc4_dump_surface_msaa(psurf);
1001
vc4_dump_surface_non_msaa(psurf);
1005
vc4_flush_resource(struct pipe_context *pctx, struct pipe_resource *resource)
1007
/* All calls to flush_resource are followed by a flush of the context,
1008
* so there's nothing to do.
1013
vc4_update_shadow_baselevel_texture(struct pipe_context *pctx,
1014
struct pipe_sampler_view *pview)
1016
struct vc4_context *vc4 = vc4_context(pctx);
1017
struct vc4_sampler_view *view = vc4_sampler_view(pview);
1018
struct vc4_resource *shadow = vc4_resource(view->texture);
1019
struct vc4_resource *orig = vc4_resource(pview->texture);
1021
assert(view->texture != pview->texture);
1023
if (shadow->writes == orig->writes && orig->bo->private)
1026
perf_debug("Updating %dx%d@%d shadow texture due to %s\n",
1027
orig->base.width0, orig->base.height0,
1028
pview->u.tex.first_level,
1029
pview->u.tex.first_level ? "base level" : "raster layout");
1031
for (int i = 0; i <= shadow->base.last_level; i++) {
1032
unsigned width = u_minify(shadow->base.width0, i);
1033
unsigned height = u_minify(shadow->base.height0, i);
1034
struct pipe_blit_info info = {
1036
.resource = &shadow->base,
1046
.format = shadow->base.format,
1049
.resource = &orig->base,
1050
.level = pview->u.tex.first_level + i,
1059
.format = orig->base.format,
1063
pctx->blit(pctx, &info);
1066
shadow->writes = orig->writes;
1070
* Converts a 4-byte index buffer to 2 bytes.
1072
* Since GLES2 only has support for 1 and 2-byte indices, the hardware doesn't
1073
* include 4-byte index support, and we have to shrink it down.
1075
* There's no fallback support for when indices end up being larger than 2^16,
1076
* though it will at least assertion fail. Also, if the original index data
1077
* was in user memory, it would be nice to not have uploaded it to a VBO
1078
* before translating.
1080
struct pipe_resource *
1081
vc4_get_shadow_index_buffer(struct pipe_context *pctx,
1082
const struct pipe_draw_info *info,
1085
uint32_t *shadow_offset)
1087
struct vc4_context *vc4 = vc4_context(pctx);
1088
struct vc4_resource *orig = vc4_resource(info->index.resource);
1089
perf_debug("Fallback conversion for %d uint indices\n", count);
1092
struct pipe_resource *shadow_rsc = NULL;
1093
u_upload_alloc(vc4->uploader, 0, count * 2, 4,
1094
shadow_offset, &shadow_rsc, &data);
1095
uint16_t *dst = data;
1097
struct pipe_transfer *src_transfer = NULL;
1098
const uint32_t *src;
1099
if (info->has_user_indices) {
1100
src = (uint32_t*)((char*)info->index.user + offset);
1102
src = pipe_buffer_map_range(pctx, &orig->base,
1105
PIPE_MAP_READ, &src_transfer);
1108
for (int i = 0; i < count; i++) {
1109
uint32_t src_index = src[i];
1110
assert(src_index <= 0xffff);
1115
pctx->buffer_unmap(pctx, src_transfer);
1120
static const struct u_transfer_vtbl transfer_vtbl = {
1121
.resource_create = vc4_resource_create,
1122
.resource_destroy = vc4_resource_destroy,
1123
.transfer_map = vc4_resource_transfer_map,
1124
.transfer_unmap = vc4_resource_transfer_unmap,
1125
.transfer_flush_region = u_default_transfer_flush_region,
1129
vc4_resource_screen_init(struct pipe_screen *pscreen)
1131
struct vc4_screen *screen = vc4_screen(pscreen);
1133
pscreen->resource_create = vc4_resource_create;
1134
pscreen->resource_create_with_modifiers =
1135
vc4_resource_create_with_modifiers;
1136
pscreen->resource_from_handle = vc4_resource_from_handle;
1137
pscreen->resource_get_handle = vc4_resource_get_handle;
1138
pscreen->resource_get_param = vc4_resource_get_param;
1139
pscreen->resource_destroy = vc4_resource_destroy;
1140
pscreen->transfer_helper = u_transfer_helper_create(&transfer_vtbl,
1145
/* Test if the kernel has GET_TILING; it will return -EINVAL if the
1146
* ioctl does not exist, but -ENOENT if we pass an impossible handle.
1147
* 0 cannot be a valid GEM object, so use that.
1149
struct drm_vc4_get_tiling get_tiling = {
1152
int ret = vc4_ioctl(screen->fd, DRM_IOCTL_VC4_GET_TILING, &get_tiling);
1153
if (ret == -1 && errno == ENOENT)
1154
screen->has_tiling_ioctl = true;
1158
vc4_resource_context_init(struct pipe_context *pctx)
1160
pctx->buffer_map = u_transfer_helper_transfer_map;
1161
pctx->texture_map = u_transfer_helper_transfer_map;
1162
pctx->transfer_flush_region = u_transfer_helper_transfer_flush_region;
1163
pctx->buffer_unmap = u_transfer_helper_transfer_unmap;
1164
pctx->texture_unmap = u_transfer_helper_transfer_unmap;
1165
pctx->buffer_subdata = u_default_buffer_subdata;
1166
pctx->texture_subdata = vc4_texture_subdata;
1167
pctx->create_surface = vc4_create_surface;
1168
pctx->surface_destroy = vc4_surface_destroy;
1169
pctx->resource_copy_region = util_resource_copy_region;
1170
pctx->blit = vc4_blit;
1171
pctx->flush_resource = vc4_flush_resource;
added
removed
src/gallium/drivers/vc4/vc4_resource.c
