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* Copyright (c) 2017 Lima Project
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* Copyright (c) 2013 Ben Brewer (ben.brewer@codethink.co.uk)
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* Copyright (c) 2013 Connor Abbott (connor@abbott.cx)
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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#ifndef LIMA_IR_PP_CODEGEN_H
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#define LIMA_IR_PP_CODEGEN_H
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typedef union __attribute__((__packed__)) {
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struct __attribute__((__packed__)) {
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unsigned next_count : 6;
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ppir_codegen_field_shift_varying = 0,
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ppir_codegen_field_shift_sampler = 1,
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ppir_codegen_field_shift_uniform = 2,
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ppir_codegen_field_shift_vec4_mul = 3,
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ppir_codegen_field_shift_float_mul = 4,
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ppir_codegen_field_shift_vec4_acc = 5,
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ppir_codegen_field_shift_float_acc = 6,
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ppir_codegen_field_shift_combine = 7,
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ppir_codegen_field_shift_temp_write = 8,
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ppir_codegen_field_shift_branch = 9,
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ppir_codegen_field_shift_vec4_const_0 = 10,
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ppir_codegen_field_shift_vec4_const_1 = 11,
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ppir_codegen_field_shift_count = 12,
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} ppir_codegen_field_shift;
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ppir_codegen_vec4_reg_frag_color = 0,
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ppir_codegen_vec4_reg_constant0 = 12,
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ppir_codegen_vec4_reg_constant1 = 13,
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ppir_codegen_vec4_reg_texture = 14,
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ppir_codegen_vec4_reg_uniform = 15,
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ppir_codegen_vec4_reg_discard = 15,
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} ppir_codegen_vec4_reg;
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typedef union __attribute__((__packed__)) {
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struct __attribute__((__packed__)) {
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unsigned perspective : 2;
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unsigned source_type : 2;
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unsigned unknown_0 : 1; /* = 0 */
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unsigned alignment : 2;
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unsigned unknown_1 : 3; /* = 00 0 */
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unsigned offset_vector : 4;
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unsigned unknown_2 : 2; /* = 00 */
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unsigned offset_scalar : 2;
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ppir_codegen_vec4_reg dest : 4;
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unsigned unknown_3 : 2; /* = 00 */
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struct __attribute__((__packed__)) {
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unsigned perspective : 2;
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unsigned source_type : 2; /* = 01 */
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unsigned unknown_0 : 2; /* = 00 */
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unsigned unknown_1 : 3;
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ppir_codegen_vec4_reg source : 4;
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ppir_codegen_vec4_reg dest : 4;
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unsigned unknown_2 : 2; /* = 00 */
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} ppir_codegen_field_varying;
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ppir_codegen_sampler_type_generic = 0x00,
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ppir_codegen_sampler_type_cube = 0x1F,
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} ppir_codegen_sampler_type;
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typedef struct __attribute__((__packed__)) {
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unsigned lod_bias : 6;
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unsigned index_offset : 6;
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unsigned unknown_0 : 5; /* = 00000 */
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bool explicit_lod : 1;
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bool lod_bias_en : 1;
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unsigned unknown_1 : 5; /* = 00000 */
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ppir_codegen_sampler_type type : 5;
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unsigned unknown_2 : 20; /* = 0011 1001 0000 0000 0001 */
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} ppir_codegen_field_sampler;
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ppir_codegen_uniform_src_uniform = 0,
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ppir_codegen_uniform_src_temporary = 3,
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} ppir_codegen_uniform_src;
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typedef struct __attribute__((__packed__)) {
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ppir_codegen_uniform_src source : 2;
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unsigned unknown_0 : 8; /* = 00 0000 00 */
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unsigned alignment : 2; /* 00: float, 01: vec2, 10: vec4 */
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unsigned unknown_1 : 6; /* = 00 0000 */
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unsigned offset_reg : 6;
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} ppir_codegen_field_uniform;
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ppir_codegen_vec4_mul_op_not = 0x08, /* Logical Not */
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ppir_codegen_vec4_mul_op_and = 0x09, /* Logical AND */
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ppir_codegen_vec4_mul_op_or = 0x0A, /* Logical OR */
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ppir_codegen_vec4_mul_op_xor = 0x0B, /* Logical XOR */
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ppir_codegen_vec4_mul_op_ne = 0x0C, /* Not Equal */
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ppir_codegen_vec4_mul_op_gt = 0x0D, /* Great Than */
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ppir_codegen_vec4_mul_op_ge = 0x0E, /* Great than or Equal */
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ppir_codegen_vec4_mul_op_eq = 0x0F, /* Equal */
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ppir_codegen_vec4_mul_op_min = 0x10, /* Minimum */
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ppir_codegen_vec4_mul_op_max = 0x11, /* Maximum */
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ppir_codegen_vec4_mul_op_mov = 0x1F, /* Passthrough, result = arg1 */
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} ppir_codegen_vec4_mul_op;
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ppir_codegen_outmod_none = 0,
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ppir_codegen_outmod_clamp_fraction = 1,
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ppir_codegen_outmod_clamp_positive = 2,
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ppir_codegen_outmod_round = 3,
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} ppir_codegen_outmod;
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typedef struct __attribute__((__packed__)) {
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ppir_codegen_vec4_reg arg0_source : 4;
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unsigned arg0_swizzle : 8;
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bool arg0_absolute : 1;
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bool arg0_negate : 1;
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ppir_codegen_vec4_reg arg1_source : 4;
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unsigned arg1_swizzle : 8;
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bool arg1_absolute : 1;
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bool arg1_negate : 1;
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ppir_codegen_outmod dest_modifier : 2;
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ppir_codegen_vec4_mul_op op : 5;
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} ppir_codegen_field_vec4_mul;
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ppir_codegen_vec4_acc_op_add = 0x00,
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ppir_codegen_vec4_acc_op_fract = 0x04, /* Fract? */
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ppir_codegen_vec4_acc_op_ne = 0x08, /* Not Equal */
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ppir_codegen_vec4_acc_op_gt = 0x09, /* Great-Than */
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ppir_codegen_vec4_acc_op_ge = 0x0A, /* Great-than or Equal */
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ppir_codegen_vec4_acc_op_eq = 0x0B, /* Equal */
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ppir_codegen_vec4_acc_op_floor = 0x0C,
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ppir_codegen_vec4_acc_op_ceil = 0x0D,
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ppir_codegen_vec4_acc_op_min = 0x0E,
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ppir_codegen_vec4_acc_op_max = 0x0F,
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ppir_codegen_vec4_acc_op_sum3 = 0x10, /* dest.xyzw = (arg0.x + arg0.y + arg0.z) */
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ppir_codegen_vec4_acc_op_sum4 = 0x11, /* dest.xyzw = (arg0.x + arg0.y + arg0.z + arg0.w) */
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ppir_codegen_vec4_acc_op_dFdx = 0x14,
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ppir_codegen_vec4_acc_op_dFdy = 0x15,
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ppir_codegen_vec4_acc_op_sel = 0x17, /* result = (^fmul ? arg0 : arg1) */
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ppir_codegen_vec4_acc_op_mov = 0x1F, /* Passthrough, result = arg0 */
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} ppir_codegen_vec4_acc_op;
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typedef struct __attribute__((__packed__)) {
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ppir_codegen_vec4_reg arg0_source : 4;
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unsigned arg0_swizzle : 8;
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bool arg0_absolute : 1;
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bool arg0_negate : 1;
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ppir_codegen_vec4_reg arg1_source : 4;
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unsigned arg1_swizzle : 8;
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bool arg1_absolute : 1;
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bool arg1_negate : 1;
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ppir_codegen_outmod dest_modifier : 2;
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ppir_codegen_vec4_acc_op op : 5;
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bool mul_in : 1; /* whether to get arg0 from multiply unit below */
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} ppir_codegen_field_vec4_acc;
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/* Float (Scalar) Pipe */
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ppir_codegen_float_mul_op_not = 0x08, /* Logical Not */
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ppir_codegen_float_mul_op_and = 0x09, /* Logical AND */
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ppir_codegen_float_mul_op_or = 0x0A, /* Logical OR */
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ppir_codegen_float_mul_op_xor = 0x0B, /* Logical XOR */
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ppir_codegen_float_mul_op_ne = 0x0C, /* Not Equal */
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ppir_codegen_float_mul_op_gt = 0x0D, /* Great Than */
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ppir_codegen_float_mul_op_ge = 0x0E, /* great than or Equal */
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ppir_codegen_float_mul_op_eq = 0x0F, /* Equal */
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ppir_codegen_float_mul_op_min = 0x10, /* Minimum */
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ppir_codegen_float_mul_op_max = 0x11, /* Maximum */
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ppir_codegen_float_mul_op_mov = 0x1F, /* Passthrough, result = arg1 */
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} ppir_codegen_float_mul_op;
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typedef struct __attribute__((__packed__)) {
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unsigned arg0_source : 6;
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bool arg0_absolute : 1;
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bool arg0_negate : 1;
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unsigned arg1_source : 6;
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bool arg1_absolute : 1;
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bool arg1_negate : 1;
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bool output_en : 1; /* Set to 0 when outputting directly to float_acc below. */
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ppir_codegen_outmod dest_modifier : 2;
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ppir_codegen_float_mul_op op : 5;
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} ppir_codegen_field_float_mul;
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ppir_codegen_float_acc_op_add = 0x00,
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ppir_codegen_float_acc_op_fract = 0x04,
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ppir_codegen_float_acc_op_ne = 0x08, /* Not Equal */
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ppir_codegen_float_acc_op_gt = 0x09, /* Great-Than */
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ppir_codegen_float_acc_op_ge = 0x0A, /* Great-than or Equal */
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ppir_codegen_float_acc_op_eq = 0x0B, /* Equal */
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ppir_codegen_float_acc_op_floor = 0x0C,
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ppir_codegen_float_acc_op_ceil = 0x0D,
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ppir_codegen_float_acc_op_min = 0x0E,
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ppir_codegen_float_acc_op_max = 0x0F,
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ppir_codegen_float_acc_op_dFdx = 0x14,
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ppir_codegen_float_acc_op_dFdy = 0x15,
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ppir_codegen_float_acc_op_sel = 0x17, /* result = (^fmul ? arg0 : arg1) */
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ppir_codegen_float_acc_op_mov = 0x1F, /* Passthrough, result = arg1 */
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} ppir_codegen_float_acc_op;
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typedef struct __attribute__((__packed__)) {
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unsigned arg0_source : 6;
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bool arg0_absolute : 1;
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bool arg0_negate : 1;
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unsigned arg1_source : 6;
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bool arg1_absolute : 1;
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bool arg1_negate : 1;
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bool output_en : 1; /* Always true */
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ppir_codegen_outmod dest_modifier : 2;
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ppir_codegen_float_acc_op op : 5;
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bool mul_in : 1; /* Get arg1 from float_mul above. */
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} ppir_codegen_field_float_acc;
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/* Temporary Write / Framebuffer Read */
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typedef union __attribute__((__packed__)) {
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struct __attribute__((__packed__)) {
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unsigned dest : 2; /* = 11 */
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unsigned unknown_0 : 2; /* = 00 */
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unsigned alignment : 2; /* 0: float, 1:vec2, 2: vec4 */
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unsigned unknown_1 : 6; /* = 00 0000 */
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unsigned offset_reg : 6;
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struct __attribute__((__packed__)) {
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bool source : 1; /* 0 = fb_depth, 1 = fb_color */
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unsigned unknown_0 : 5; /* = 00 111 */
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unsigned unknown_1 : 31; /* = 0 0000 ... 10 */
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} ppir_codegen_field_temp_write;
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/* Result combiner */
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ppir_codegen_combine_scalar_op_rcp = 0, /* Reciprocal */
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ppir_codegen_combine_scalar_op_mov = 1, /* No Operation */
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ppir_codegen_combine_scalar_op_sqrt = 2, /* Square-Root */
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ppir_codegen_combine_scalar_op_rsqrt = 3, /* Inverse Square-Root */
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ppir_codegen_combine_scalar_op_exp2 = 4, /* Binary Exponent */
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ppir_codegen_combine_scalar_op_log2 = 5, /* Binary Logarithm */
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ppir_codegen_combine_scalar_op_sin = 6, /* Sine (Scaled LUT) */
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ppir_codegen_combine_scalar_op_cos = 7, /* Cosine (Scaled LUT) */
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ppir_codegen_combine_scalar_op_atan = 8, /* Arc Tangent Part 1 */
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ppir_codegen_combine_scalar_op_atan2 = 9, /* Arc Tangent 2 Part 1 */
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} ppir_codegen_combine_scalar_op;
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typedef union __attribute__((__packed__)) {
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struct __attribute__((__packed__)) {
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ppir_codegen_combine_scalar_op op : 4;
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bool arg1_absolute : 1;
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bool arg1_negate : 1;
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unsigned arg1_src : 6;
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bool arg0_absolute : 1;
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bool arg0_negate : 1;
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unsigned arg0_src : 6;
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ppir_codegen_outmod dest_modifier : 2;
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struct __attribute__((__packed__)) {
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unsigned arg1_swizzle : 8;
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unsigned arg1_source : 4;
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unsigned padding_0 : 8;
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} ppir_codegen_field_combine;
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/* Branch/Control Flow */
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#define PPIR_CODEGEN_DISCARD_WORD0 0x007F0003
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#define PPIR_CODEGEN_DISCARD_WORD1 0x00000000
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#define PPIR_CODEGEN_DISCARD_WORD2 0x000
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typedef union __attribute__((__packed__)) {
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struct __attribute__((__packed__)) {
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unsigned unknown_0 : 4; /* = 0000 */
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unsigned arg1_source : 6;
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unsigned arg0_source : 6;
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unsigned unknown_1 : 22; /* = 0 0000 0000 0000 0000 0000 0 */
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unsigned next_count : 5;
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struct __attribute__((__packed__)) {
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} ppir_codegen_field_branch;
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void ppir_disassemble_instr(uint32_t *instr, unsigned offset, FILE *fp);