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* Copyright (c) 2018 Collabora LTD
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* Author: Gert Wollny <gert.wollny@collabora.com>
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* on the rights to use, copy, modify, merge, publish, distribute, sub
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* license, and/or sell copies of the Software, and to permit persons to whom
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* the Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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#include "sfn_shader_compute.h"
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#include "sfn_instruction_fetch.h"
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ComputeShaderFromNir::ComputeShaderFromNir(r600_pipe_shader *sh,
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r600_pipe_shader_selector& sel,
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UNUSED const r600_shader_key& key,
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enum chip_class chip_class):
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ShaderFromNirProcessor (PIPE_SHADER_COMPUTE, sel, sh->shader,
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sh->scratch_space_needed, chip_class, 0),
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m_reserved_registers(0)
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bool ComputeShaderFromNir::scan_sysvalue_access(UNUSED nir_instr *instr)
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bool ComputeShaderFromNir::do_allocate_reserved_registers()
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int thread_id_sel = m_reserved_registers++;
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int wg_id_sel = m_reserved_registers++;
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for (int i = 0; i < 3; ++i) {
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auto tmp = new GPRValue(thread_id_sel, i);
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tmp->set_keep_alive();
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m_local_invocation_id[i] = PValue(tmp);
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inject_register(tmp->sel(), i, m_local_invocation_id[i], false);
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tmp = new GPRValue(wg_id_sel, i);
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tmp->set_keep_alive();
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m_workgroup_id[i] = PValue(tmp);
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inject_register(tmp->sel(), i, m_workgroup_id[i], false);
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bool ComputeShaderFromNir::emit_intrinsic_instruction_override(nir_intrinsic_instr* instr)
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switch (instr->intrinsic) {
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case nir_intrinsic_load_local_invocation_id:
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return emit_load_3vec(instr, m_local_invocation_id);
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case nir_intrinsic_load_workgroup_id:
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return emit_load_3vec(instr, m_workgroup_id);
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case nir_intrinsic_load_num_workgroups:
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return emit_load_num_workgroups(instr);
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bool ComputeShaderFromNir::emit_load_3vec(nir_intrinsic_instr* instr,
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const std::array<PValue,3>& src)
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for (int i = 0; i < 3; ++i)
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load_preloaded_value(instr->dest, i, src[i], i == 2);
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bool ComputeShaderFromNir::emit_load_num_workgroups(nir_intrinsic_instr* instr)
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PValue a_zero = get_temp_register(1);
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emit_instruction(new AluInstruction(op1_mov, a_zero, Value::zero, EmitInstruction::last_write));
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for (int i = 0; i < 3; ++i)
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dest.set_reg_i(i, from_nir(instr->dest, i));
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dest.set_reg_i(3, from_nir(instr->dest, 7));
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auto ir = new FetchInstruction(vc_fetch, no_index_offset,
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fmt_32_32_32_32, vtx_nf_int, vtx_es_none, a_zero, dest, 16,
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false, 16, R600_BUFFER_INFO_CONST_BUFFER, 0,
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bim_none, false, false, 0, 0, 0, PValue(), {0,1,2,7});
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ir->set_flag(vtx_srf_mode);
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emit_instruction(ir);
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void ComputeShaderFromNir::do_finalize()