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* Copyright © 2015 Intel Corporation
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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#include <sys/ioctl.h>
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#include <sys/types.h>
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#include "anv_private.h"
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#include "common/intel_defines.h"
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#include "common/intel_gem.h"
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* Wrapper around DRM_IOCTL_I915_GEM_CREATE.
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* Return gem handle, or 0 on failure. Gem handles are never 0.
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anv_gem_create(struct anv_device *device, uint64_t size)
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struct drm_i915_gem_create gem_create = {
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_CREATE, &gem_create);
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/* FIXME: What do we do if this fails? */
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return gem_create.handle;
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anv_gem_close(struct anv_device *device, uint32_t gem_handle)
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struct drm_gem_close close = {
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intel_ioctl(device->fd, DRM_IOCTL_GEM_CLOSE, &close);
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anv_gem_create_regions(struct anv_device *device, uint64_t anv_bo_size,
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struct drm_i915_gem_memory_class_instance *regions)
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struct drm_i915_gem_create_ext_memory_regions ext_regions = {
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.base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
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.num_regions = num_regions,
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.regions = (uintptr_t)regions,
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struct drm_i915_gem_create_ext gem_create = {
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.extensions = (uintptr_t) &ext_regions,
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_CREATE_EXT,
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return gem_create.handle;
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* Wrapper around DRM_IOCTL_I915_GEM_MMAP. Returns MAP_FAILED on error.
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anv_gem_mmap_offset(struct anv_device *device, uint32_t gem_handle,
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uint64_t offset, uint64_t size, uint32_t flags)
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struct drm_i915_gem_mmap_offset gem_mmap = {
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.handle = gem_handle,
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.flags = device->info.has_local_mem ? I915_MMAP_OFFSET_FIXED :
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(flags & I915_MMAP_WC) ? I915_MMAP_OFFSET_WC : I915_MMAP_OFFSET_WB,
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/* Get the fake offset back */
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_MMAP_OFFSET, &gem_mmap);
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void *map = mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_SHARED,
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device->fd, gem_mmap.offset);
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anv_gem_mmap_legacy(struct anv_device *device, uint32_t gem_handle,
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uint64_t offset, uint64_t size, uint32_t flags)
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assert(!device->info.has_local_mem);
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struct drm_i915_gem_mmap gem_mmap = {
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.handle = gem_handle,
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_MMAP, &gem_mmap);
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return (void *)(uintptr_t) gem_mmap.addr_ptr;
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* Wrapper around DRM_IOCTL_I915_GEM_MMAP. Returns MAP_FAILED on error.
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anv_gem_mmap(struct anv_device *device, uint32_t gem_handle,
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uint64_t offset, uint64_t size, uint32_t flags)
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if (device->physical->has_mmap_offset)
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map = anv_gem_mmap_offset(device, gem_handle, offset, size, flags);
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map = anv_gem_mmap_legacy(device, gem_handle, offset, size, flags);
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if (map != MAP_FAILED)
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VG(VALGRIND_MALLOCLIKE_BLOCK(map, size, 0, 1));
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/* This is just a wrapper around munmap, but it also notifies valgrind that
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* this map is no longer valid. Pair this with anv_gem_mmap().
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anv_gem_munmap(struct anv_device *device, void *p, uint64_t size)
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VG(VALGRIND_FREELIKE_BLOCK(p, 0));
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anv_gem_userptr(struct anv_device *device, void *mem, size_t size)
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struct drm_i915_gem_userptr userptr = {
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.user_ptr = (__u64)((unsigned long) mem),
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if (device->physical->has_userptr_probe)
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userptr.flags |= I915_USERPTR_PROBE;
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_USERPTR, &userptr);
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return userptr.handle;
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anv_gem_set_caching(struct anv_device *device,
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uint32_t gem_handle, uint32_t caching)
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struct drm_i915_gem_caching gem_caching = {
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.handle = gem_handle,
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return intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_CACHING, &gem_caching);
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anv_gem_set_domain(struct anv_device *device, uint32_t gem_handle,
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uint32_t read_domains, uint32_t write_domain)
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struct drm_i915_gem_set_domain gem_set_domain = {
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.handle = gem_handle,
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.read_domains = read_domains,
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.write_domain = write_domain,
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return intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_DOMAIN, &gem_set_domain);
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* Returns 0, 1, or negative to indicate error
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anv_gem_busy(struct anv_device *device, uint32_t gem_handle)
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struct drm_i915_gem_busy busy = {
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.handle = gem_handle,
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_BUSY, &busy);
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return busy.busy != 0;
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* On error, \a timeout_ns holds the remaining time.
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anv_gem_wait(struct anv_device *device, uint32_t gem_handle, int64_t *timeout_ns)
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struct drm_i915_gem_wait wait = {
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.bo_handle = gem_handle,
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.timeout_ns = *timeout_ns,
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_WAIT, &wait);
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*timeout_ns = wait.timeout_ns;
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anv_gem_execbuffer(struct anv_device *device,
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struct drm_i915_gem_execbuffer2 *execbuf)
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if (execbuf->flags & I915_EXEC_FENCE_OUT)
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return intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2_WR, execbuf);
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return intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, execbuf);
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/** Return -1 on error. */
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anv_gem_get_tiling(struct anv_device *device, uint32_t gem_handle)
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struct drm_i915_gem_get_tiling get_tiling = {
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.handle = gem_handle,
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/* FIXME: On discrete platforms we don't have DRM_IOCTL_I915_GEM_GET_TILING
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* anymore, so we will need another way to get the tiling. Apparently this
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* is only used in Android code, so we may need some other way to
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* communicate the tiling mode.
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if (intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_GET_TILING, &get_tiling)) {
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assert(!"Failed to get BO tiling");
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return get_tiling.tiling_mode;
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anv_gem_set_tiling(struct anv_device *device,
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uint32_t gem_handle, uint32_t stride, uint32_t tiling)
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/* On discrete platforms we don't have DRM_IOCTL_I915_GEM_SET_TILING. So
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* nothing needs to be done.
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if (!device->info.has_tiling_uapi)
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/* set_tiling overwrites the input on the error path, so we have to open
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struct drm_i915_gem_set_tiling set_tiling = {
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.handle = gem_handle,
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.tiling_mode = tiling,
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ret = ioctl(device->fd, DRM_IOCTL_I915_GEM_SET_TILING, &set_tiling);
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} while (ret == -1 && (errno == EINTR || errno == EAGAIN));
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anv_gem_get_param(int fd, uint32_t param)
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drm_i915_getparam_t gp = {
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int ret = intel_ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
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anv_gem_has_context_priority(int fd, int priority)
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return !anv_gem_set_context_param(fd, 0, I915_CONTEXT_PARAM_PRIORITY,
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anv_gem_create_context(struct anv_device *device)
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struct drm_i915_gem_context_create create = { 0 };
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int ret = intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_CONTEXT_CREATE, &create);
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return create.ctx_id;
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anv_gem_destroy_context(struct anv_device *device, int context)
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struct drm_i915_gem_context_destroy destroy = {
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return intel_ioctl(device->fd, DRM_IOCTL_I915_GEM_CONTEXT_DESTROY, &destroy);
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anv_gem_set_context_param(int fd, int context, uint32_t param, uint64_t value)
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struct drm_i915_gem_context_param p = {
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if (intel_ioctl(fd, DRM_IOCTL_I915_GEM_CONTEXT_SETPARAM, &p))
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anv_gem_context_get_reset_stats(int fd, int context,
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uint32_t *active, uint32_t *pending)
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struct drm_i915_reset_stats stats = {
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int ret = intel_ioctl(fd, DRM_IOCTL_I915_GET_RESET_STATS, &stats);
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*active = stats.batch_active;
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*pending = stats.batch_pending;
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anv_gem_handle_to_fd(struct anv_device *device, uint32_t gem_handle)
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struct drm_prime_handle args = {
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.handle = gem_handle,
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.flags = DRM_CLOEXEC | DRM_RDWR,
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int ret = intel_ioctl(device->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &args);
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anv_gem_fd_to_handle(struct anv_device *device, int fd)
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struct drm_prime_handle args = {
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int ret = intel_ioctl(device->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &args);
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anv_gem_reg_read(int fd, uint32_t offset, uint64_t *result)
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struct drm_i915_reg_read args = {
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int ret = intel_ioctl(fd, DRM_IOCTL_I915_REG_READ, &args);
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struct drm_i915_query_engine_info *
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anv_gem_get_engine_info(int fd)
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return intel_i915_query_alloc(fd, DRM_I915_QUERY_ENGINE_INFO, NULL);