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/**************************************************************************
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* Copyright 2007 VMware, Inc.
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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**************************************************************************/
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* Render target tile caching.
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#include "util/u_inlines.h"
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#include "util/format/u_format.h"
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#include "util/u_memory.h"
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#include "util/u_tile.h"
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#include "sp_tile_cache.h"
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static struct softpipe_cached_tile *
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sp_alloc_tile(struct softpipe_tile_cache *tc);
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* Return the position in the cache for the tile that contains win pos (x,y).
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* We currently use a direct mapped cache so this is like a hack key.
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* At some point we should investigate something more sophisticated, like
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* a LRU replacement policy.
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#define CACHE_POS(x, y, l) \
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(((x) + (y) * 5 + (l) * 10) % NUM_ENTRIES)
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static inline int addr_to_clear_pos(union tile_address addr)
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pos = addr.bits.layer * (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE);
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pos += addr.bits.y * (MAX_WIDTH / TILE_SIZE);
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* Is the tile at (x,y) in cleared state?
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is_clear_flag_set(const uint *bitvec, union tile_address addr, unsigned max)
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pos = addr_to_clear_pos(addr);
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assert(pos / 32 < max);
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bit = bitvec[pos / 32] & (1 << (pos & 31));
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* Mark the tile at (x,y) as not cleared.
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clear_clear_flag(uint *bitvec, union tile_address addr, unsigned max)
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pos = addr_to_clear_pos(addr);
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assert(pos / 32 < max);
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bitvec[pos / 32] &= ~(1 << (pos & 31));
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struct softpipe_tile_cache *
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sp_create_tile_cache( struct pipe_context *pipe )
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struct softpipe_tile_cache *tc;
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/* sanity checking: max sure MAX_WIDTH/HEIGHT >= largest texture image */
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assert(MAX_WIDTH >= pipe->screen->get_param(pipe->screen,
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PIPE_CAP_MAX_TEXTURE_2D_SIZE));
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STATIC_ASSERT(sizeof(union tile_address) == 4);
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STATIC_ASSERT((TILE_SIZE << TILE_ADDR_BITS) >= MAX_WIDTH);
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tc = CALLOC_STRUCT( softpipe_tile_cache );
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for (pos = 0; pos < ARRAY_SIZE(tc->tile_addrs); pos++) {
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tc->tile_addrs[pos].bits.invalid = 1;
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tc->last_tile_addr.bits.invalid = 1;
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/* this allocation allows us to guarantee that allocation
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* failures are never fatal later
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tc->tile = MALLOC_STRUCT( softpipe_cached_tile );
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/* XXX this code prevents valgrind warnings about use of uninitialized
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* memory in programs that don't clear the surface before rendering.
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* However, it breaks clearing in other situations (such as in
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* progs/tests/drawbuffers, see bug 24402).
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/* set flags to indicate all the tiles are cleared */
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memset(tc->clear_flags, 255, sizeof(tc->clear_flags));
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sp_destroy_tile_cache(struct softpipe_tile_cache *tc)
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for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
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/*assert(tc->entries[pos].x < 0);*/
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FREE( tc->entries[pos] );
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for (i = 0; i < tc->num_maps; i++)
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if (tc->transfer[i]) {
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tc->pipe->texture_unmap(tc->pipe, tc->transfer[i]);
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FREE(tc->transfer_map);
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FREE(tc->clear_flags);
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* Specify the surface to cache.
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sp_tile_cache_set_surface(struct softpipe_tile_cache *tc,
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struct pipe_surface *ps)
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struct pipe_context *pipe = tc->pipe;
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if (ps == tc->surface)
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for (i = 0; i < tc->num_maps; i++) {
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pipe->texture_unmap(pipe, tc->transfer[i]);
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tc->transfer[i] = NULL;
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tc->transfer_map[i] = NULL;
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FREE(tc->transfer_map);
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FREE(tc->clear_flags);
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tc->clear_flags_size = 0;
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tc->num_maps = ps->u.tex.last_layer - ps->u.tex.first_layer + 1;
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tc->transfer = CALLOC(tc->num_maps, sizeof(struct pipe_transfer *));
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tc->transfer_map = CALLOC(tc->num_maps, sizeof(void *));
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tc->clear_flags_size = (MAX_WIDTH / TILE_SIZE) * (MAX_HEIGHT / TILE_SIZE) * tc->num_maps / 32 * sizeof(uint);
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tc->clear_flags = CALLOC(1, tc->clear_flags_size);
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if (ps->texture->target != PIPE_BUFFER) {
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for (i = 0; i < tc->num_maps; i++) {
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tc->transfer_map[i] = pipe_texture_map(pipe, ps->texture,
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ps->u.tex.level, ps->u.tex.first_layer + i,
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PIPE_MAP_READ_WRITE |
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PIPE_MAP_UNSYNCHRONIZED,
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0, 0, ps->width, ps->height,
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/* can't render to buffers */
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tc->depth_stencil = util_format_is_depth_or_stencil(ps->format);
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* Return the transfer being cached.
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struct pipe_surface *
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sp_tile_cache_get_surface(struct softpipe_tile_cache *tc)
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* Set pixels in a tile to the given clear color/value, float.
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clear_tile_rgba(struct softpipe_cached_tile *tile,
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enum pipe_format format,
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const union pipe_color_union *clear_value)
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if (clear_value->f[0] == 0.0 &&
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clear_value->f[1] == 0.0 &&
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clear_value->f[2] == 0.0 &&
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clear_value->f[3] == 0.0) {
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memset(tile->data.color, 0, sizeof(tile->data.color));
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if (util_format_is_pure_uint(format)) {
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for (i = 0; i < TILE_SIZE; i++) {
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for (j = 0; j < TILE_SIZE; j++) {
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tile->data.colorui128[i][j][0] = clear_value->ui[0];
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tile->data.colorui128[i][j][1] = clear_value->ui[1];
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tile->data.colorui128[i][j][2] = clear_value->ui[2];
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tile->data.colorui128[i][j][3] = clear_value->ui[3];
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} else if (util_format_is_pure_sint(format)) {
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for (i = 0; i < TILE_SIZE; i++) {
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for (j = 0; j < TILE_SIZE; j++) {
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tile->data.colori128[i][j][0] = clear_value->i[0];
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tile->data.colori128[i][j][1] = clear_value->i[1];
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tile->data.colori128[i][j][2] = clear_value->i[2];
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tile->data.colori128[i][j][3] = clear_value->i[3];
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for (i = 0; i < TILE_SIZE; i++) {
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for (j = 0; j < TILE_SIZE; j++) {
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tile->data.color[i][j][0] = clear_value->f[0];
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tile->data.color[i][j][1] = clear_value->f[1];
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tile->data.color[i][j][2] = clear_value->f[2];
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tile->data.color[i][j][3] = clear_value->f[3];
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* Set a tile to a solid value/color.
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clear_tile(struct softpipe_cached_tile *tile,
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enum pipe_format format,
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uint64_t clear_value)
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switch (util_format_get_blocksize(format)) {
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memset(tile->data.any, (int) clear_value, TILE_SIZE * TILE_SIZE);
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if (clear_value == 0) {
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memset(tile->data.any, 0, 2 * TILE_SIZE * TILE_SIZE);
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for (i = 0; i < TILE_SIZE; i++) {
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for (j = 0; j < TILE_SIZE; j++) {
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tile->data.depth16[i][j] = (ushort) clear_value;
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if (clear_value == 0) {
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memset(tile->data.any, 0, 4 * TILE_SIZE * TILE_SIZE);
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for (i = 0; i < TILE_SIZE; i++) {
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for (j = 0; j < TILE_SIZE; j++) {
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tile->data.depth32[i][j] = (uint) clear_value;
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if (clear_value == 0) {
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memset(tile->data.any, 0, 8 * TILE_SIZE * TILE_SIZE);
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for (i = 0; i < TILE_SIZE; i++) {
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for (j = 0; j < TILE_SIZE; j++) {
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tile->data.depth64[i][j] = clear_value;
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* Actually clear the tiles which were flagged as being in a clear state.
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sp_tile_cache_flush_clear(struct softpipe_tile_cache *tc, int layer)
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struct pipe_transfer *pt = tc->transfer[layer];
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const uint w = tc->transfer[layer]->box.width;
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const uint h = tc->transfer[layer]->box.height;
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assert(pt->resource);
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/* clear the scratch tile to the clear value */
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if (tc->depth_stencil) {
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clear_tile(tc->tile, pt->resource->format, tc->clear_val);
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clear_tile_rgba(tc->tile, pt->resource->format, &tc->clear_color);
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/* push the tile to all positions marked as clear */
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for (y = 0; y < h; y += TILE_SIZE) {
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for (x = 0; x < w; x += TILE_SIZE) {
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union tile_address addr = tile_address(x, y, layer);
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if (is_clear_flag_set(tc->clear_flags, addr, tc->clear_flags_size)) {
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/* write the scratch tile to the surface */
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if (tc->depth_stencil) {
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pipe_put_tile_raw(pt, tc->transfer_map[layer],
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x, y, TILE_SIZE, TILE_SIZE,
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tc->tile->data.any, 0/*STRIDE*/);
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pipe_put_tile_rgba(pt, tc->transfer_map[layer],
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x, y, TILE_SIZE, TILE_SIZE,
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tc->tile->data.color);
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debug_printf("num cleared: %u\n", numCleared);
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sp_flush_tile(struct softpipe_tile_cache* tc, unsigned pos)
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int layer = tc->tile_addrs[pos].bits.layer;
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if (!tc->tile_addrs[pos].bits.invalid) {
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if (tc->depth_stencil) {
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pipe_put_tile_raw(tc->transfer[layer], tc->transfer_map[layer],
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tc->tile_addrs[pos].bits.x * TILE_SIZE,
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tc->tile_addrs[pos].bits.y * TILE_SIZE,
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TILE_SIZE, TILE_SIZE,
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tc->entries[pos]->data.depth32, 0/*STRIDE*/);
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pipe_put_tile_rgba(tc->transfer[layer], tc->transfer_map[layer],
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tc->tile_addrs[pos].bits.x * TILE_SIZE,
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tc->tile_addrs[pos].bits.y * TILE_SIZE,
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TILE_SIZE, TILE_SIZE,
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tc->entries[pos]->data.color);
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tc->tile_addrs[pos].bits.invalid = 1; /* mark as empty */
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* Flush the tile cache: write all dirty tiles back to the transfer.
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* any tiles "flagged" as cleared will be "really" cleared.
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sp_flush_tile_cache(struct softpipe_tile_cache *tc)
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/* caching a drawing transfer */
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for (pos = 0; pos < ARRAY_SIZE(tc->entries); pos++) {
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struct softpipe_cached_tile *tile = tc->entries[pos];
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assert(tc->tile_addrs[pos].bits.invalid);
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sp_flush_tile(tc, pos);
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tc->tile = sp_alloc_tile(tc);
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for (i = 0; i < tc->num_maps; i++)
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sp_tile_cache_flush_clear(tc, i);
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/* reset all clear flags to zero */
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memset(tc->clear_flags, 0, tc->clear_flags_size);
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tc->last_tile_addr.bits.invalid = 1;
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debug_printf("flushed tiles in use: %d\n", inuse);
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static struct softpipe_cached_tile *
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sp_alloc_tile(struct softpipe_tile_cache *tc)
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struct softpipe_cached_tile * tile = MALLOC_STRUCT(softpipe_cached_tile);
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/* in this case, steal an existing tile */
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for (pos = 0; pos < ARRAY_SIZE(tc->entries); ++pos) {
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if (!tc->entries[pos])
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sp_flush_tile(tc, pos);
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tc->tile = tc->entries[pos];
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tc->entries[pos] = NULL;
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/* this should never happen */
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tc->last_tile_addr.bits.invalid = 1;
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* Get a tile from the cache.
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* \param x, y position of tile, in pixels
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struct softpipe_cached_tile *
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sp_find_cached_tile(struct softpipe_tile_cache *tc,
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union tile_address addr )
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struct pipe_transfer *pt;
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/* cache pos/entry: */
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const int pos = CACHE_POS(addr.bits.x,
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addr.bits.y, addr.bits.layer);
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struct softpipe_cached_tile *tile = tc->entries[pos];
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tile = sp_alloc_tile(tc);
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tc->entries[pos] = tile;
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if (addr.value != tc->tile_addrs[pos].value) {
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layer = tc->tile_addrs[pos].bits.layer;
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if (tc->tile_addrs[pos].bits.invalid == 0) {
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/* put dirty tile back in framebuffer */
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if (tc->depth_stencil) {
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pipe_put_tile_raw(tc->transfer[layer], tc->transfer_map[layer],
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tc->tile_addrs[pos].bits.x * TILE_SIZE,
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tc->tile_addrs[pos].bits.y * TILE_SIZE,
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TILE_SIZE, TILE_SIZE,
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tile->data.depth32, 0/*STRIDE*/);
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pipe_put_tile_rgba(tc->transfer[layer], tc->transfer_map[layer],
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tc->tile_addrs[pos].bits.x * TILE_SIZE,
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tc->tile_addrs[pos].bits.y * TILE_SIZE,
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TILE_SIZE, TILE_SIZE,
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tc->tile_addrs[pos] = addr;
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layer = tc->tile_addrs[pos].bits.layer;
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pt = tc->transfer[layer];
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assert(pt->resource);
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if (is_clear_flag_set(tc->clear_flags, addr, tc->clear_flags_size)) {
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/* don't get tile from framebuffer, just clear it */
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if (tc->depth_stencil) {
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clear_tile(tile, pt->resource->format, tc->clear_val);
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clear_tile_rgba(tile, pt->resource->format, &tc->clear_color);
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clear_clear_flag(tc->clear_flags, addr, tc->clear_flags_size);
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/* get new tile data from transfer */
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if (tc->depth_stencil) {
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pipe_get_tile_raw(tc->transfer[layer], tc->transfer_map[layer],
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tc->tile_addrs[pos].bits.x * TILE_SIZE,
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tc->tile_addrs[pos].bits.y * TILE_SIZE,
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TILE_SIZE, TILE_SIZE,
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tile->data.depth32, 0/*STRIDE*/);
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pipe_get_tile_rgba(tc->transfer[layer], tc->transfer_map[layer],
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tc->tile_addrs[pos].bits.x * TILE_SIZE,
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tc->tile_addrs[pos].bits.y * TILE_SIZE,
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TILE_SIZE, TILE_SIZE,
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tc->last_tile = tile;
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tc->last_tile_addr = addr;
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* When a whole surface is being cleared to a value we can avoid
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* fetching tiles above.
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* Save the color and set a 'clearflag' for each tile of the screen.
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sp_tile_cache_clear(struct softpipe_tile_cache *tc,
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const union pipe_color_union *color,
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tc->clear_color = *color;
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tc->clear_val = clearValue;
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/* set flags to indicate all the tiles are cleared */
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memset(tc->clear_flags, 255, tc->clear_flags_size);
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for (pos = 0; pos < ARRAY_SIZE(tc->tile_addrs); pos++) {
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tc->tile_addrs[pos].bits.invalid = 1;
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tc->last_tile_addr.bits.invalid = 1;