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  • Committer: mmach
  • Date: 2022-09-22 19:56:13 UTC
  • Revision ID: netbit73@gmail.com-20220922195613-wtik9mmy20tmor0i
2022-09-22 21:17:09

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src/freedreno/isa/ir3-cat1.xml
1
 
<?xml version="1.0" encoding="UTF-8"?>
2
 
<!--
3
 
Copyright © 2020 Google, Inc.
4
 
 
5
 
Permission is hereby granted, free of charge, to any person obtaining a
6
 
copy of this software and associated documentation files (the "Software"),
7
 
to deal in the Software without restriction, including without limitation
8
 
the rights to use, copy, modify, merge, publish, distribute, sublicense,
9
 
and/or sell copies of the Software, and to permit persons to whom the
10
 
Software is furnished to do so, subject to the following conditions:
11
 
 
12
 
The above copyright notice and this permission notice (including the next
13
 
paragraph) shall be included in all copies or substantial portions of the
14
 
Software.
15
 
 
16
 
THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
 
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
 
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19
 
THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
 
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21
 
OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22
 
SOFTWARE.
23
 
 -->
24
 
 
25
 
<isa>
26
 
 
27
 
<!--
28
 
        Cat1 Instruction(s):
29
 
 -->
30
 
 
31
 
<bitset name="#cat1-dst" size="8">
32
 
        <doc>
33
 
                Unlike other instruction categories, cat1 can have relative dest
34
 
        </doc>
35
 
        <override>
36
 
                <expr>
37
 
                        ({OFFSET} == 0) &amp;&amp; {DST_REL}
38
 
                </expr>
39
 
                <display>
40
 
                        r&lt;a0.x&gt;
41
 
                </display>
42
 
                <field name="OFFSET" low="0" high="7" type="uint"/>
43
 
        </override>
44
 
        <override>
45
 
                <expr>
46
 
                        {DST_REL}
47
 
                </expr>
48
 
                <display>
49
 
                        r&lt;a0.x + {OFFSET}&gt;
50
 
                </display>
51
 
                <field name="OFFSET" low="0" high="7" type="uint"/>
52
 
        </override>
53
 
        <display>
54
 
                {DST}
55
 
        </display>
56
 
        <field name="DST" low="0" high="7" type="#reg-gpr"/>
57
 
        <encode type="struct ir3_register *">
58
 
                <map name="DST">src</map>
59
 
                <map name="OFFSET">src->array.offset</map>
60
 
        </encode>
61
 
</bitset>
62
 
 
63
 
<enum name="#round">
64
 
        <value val="0" display=""/>
65
 
        <value val="1" display="(even)"/>
66
 
        <value val="2" display="(pos_infinity)"/>
67
 
        <value val="3" display="(neg_infinity)"/>
68
 
</enum>
69
 
 
70
 
<bitset name="#instruction-cat1" extends="#instruction">
71
 
        <pattern pos="42">0</pattern>
72
 
        <field name="SS" pos="44" type="bool" display="(ss)"/>
73
 
        <field name="UL" pos="45" type="bool" display="(ul)"/>
74
 
        <field name="ROUND" low="55" high="56" type="#round"/>
75
 
        <field name="JP" pos="59" type="bool" display="(jp)"/>
76
 
        <field name="SY" pos="60" type="bool" display="(sy)"/>
77
 
        <pattern low="61" high="63">001</pattern>  <!-- cat1 -->
78
 
        <encode>
79
 
                <map name="SRC">src->srcs[0]</map>
80
 
                <map name="SRC_R">!!(src->srcs[0]->flags &amp; IR3_REG_R)</map>
81
 
                <map name="UL">!!(src->flags &amp; IR3_INSTR_UL)</map>
82
 
                <map name="DST_REL">!!(src->dsts[0]->flags &amp; IR3_REG_RELATIV)</map>
83
 
                <map name="ROUND">src->cat1.round</map>
84
 
        </encode>
85
 
</bitset>
86
 
 
87
 
<bitset name="#instruction-cat1-typed" extends="#instruction-cat1">
88
 
        <derived name="HALF" type="bool" display="h">
89
 
                <expr>
90
 
                        ({SRC_TYPE} == 0) /* f16 */ ||
91
 
                        ({SRC_TYPE} == 2) /* u16 */ ||
92
 
                        ({SRC_TYPE} == 4) /* s16 */ ||
93
 
                        ({SRC_TYPE} == 6) /* u8 */  ||
94
 
                        ({SRC_TYPE} == 7) /* s8 */
95
 
                </expr>
96
 
        </derived>
97
 
        <derived name="DST_HALF" type="bool" display="h">
98
 
                <expr>
99
 
                        ({DST_TYPE} == 0) /* f16 */ ||
100
 
                        ({DST_TYPE} == 2) /* u16 */ ||
101
 
                        ({DST_TYPE} == 4) /* s16 */ ||
102
 
                        ({DST_TYPE} == 6) /* u8 */  ||
103
 
                        ({DST_TYPE} == 7) /* s8 */
104
 
                </expr>
105
 
        </derived>
106
 
        <field name="DST_TYPE" low="46" high="48" type="#type"/>
107
 
        <field name="SRC_TYPE" low="50" high="52" type="#type"/>
108
 
 
109
 
        <encode>
110
 
                <map name="DST_TYPE">src->cat1.dst_type</map>
111
 
                <map name="SRC_TYPE">src->cat1.src_type</map>
112
 
        </encode>
113
 
</bitset>
114
 
 
115
 
<bitset name="#instruction-cat1-mov" extends="#instruction-cat1-typed">
116
 
        <override>
117
 
                <expr>
118
 
                        ({DST} == 0xf4 /* a0.x */) &amp;&amp; ({SRC_TYPE} == 4 /* s16 */) &amp;&amp; ({DST_TYPE} == 4)
119
 
                </expr>
120
 
                <display>
121
 
                        {SY}{SS}{JP}{REPEAT}{UL}mova {ROUND}a0.x, {SRC}
122
 
                </display>
123
 
                <assert low="32" high="39">11110100</assert>  <!-- DST==a0.x -->
124
 
                <assert low="46" high="48">100</assert>       <!-- DST_TYPE==s16 -->
125
 
                <assert low="50" high="52">100</assert>       <!-- SRC_TYPE==s16 -->
126
 
        </override>
127
 
        <override>
128
 
                <expr>
129
 
                        ({DST} == 0xf5 /* a0.y */) &amp;&amp; ({SRC_TYPE} == 2 /* u16 */) &amp;&amp; ({DST_TYPE} == 2)
130
 
                </expr>
131
 
                <display>
132
 
                        {SY}{SS}{JP}{REPEAT}{UL}mova1 {ROUND}a1.x, {SRC}
133
 
                </display>
134
 
                <assert low="32" high="39">11110101</assert>  <!-- DST==a0.y -->
135
 
                <assert low="46" high="48">010</assert>       <!-- DST_TYPE==u16 -->
136
 
                <assert low="50" high="52">010</assert>       <!-- SRC_TYPE==u16 -->
137
 
        </override>
138
 
        <override>
139
 
                <expr>
140
 
                        {SRC_TYPE} != {DST_TYPE}
141
 
                </expr>
142
 
                <display>
143
 
                        {SY}{SS}{JP}{REPEAT}{UL}cov.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC}
144
 
                </display>
145
 
        </override>
146
 
        <display>
147
 
                {SY}{SS}{JP}{REPEAT}{UL}mov.{SRC_TYPE}{DST_TYPE} {ROUND}{DST_HALF}{DST}, {SRC}
148
 
        </display>
149
 
        <field name="DST" low="32" high="39" type="#cat1-dst">
150
 
                <param name="DST_REL"/>
151
 
        </field>
152
 
        <field name="REPEAT" low="40" high="41" type="#rptN"/>
153
 
        <field name="DST_REL" pos="49" type="bool"/>
154
 
        <pattern low="57" high="58">00</pattern>  <!-- OPC -->
155
 
</bitset>
156
 
 
157
 
<!--
158
 
        Helpers for displaying cat1 source forms.. split out so the toplevel
159
 
        instruction can just refer to {SRC}.  This decouples the cov/mov/mova
160
 
        permultations from the different src type permutations
161
 
 -->
162
 
 
163
 
<bitset name="#cat1-immed-src" size="32">
164
 
        <override>
165
 
                <expr>
166
 
                        {SRC_TYPE} == 0 /* f16 */
167
 
                </expr>
168
 
                <display>
169
 
                        h({IMMED})
170
 
                </display>
171
 
                <field name="IMMED" low="0" high="15" type="float"/>
172
 
        </override>
173
 
        <override>
174
 
                <expr>
175
 
                        {SRC_TYPE} == 1 /* f32 */
176
 
                </expr>
177
 
                <display>
178
 
                        ({IMMED})
179
 
                </display>
180
 
                <field name="IMMED" low="0" high="31" type="float"/>
181
 
        </override>
182
 
        <override>
183
 
                <expr>
184
 
                        ({SRC_TYPE} == 3 /* u32 */) &amp;&amp; ({IMMED} > 0x1000)
185
 
                </expr>
186
 
                <display>
187
 
                        0x{IMMED}
188
 
                </display>
189
 
                <field name="IMMED" low="0" high="31" type="hex"/>
190
 
        </override>
191
 
        <override>
192
 
                <expr>
193
 
                        {SRC_TYPE} == 4 /* s16 */
194
 
                </expr>
195
 
                <field name="IMMED" low="0" high="15" type="int"/>
196
 
        </override>
197
 
        <override>
198
 
                <expr>
199
 
                        {SRC_TYPE} == 5 /* s32 */
200
 
                </expr>
201
 
                <field name="IMMED" low="0" high="31" type="int"/>
202
 
        </override>
203
 
 
204
 
        <display>
205
 
                {IMMED}
206
 
        </display>
207
 
 
208
 
        <field name="IMMED" low="0" high="31" type="uint"/>
209
 
        <encode type="struct ir3_register *">
210
 
                <map name="IMMED">extract_reg_uim(src)</map>
211
 
        </encode>
212
 
</bitset>
213
 
 
214
 
<bitset name="#cat1-const-src" size="11">
215
 
        <display>
216
 
                {SRC_R}{HALF}{CONST}
217
 
        </display>
218
 
        <field name="CONST" low="0" high="10" type="#reg-const"/>
219
 
        <encode type="struct ir3_register *">
220
 
                <map name="CONST">src</map>
221
 
        </encode>
222
 
</bitset>
223
 
 
224
 
<bitset name="#cat1-gpr-src" size="8">
225
 
        <display>
226
 
                {SRC_R}{HALF}{SRC}
227
 
        </display>
228
 
        <field name="SRC" low="0" high="7" type="#reg-gpr"/>
229
 
        <encode type="struct ir3_register *">
230
 
                <map name="SRC">src</map>
231
 
        </encode>
232
 
</bitset>
233
 
 
234
 
<bitset name="#cat1-relative-gpr-src" size="10">
235
 
        <display>
236
 
                {SRC_R}{HALF}{SRC}
237
 
        </display>
238
 
        <field name="SRC" low="0" high="9" type="#reg-relative-gpr"/>
239
 
        <encode type="struct ir3_register *">
240
 
                <map name="SRC">src</map>
241
 
        </encode>
242
 
</bitset>
243
 
 
244
 
<bitset name="#cat1-relative-const-src" size="10">
245
 
        <display>
246
 
                {SRC_R}{HALF}{SRC}
247
 
        </display>
248
 
        <field name="SRC" low="0" high="9" type="#reg-relative-const"/>
249
 
        <encode type="struct ir3_register *">
250
 
                <map name="SRC">src</map>
251
 
        </encode>
252
 
</bitset>
253
 
 
254
 
<!--
255
 
        cov/mov/mova permutations based on src type:
256
 
 -->
257
 
 
258
 
<bitset name="mov-immed" extends="#instruction-cat1-mov">
259
 
        <field name="SRC" low="0" high="31" type="#cat1-immed-src">
260
 
                <param name="SRC_TYPE"/>
261
 
        </field>
262
 
        <pattern pos="43">0</pattern>   <!-- SRC_R -->
263
 
        <pattern low="53" high="54">10</pattern>
264
 
</bitset>
265
 
 
266
 
<bitset name="mov-const" extends="#instruction-cat1-mov">
267
 
        <field name="SRC" low="0" high="10" type="#cat1-const-src">
268
 
                <param name="SRC_R"/>
269
 
                <param name="HALF"/>
270
 
        </field>
271
 
        <pattern low="11" high="31">000000000000000000000</pattern>
272
 
        <field name="SRC_R" pos="43" type="bool" display="(r)"/>
273
 
        <pattern low="53" high="54">01</pattern>
274
 
</bitset>
275
 
 
276
 
<bitset name="mov-gpr" extends="#instruction-cat1-mov">
277
 
        <field name="SRC" low="0" high="7" type="#cat1-gpr-src">
278
 
                <param name="SRC_R"/>
279
 
                <param name="HALF"/>
280
 
        </field>
281
 
        <pattern low="8" high="31">000000000000000000000000</pattern>
282
 
        <field name="SRC_R" pos="43" type="bool" display="(r)"/>
283
 
        <pattern low="53" high="54">00</pattern>
284
 
</bitset>
285
 
 
286
 
<bitset name="#instruction-cat1-relative" extends="#instruction-cat1-mov">
287
 
        <pattern pos="11">1</pattern>
288
 
        <pattern low="12" high="31">00000000000000000000</pattern>
289
 
        <field name="SRC_R" pos="43" type="bool" display="(r)"/>
290
 
        <pattern low="53" high="54">00</pattern>
291
 
</bitset>
292
 
 
293
 
<bitset name="mov-relgpr" extends="#instruction-cat1-relative">
294
 
        <field name="SRC" low="0" high="9" type="#cat1-relative-gpr-src">
295
 
                <param name="SRC_R"/>
296
 
                <param name="HALF"/>
297
 
        </field>
298
 
        <pattern pos="10">0</pattern>
299
 
</bitset>
300
 
 
301
 
<bitset name="mov-relconst" extends="#instruction-cat1-relative">
302
 
        <field name="SRC" low="0" high="9" type="#cat1-relative-const-src">
303
 
                <param name="SRC_R"/>
304
 
                <param name="HALF"/>
305
 
        </field>
306
 
        <pattern pos="10">1</pattern>
307
 
</bitset>
308
 
 
309
 
<!--
310
 
        Other newer cat1 instructions
311
 
 -->
312
 
 
313
 
<bitset name="#cat1-multi-src" size="8">
314
 
        <display>
315
 
                {HALF}{REG}
316
 
        </display>
317
 
        <field name="REG" low="0" high="7" type="#reg-gpr"/>
318
 
 
319
 
        <encode type="struct ir3_register *">
320
 
                <map name="REG">src</map>
321
 
        </encode>
322
 
</bitset>
323
 
 
324
 
<bitset name="#cat1-multi-dst" size="8">
325
 
        <display>
326
 
                {DST_HALF}{REG}
327
 
        </display>
328
 
 
329
 
        <field name="REG" low="0" high="7" type="#reg-gpr"/>
330
 
 
331
 
        <encode type="struct ir3_register *">
332
 
                <map name="REG">src</map>
333
 
        </encode>
334
 
</bitset>
335
 
 
336
 
<bitset name="#instruction-cat1-multi" extends="#instruction-cat1-typed">
337
 
        <doc>
338
 
                These instructions all expand to a series of mov instructions,
339
 
                like (rptN) but more flexible. They aren't any faster than the
340
 
                equivalent sequence of mov/cov, but they guarantee that all
341
 
                sources are read before any destination is written, so they
342
 
                behave as-if the moves are executed in parallel.
343
 
        </doc>
344
 
 
345
 
        <gen min="500"/> <!-- TODO does a4xx support these? -->
346
 
 
347
 
        <field name="SRC0" low="0" high="7" type="#cat1-multi-src">
348
 
                <param name="HALF"/>
349
 
        </field>
350
 
        <field name="DST0" low="32" high="39" type="#cat1-multi-dst">
351
 
                <param name="DST_HALF"/>
352
 
        </field>
353
 
        <pattern pos="43">0</pattern>   <!-- SRC_R -->
354
 
        <pattern pos="49">0</pattern>   <!-- DST_REL -->
355
 
        <pattern low="53" high="54">00</pattern>
356
 
        <pattern low="57" high="58">10</pattern>  <!-- OPC -->
357
 
 
358
 
        <encode>
359
 
                <map name="DST0">src->dsts[0]</map>
360
 
        </encode>
361
 
</bitset>
362
 
 
363
 
<bitset name="swz" extends="#instruction-cat1-multi">
364
 
        <doc>
365
 
                SWiZzle. Move SRC0 to DST0 and SRC1 to DST1 in parallel. In
366
 
                particular this can be used to swap two registers.
367
 
        </doc>
368
 
        <display>
369
 
                {SY}{SS}{JP}{UL}swz.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {DST1}, {SRC0}, {SRC1}
370
 
        </display>
371
 
        <field name="SRC1" low="8" high="15" type="#cat1-multi-src">
372
 
                <param name="HALF"/>
373
 
        </field>
374
 
        <field name="DST1" low="16" high="23" type="#cat1-multi-dst">
375
 
                <param name="DST_HALF"/>
376
 
        </field>
377
 
        <pattern low="24" high="31">00000000</pattern>
378
 
 
379
 
        <pattern low="40" high="41">00</pattern> <!-- SUB_OPC -->
380
 
 
381
 
        <encode>
382
 
                <map name="SRC0">src->srcs[0]</map>
383
 
                <map name="SRC1">src->srcs[1]</map>
384
 
                <map name="DST1">src->dsts[1]</map>
385
 
        </encode>
386
 
</bitset>
387
 
 
388
 
<bitset name="gat" extends="#instruction-cat1-multi">
389
 
        <doc>
390
 
                GATher. Move SRC0 to DST0, SRC1 to DST0 + 1, SRC2 to DST0 + 2, and SRC3 to DST0 + 3.
391
 
        </doc>
392
 
        <display>
393
 
                {SY}{SS}{JP}{UL}gat.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {SRC0}, {SRC1}, {SRC2}, {SRC3}
394
 
        </display>
395
 
        <field name="SRC1" low="8" high="15" type="#cat1-multi-src">
396
 
                <param name="HALF"/>
397
 
        </field>
398
 
        <field name="SRC2" low="16" high="23" type="#cat1-multi-src">
399
 
                <param name="HALF"/>
400
 
        </field>
401
 
        <field name="SRC3" low="24" high="31" type="#cat1-multi-src">
402
 
                <param name="HALF"/>
403
 
        </field>
404
 
        <pattern low="40" high="41">01</pattern> <!-- SUB_OPC -->
405
 
 
406
 
        <encode>
407
 
                <map name="SRC0">src->srcs[0]</map>
408
 
                <map name="SRC1">src->srcs[1]</map>
409
 
                <map name="SRC2">src->srcs[2]</map>
410
 
                <map name="SRC3">src->srcs[3]</map>
411
 
        </encode>
412
 
</bitset>
413
 
 
414
 
<bitset name="sct" extends="#instruction-cat1-multi">
415
 
        <doc>
416
 
                SCaTter. Move SRC0 to DST0, SRC0 + 1 to DST1, SRC0 + 2 to DST2 + 3, and SRC0 + 3 to DST3.
417
 
        </doc>
418
 
        <display>
419
 
                {SY}{SS}{JP}{UL}sct.{SRC_TYPE}{DST_TYPE} {ROUND}{DST0}, {DST1}, {DST2}, {DST3}, {SRC0}
420
 
        </display>
421
 
        <field name="DST1" low="8" high="15" type="#cat1-multi-dst">
422
 
                <param name="DST_HALF"/>
423
 
        </field>
424
 
        <field name="DST2" low="16" high="23" type="#cat1-multi-dst">
425
 
                <param name="DST_HALF"/>
426
 
        </field>
427
 
        <field name="DST3" low="24" high="31" type="#cat1-multi-dst">
428
 
                <param name="DST_HALF"/>
429
 
        </field>
430
 
        <pattern low="40" high="41">10</pattern> <!-- SUB_OPC -->
431
 
 
432
 
        <encode>
433
 
                <map name="SRC0">src->srcs[0]</map>
434
 
                <map name="DST1">src->dsts[1]</map>
435
 
                <map name="DST2">src->dsts[2]</map>
436
 
                <map name="DST3">src->dsts[3]</map>
437
 
        </encode>
438
 
</bitset>
439
 
 
440
 
<bitset name="movmsk" extends="#instruction-cat1">
441
 
        <display>
442
 
                {SY}{SS}{JP}{UL}movmsk.w{W} {DST}
443
 
        </display>
444
 
        <derived name="W" type="uint">
445
 
                <expr>
446
 
                        ({REPEAT} + 1) * 32
447
 
                </expr>
448
 
        </derived>
449
 
        <pattern low="0" high="31">00000000000000000000000000000000</pattern>
450
 
        <field name="DST" low="32" high="39" type="#cat1-dst">
451
 
                <param name="DST_REL"/>
452
 
        </field>
453
 
        <field name="REPEAT" low="40" high="41" type="#rptN"/>
454
 
        <pattern pos="43">0</pattern>   <!-- SRC_R -->
455
 
        <pattern low="46" high="48">011</pattern>       <!-- DST_TYPE==u32 -->
456
 
        <field name="DST_REL" pos="49" type="bool"/>
457
 
        <pattern low="50" high="52">011</pattern>       <!-- SRC_TYPE==u32 -->
458
 
        <pattern low="53" high="54">00</pattern>
459
 
        <pattern low="57" high="58">11</pattern>  <!-- OPC -->
460
 
</bitset>
461
 
 
462
 
 
463
 
</isa>