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* Copyright 2016 Advanced Micro Devices, Inc.
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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/* This file implements randomized SDMA texture blit tests. */
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#include "r600_pipe_common.h"
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#include "util/u_surface.h"
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#include "util/rand_xor.h"
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static uint64_t seed_xorshift128plus[2];
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#define RAND_NUM_SIZE 8
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/* The GPU blits are emulated on the CPU using these CPU textures. */
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uint64_t layer_stride;
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static void alloc_cpu_texture(struct cpu_texture *tex,
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struct pipe_resource *templ, int bpp)
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tex->stride = align(templ->width0 * bpp, RAND_NUM_SIZE);
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tex->layer_stride = (uint64_t)tex->stride * templ->height0;
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tex->size = tex->layer_stride * templ->array_size;
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tex->ptr = malloc(tex->size);
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static void set_random_pixels(struct pipe_context *ctx,
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struct pipe_resource *tex,
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struct cpu_texture *cpu)
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struct pipe_transfer *t;
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map = pipe_texture_map_3d(ctx, tex, 0, PIPE_MAP_WRITE,
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0, 0, 0, tex->width0, tex->height0,
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for (z = 0; z < tex->array_size; z++) {
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for (y = 0; y < tex->height0; y++) {
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uint64_t *ptr = (uint64_t*)
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(map + t->layer_stride*z + t->stride*y);
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uint64_t *ptr_cpu = (uint64_t*)
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(cpu->ptr + cpu->layer_stride*z + cpu->stride*y);
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unsigned size = cpu->stride / RAND_NUM_SIZE;
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assert(t->stride % RAND_NUM_SIZE == 0);
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assert(cpu->stride % RAND_NUM_SIZE == 0);
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for (x = 0; x < size; x++) {
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rand_xorshift128plus(seed_xorshift128plus);
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pipe_texture_unmap(ctx, t);
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static bool compare_textures(struct pipe_context *ctx,
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struct pipe_resource *tex,
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struct cpu_texture *cpu, int bpp)
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struct pipe_transfer *t;
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map = pipe_texture_map_3d(ctx, tex, 0, PIPE_MAP_READ,
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0, 0, 0, tex->width0, tex->height0,
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for (z = 0; z < tex->array_size; z++) {
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for (y = 0; y < tex->height0; y++) {
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uint8_t *ptr = map + t->layer_stride*z + t->stride*y;
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uint8_t *cpu_ptr = cpu->ptr +
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cpu->layer_stride*z + cpu->stride*y;
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if (memcmp(ptr, cpu_ptr, tex->width0 * bpp)) {
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pipe_texture_unmap(ctx, t);
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static enum pipe_format get_format_from_bpp(int bpp)
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return PIPE_FORMAT_R8_UINT;
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return PIPE_FORMAT_R16_UINT;
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return PIPE_FORMAT_R32_UINT;
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return PIPE_FORMAT_R32G32_UINT;
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return PIPE_FORMAT_R32G32B32A32_UINT;
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return PIPE_FORMAT_NONE;
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static const char *array_mode_to_string(struct r600_common_screen *rscreen,
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struct radeon_surf *surf)
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if (rscreen->chip_class >= GFX9) {
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switch (surf->u.legacy.level[0].mode) {
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case RADEON_SURF_MODE_LINEAR_ALIGNED:
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return "LINEAR_ALIGNED";
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case RADEON_SURF_MODE_1D:
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return "1D_TILED_THIN1";
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case RADEON_SURF_MODE_2D:
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return "2D_TILED_THIN1";
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static unsigned generate_max_tex_side(unsigned max_tex_side)
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switch (rand() % 4) {
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/* Try to hit large sizes in 1/4 of the cases. */
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/* Try to hit 1D tiling in 1/4 of the cases. */
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/* Try to hit common sizes in 2/4 of the cases. */
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void r600_test_dma(struct r600_common_screen *rscreen)
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struct pipe_screen *screen = &rscreen->b;
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struct pipe_context *ctx = screen->context_create(screen, NULL, 0);
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struct r600_common_context *rctx = (struct r600_common_context*)ctx;
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uint64_t max_alloc_size;
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unsigned i, iterations, num_partial_copies, max_tex_side;
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unsigned num_pass = 0, num_fail = 0;
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max_tex_side = screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_SIZE);
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/* Max 128 MB allowed for both textures. */
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max_alloc_size = 128 * 1024 * 1024;
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/* the seed for random test parameters */
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/* the seed for random pixel data */
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s_rand_xorshift128plus(seed_xorshift128plus, false);
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iterations = 1000000000; /* just kill it when you are bored */
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num_partial_copies = 30;
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/* These parameters are randomly generated per test:
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* - whether to do one whole-surface copy or N partial copies per test
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* - which tiling modes to use (LINEAR_ALIGNED, 1D, 2D)
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* - which texture dimensions to use
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* - whether to use VRAM (all tiling modes) and GTT (staging, linear
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* - random initial pixels in src
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* - generate random subrectangle copies for partial blits
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for (i = 0; i < iterations; i++) {
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struct pipe_resource tsrc = {}, tdst = {}, *src, *dst;
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struct r600_texture *rdst;
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struct r600_texture *rsrc;
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struct cpu_texture src_cpu, dst_cpu;
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unsigned bpp, max_width, max_height, max_depth, j, num;
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unsigned gfx_blits = 0, dma_blits = 0, max_tex_side_gen;
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unsigned max_tex_layers;
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bool do_partial_copies = rand() & 1;
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/* generate a random test case */
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tsrc.target = tdst.target = PIPE_TEXTURE_2D_ARRAY;
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tsrc.depth0 = tdst.depth0 = 1;
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bpp = 1 << (rand() % 5);
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tsrc.format = tdst.format = get_format_from_bpp(bpp);
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max_tex_side_gen = generate_max_tex_side(max_tex_side);
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max_tex_layers = rand() % 4 ? 1 : 5;
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tsrc.width0 = (rand() % max_tex_side_gen) + 1;
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tsrc.height0 = (rand() % max_tex_side_gen) + 1;
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tsrc.array_size = (rand() % max_tex_layers) + 1;
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/* Have a 1/4 chance of getting power-of-two dimensions. */
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if (rand() % 4 == 0) {
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tsrc.width0 = util_next_power_of_two(tsrc.width0);
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tsrc.height0 = util_next_power_of_two(tsrc.height0);
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if (!do_partial_copies) {
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/* whole-surface copies only, same dimensions */
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max_tex_side_gen = generate_max_tex_side(max_tex_side);
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max_tex_layers = rand() % 4 ? 1 : 5;
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/* many partial copies, dimensions can be different */
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tdst.width0 = (rand() % max_tex_side_gen) + 1;
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tdst.height0 = (rand() % max_tex_side_gen) + 1;
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tdst.array_size = (rand() % max_tex_layers) + 1;
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/* Have a 1/4 chance of getting power-of-two dimensions. */
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if (rand() % 4 == 0) {
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tdst.width0 = util_next_power_of_two(tdst.width0);
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tdst.height0 = util_next_power_of_two(tdst.height0);
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/* check texture sizes */
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if ((uint64_t)tsrc.width0 * tsrc.height0 * tsrc.array_size * bpp +
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(uint64_t)tdst.width0 * tdst.height0 * tdst.array_size * bpp >
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/* too large, try again */
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/* VRAM + the tiling mode depends on dimensions (3/4 of cases),
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* or GTT + linear only (1/4 of cases)
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tsrc.usage = rand() % 4 ? PIPE_USAGE_DEFAULT : PIPE_USAGE_STAGING;
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tdst.usage = rand() % 4 ? PIPE_USAGE_DEFAULT : PIPE_USAGE_STAGING;
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/* Allocate textures (both the GPU and CPU copies).
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* The CPU will emulate what the GPU should be doing.
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src = screen->resource_create(screen, &tsrc);
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dst = screen->resource_create(screen, &tdst);
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rdst = (struct r600_texture*)dst;
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rsrc = (struct r600_texture*)src;
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alloc_cpu_texture(&src_cpu, &tsrc, bpp);
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alloc_cpu_texture(&dst_cpu, &tdst, bpp);
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printf("%4u: dst = (%5u x %5u x %u, %s), "
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" src = (%5u x %5u x %u, %s), bpp = %2u, ",
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i, tdst.width0, tdst.height0, tdst.array_size,
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array_mode_to_string(rscreen, &rdst->surface),
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tsrc.width0, tsrc.height0, tsrc.array_size,
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array_mode_to_string(rscreen, &rsrc->surface), bpp);
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set_random_pixels(ctx, src, &src_cpu);
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/* clear dst pixels */
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rctx->clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true);
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memset(dst_cpu.ptr, 0, dst_cpu.layer_stride * tdst.array_size);
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max_width = MIN2(tsrc.width0, tdst.width0);
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max_height = MIN2(tsrc.height0, tdst.height0);
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max_depth = MIN2(tsrc.array_size, tdst.array_size);
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num = do_partial_copies ? num_partial_copies : 1;
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for (j = 0; j < num; j++) {
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int width, height, depth;
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int srcx, srcy, srcz, dstx, dsty, dstz;
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unsigned old_num_draw_calls = rctx->num_draw_calls;
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unsigned old_num_dma_calls = rctx->num_dma_calls;
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if (!do_partial_copies) {
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/* copy whole src to dst */
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srcx = srcy = srcz = dstx = dsty = dstz = 0;
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/* random sub-rectangle copies from src to dst */
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depth = (rand() % max_depth) + 1;
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srcz = rand() % (tsrc.array_size - depth + 1);
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dstz = rand() % (tdst.array_size - depth + 1);
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/* special code path to hit the tiled partial copies */
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if (!rsrc->surface.is_linear &&
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!rdst->surface.is_linear &&
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if (max_width < 8 || max_height < 8)
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width = ((rand() % (max_width / 8)) + 1) * 8;
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height = ((rand() % (max_height / 8)) + 1) * 8;
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srcx = rand() % (tsrc.width0 - width + 1) & ~0x7;
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srcy = rand() % (tsrc.height0 - height + 1) & ~0x7;
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dstx = rand() % (tdst.width0 - width + 1) & ~0x7;
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dsty = rand() % (tdst.height0 - height + 1) & ~0x7;
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/* just make sure that it doesn't divide by zero */
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assert(max_width > 0 && max_height > 0);
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width = (rand() % max_width) + 1;
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height = (rand() % max_height) + 1;
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srcx = rand() % (tsrc.width0 - width + 1);
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srcy = rand() % (tsrc.height0 - height + 1);
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dstx = rand() % (tdst.width0 - width + 1);
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dsty = rand() % (tdst.height0 - height + 1);
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/* special code path to hit out-of-bounds reads in L2T */
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if (rsrc->surface.is_linear &&
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!rdst->surface.is_linear &&
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u_box_3d(srcx, srcy, srcz, width, height, depth, &box);
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rctx->dma_copy(ctx, dst, 0, dstx, dsty, dstz, src, 0, &box);
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/* See which engine was used. */
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gfx_blits += rctx->num_draw_calls > old_num_draw_calls;
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dma_blits += rctx->num_dma_calls > old_num_dma_calls;
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util_copy_box(dst_cpu.ptr, tdst.format, dst_cpu.stride,
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dst_cpu.layer_stride,
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dstx, dsty, dstz, width, height, depth,
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src_cpu.ptr, src_cpu.stride,
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src_cpu.layer_stride,
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pass = compare_textures(ctx, dst, &dst_cpu, bpp);
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printf("BLITs: GFX = %2u, DMA = %2u, %s [%u/%u]\n",
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gfx_blits, dma_blits, pass ? "pass" : "fail",
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num_pass, num_pass+num_fail);
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pipe_resource_reference(&src, NULL);
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pipe_resource_reference(&dst, NULL);